162306a36Sopenharmony_ci======================================================== 262306a36Sopenharmony_ciSecondary CPU enable-method "al,alpine-smp" binding 362306a36Sopenharmony_ci======================================================== 462306a36Sopenharmony_ci 562306a36Sopenharmony_ciThis document describes the "al,alpine-smp" method for 662306a36Sopenharmony_cienabling secondary CPUs. To apply to all CPUs, a single 762306a36Sopenharmony_ci"al,alpine-smp" enable method should be defined in the 862306a36Sopenharmony_ci"cpus" node. 962306a36Sopenharmony_ci 1062306a36Sopenharmony_ciEnable method name: "al,alpine-smp" 1162306a36Sopenharmony_ciCompatible machines: "al,alpine" 1262306a36Sopenharmony_ciCompatible CPUs: "arm,cortex-a15" 1362306a36Sopenharmony_ciRelated properties: (none) 1462306a36Sopenharmony_ci 1562306a36Sopenharmony_ciNote: 1662306a36Sopenharmony_ciThis enable method requires valid nodes compatible with 1762306a36Sopenharmony_ci"al,alpine-cpu-resume" and "al,alpine-nb-service". 1862306a36Sopenharmony_ci 1962306a36Sopenharmony_ci 2062306a36Sopenharmony_ci* Alpine CPU resume registers 2162306a36Sopenharmony_ci 2262306a36Sopenharmony_ciThe CPU resume register are used to define required resume address after 2362306a36Sopenharmony_cireset. 2462306a36Sopenharmony_ci 2562306a36Sopenharmony_ciProperties: 2662306a36Sopenharmony_ci- compatible : Should contain "al,alpine-cpu-resume". 2762306a36Sopenharmony_ci- reg : Offset and length of the register set for the device 2862306a36Sopenharmony_ci 2962306a36Sopenharmony_ci 3062306a36Sopenharmony_ci* Alpine System-Fabric Service Registers 3162306a36Sopenharmony_ci 3262306a36Sopenharmony_ciThe System-Fabric Service Registers allow various operation on CPU and 3362306a36Sopenharmony_cisystem fabric, like powering CPUs off. 3462306a36Sopenharmony_ci 3562306a36Sopenharmony_ciProperties: 3662306a36Sopenharmony_ci- compatible : Should contain "al,alpine-sysfabric-service" and "syscon". 3762306a36Sopenharmony_ci- reg : Offset and length of the register set for the device 3862306a36Sopenharmony_ci 3962306a36Sopenharmony_ci 4062306a36Sopenharmony_ciExample: 4162306a36Sopenharmony_ci 4262306a36Sopenharmony_cicpus { 4362306a36Sopenharmony_ci #address-cells = <1>; 4462306a36Sopenharmony_ci #size-cells = <0>; 4562306a36Sopenharmony_ci enable-method = "al,alpine-smp"; 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci cpu@0 { 4862306a36Sopenharmony_ci compatible = "arm,cortex-a15"; 4962306a36Sopenharmony_ci device_type = "cpu"; 5062306a36Sopenharmony_ci reg = <0>; 5162306a36Sopenharmony_ci }; 5262306a36Sopenharmony_ci 5362306a36Sopenharmony_ci cpu@1 { 5462306a36Sopenharmony_ci compatible = "arm,cortex-a15"; 5562306a36Sopenharmony_ci device_type = "cpu"; 5662306a36Sopenharmony_ci reg = <1>; 5762306a36Sopenharmony_ci }; 5862306a36Sopenharmony_ci 5962306a36Sopenharmony_ci cpu@2 { 6062306a36Sopenharmony_ci compatible = "arm,cortex-a15"; 6162306a36Sopenharmony_ci device_type = "cpu"; 6262306a36Sopenharmony_ci reg = <2>; 6362306a36Sopenharmony_ci }; 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci cpu@3 { 6662306a36Sopenharmony_ci compatible = "arm,cortex-a15"; 6762306a36Sopenharmony_ci device_type = "cpu"; 6862306a36Sopenharmony_ci reg = <3>; 6962306a36Sopenharmony_ci }; 7062306a36Sopenharmony_ci}; 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_cicpu_resume { 7362306a36Sopenharmony_ci compatible = "al,alpine-cpu-resume"; 7462306a36Sopenharmony_ci reg = <0xfbff5ed0 0x30>; 7562306a36Sopenharmony_ci}; 7662306a36Sopenharmony_ci 7762306a36Sopenharmony_cinb_service { 7862306a36Sopenharmony_ci compatible = "al,alpine-sysfabric-service", "syscon"; 7962306a36Sopenharmony_ci reg = <0xfb070000 0x10000>; 8062306a36Sopenharmony_ci}; 81