162306a36Sopenharmony_ci.. SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci
362306a36Sopenharmony_ci===========================
462306a36Sopenharmony_ciAMD64 Specific Boot Options
562306a36Sopenharmony_ci===========================
662306a36Sopenharmony_ci
762306a36Sopenharmony_ciThere are many others (usually documented in driver documentation), but
862306a36Sopenharmony_cionly the AMD64 specific ones are listed here.
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ciMachine check
1162306a36Sopenharmony_ci=============
1262306a36Sopenharmony_ciPlease see Documentation/arch/x86/x86_64/machinecheck.rst for sysfs runtime tunables.
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci   mce=off
1562306a36Sopenharmony_ci		Disable machine check
1662306a36Sopenharmony_ci   mce=no_cmci
1762306a36Sopenharmony_ci		Disable CMCI(Corrected Machine Check Interrupt) that
1862306a36Sopenharmony_ci		Intel processor supports.  Usually this disablement is
1962306a36Sopenharmony_ci		not recommended, but it might be handy if your hardware
2062306a36Sopenharmony_ci		is misbehaving.
2162306a36Sopenharmony_ci		Note that you'll get more problems without CMCI than with
2262306a36Sopenharmony_ci		due to the shared banks, i.e. you might get duplicated
2362306a36Sopenharmony_ci		error logs.
2462306a36Sopenharmony_ci   mce=dont_log_ce
2562306a36Sopenharmony_ci		Don't make logs for corrected errors.  All events reported
2662306a36Sopenharmony_ci		as corrected are silently cleared by OS.
2762306a36Sopenharmony_ci		This option will be useful if you have no interest in any
2862306a36Sopenharmony_ci		of corrected errors.
2962306a36Sopenharmony_ci   mce=ignore_ce
3062306a36Sopenharmony_ci		Disable features for corrected errors, e.g. polling timer
3162306a36Sopenharmony_ci		and CMCI.  All events reported as corrected are not cleared
3262306a36Sopenharmony_ci		by OS and remained in its error banks.
3362306a36Sopenharmony_ci		Usually this disablement is not recommended, however if
3462306a36Sopenharmony_ci		there is an agent checking/clearing corrected errors
3562306a36Sopenharmony_ci		(e.g. BIOS or hardware monitoring applications), conflicting
3662306a36Sopenharmony_ci		with OS's error handling, and you cannot deactivate the agent,
3762306a36Sopenharmony_ci		then this option will be a help.
3862306a36Sopenharmony_ci   mce=no_lmce
3962306a36Sopenharmony_ci		Do not opt-in to Local MCE delivery. Use legacy method
4062306a36Sopenharmony_ci		to broadcast MCEs.
4162306a36Sopenharmony_ci   mce=bootlog
4262306a36Sopenharmony_ci		Enable logging of machine checks left over from booting.
4362306a36Sopenharmony_ci		Disabled by default on AMD Fam10h and older because some BIOS
4462306a36Sopenharmony_ci		leave bogus ones.
4562306a36Sopenharmony_ci		If your BIOS doesn't do that it's a good idea to enable though
4662306a36Sopenharmony_ci		to make sure you log even machine check events that result
4762306a36Sopenharmony_ci		in a reboot. On Intel systems it is enabled by default.
4862306a36Sopenharmony_ci   mce=nobootlog
4962306a36Sopenharmony_ci		Disable boot machine check logging.
5062306a36Sopenharmony_ci   mce=monarchtimeout (number)
5162306a36Sopenharmony_ci		monarchtimeout:
5262306a36Sopenharmony_ci		Sets the time in us to wait for other CPUs on machine checks. 0
5362306a36Sopenharmony_ci		to disable.
5462306a36Sopenharmony_ci   mce=bios_cmci_threshold
5562306a36Sopenharmony_ci		Don't overwrite the bios-set CMCI threshold. This boot option
5662306a36Sopenharmony_ci		prevents Linux from overwriting the CMCI threshold set by the
5762306a36Sopenharmony_ci		bios. Without this option, Linux always sets the CMCI
5862306a36Sopenharmony_ci		threshold to 1. Enabling this may make memory predictive failure
5962306a36Sopenharmony_ci		analysis less effective if the bios sets thresholds for memory
6062306a36Sopenharmony_ci		errors since we will not see details for all errors.
6162306a36Sopenharmony_ci   mce=recovery
6262306a36Sopenharmony_ci		Force-enable recoverable machine check code paths
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ci   nomce (for compatibility with i386)
6562306a36Sopenharmony_ci		same as mce=off
6662306a36Sopenharmony_ci
6762306a36Sopenharmony_ci   Everything else is in sysfs now.
6862306a36Sopenharmony_ci
6962306a36Sopenharmony_ciAPICs
7062306a36Sopenharmony_ci=====
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_ci   apic
7362306a36Sopenharmony_ci	Use IO-APIC. Default
7462306a36Sopenharmony_ci
7562306a36Sopenharmony_ci   noapic
7662306a36Sopenharmony_ci	Don't use the IO-APIC.
7762306a36Sopenharmony_ci
7862306a36Sopenharmony_ci   disableapic
7962306a36Sopenharmony_ci	Don't use the local APIC
8062306a36Sopenharmony_ci
8162306a36Sopenharmony_ci   nolapic
8262306a36Sopenharmony_ci     Don't use the local APIC (alias for i386 compatibility)
8362306a36Sopenharmony_ci
8462306a36Sopenharmony_ci   pirq=...
8562306a36Sopenharmony_ci	See Documentation/arch/x86/i386/IO-APIC.rst
8662306a36Sopenharmony_ci
8762306a36Sopenharmony_ci   noapictimer
8862306a36Sopenharmony_ci	Don't set up the APIC timer
8962306a36Sopenharmony_ci
9062306a36Sopenharmony_ci   no_timer_check
9162306a36Sopenharmony_ci	Don't check the IO-APIC timer. This can work around
9262306a36Sopenharmony_ci	problems with incorrect timer initialization on some boards.
9362306a36Sopenharmony_ci
9462306a36Sopenharmony_ci   apicpmtimer
9562306a36Sopenharmony_ci	Do APIC timer calibration using the pmtimer. Implies
9662306a36Sopenharmony_ci	apicmaintimer. Useful when your PIT timer is totally broken.
9762306a36Sopenharmony_ci
9862306a36Sopenharmony_ciTiming
9962306a36Sopenharmony_ci======
10062306a36Sopenharmony_ci
10162306a36Sopenharmony_ci  notsc
10262306a36Sopenharmony_ci    Deprecated, use tsc=unstable instead.
10362306a36Sopenharmony_ci
10462306a36Sopenharmony_ci  nohpet
10562306a36Sopenharmony_ci    Don't use the HPET timer.
10662306a36Sopenharmony_ci
10762306a36Sopenharmony_ciIdle loop
10862306a36Sopenharmony_ci=========
10962306a36Sopenharmony_ci
11062306a36Sopenharmony_ci  idle=poll
11162306a36Sopenharmony_ci    Don't do power saving in the idle loop using HLT, but poll for rescheduling
11262306a36Sopenharmony_ci    event. This will make the CPUs eat a lot more power, but may be useful
11362306a36Sopenharmony_ci    to get slightly better performance in multiprocessor benchmarks. It also
11462306a36Sopenharmony_ci    makes some profiling using performance counters more accurate.
11562306a36Sopenharmony_ci    Please note that on systems with MONITOR/MWAIT support (like Intel EM64T
11662306a36Sopenharmony_ci    CPUs) this option has no performance advantage over the normal idle loop.
11762306a36Sopenharmony_ci    It may also interact badly with hyperthreading.
11862306a36Sopenharmony_ci
11962306a36Sopenharmony_ciRebooting
12062306a36Sopenharmony_ci=========
12162306a36Sopenharmony_ci
12262306a36Sopenharmony_ci   reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] | p[ci] [, [w]arm | [c]old]
12362306a36Sopenharmony_ci      bios
12462306a36Sopenharmony_ci        Use the CPU reboot vector for warm reset
12562306a36Sopenharmony_ci      warm
12662306a36Sopenharmony_ci        Don't set the cold reboot flag
12762306a36Sopenharmony_ci      cold
12862306a36Sopenharmony_ci        Set the cold reboot flag
12962306a36Sopenharmony_ci      triple
13062306a36Sopenharmony_ci        Force a triple fault (init)
13162306a36Sopenharmony_ci      kbd
13262306a36Sopenharmony_ci        Use the keyboard controller. cold reset (default)
13362306a36Sopenharmony_ci      acpi
13462306a36Sopenharmony_ci        Use the ACPI RESET_REG in the FADT. If ACPI is not configured or
13562306a36Sopenharmony_ci        the ACPI reset does not work, the reboot path attempts the reset
13662306a36Sopenharmony_ci        using the keyboard controller.
13762306a36Sopenharmony_ci      efi
13862306a36Sopenharmony_ci        Use efi reset_system runtime service. If EFI is not configured or
13962306a36Sopenharmony_ci        the EFI reset does not work, the reboot path attempts the reset using
14062306a36Sopenharmony_ci        the keyboard controller.
14162306a36Sopenharmony_ci      pci
14262306a36Sopenharmony_ci        Use a write to the PCI config space register 0xcf9 to trigger reboot.
14362306a36Sopenharmony_ci
14462306a36Sopenharmony_ci   Using warm reset will be much faster especially on big memory
14562306a36Sopenharmony_ci   systems because the BIOS will not go through the memory check.
14662306a36Sopenharmony_ci   Disadvantage is that not all hardware will be completely reinitialized
14762306a36Sopenharmony_ci   on reboot so there may be boot problems on some systems.
14862306a36Sopenharmony_ci
14962306a36Sopenharmony_ci   reboot=force
15062306a36Sopenharmony_ci     Don't stop other CPUs on reboot. This can make reboot more reliable
15162306a36Sopenharmony_ci     in some cases.
15262306a36Sopenharmony_ci
15362306a36Sopenharmony_ci   reboot=default
15462306a36Sopenharmony_ci     There are some built-in platform specific "quirks" - you may see:
15562306a36Sopenharmony_ci     "reboot: <name> series board detected. Selecting <type> for reboots."
15662306a36Sopenharmony_ci     In the case where you think the quirk is in error (e.g. you have
15762306a36Sopenharmony_ci     newer BIOS, or newer board) using this option will ignore the built-in
15862306a36Sopenharmony_ci     quirk table, and use the generic default reboot actions.
15962306a36Sopenharmony_ci
16062306a36Sopenharmony_ciNUMA
16162306a36Sopenharmony_ci====
16262306a36Sopenharmony_ci
16362306a36Sopenharmony_ci  numa=off
16462306a36Sopenharmony_ci    Only set up a single NUMA node spanning all memory.
16562306a36Sopenharmony_ci
16662306a36Sopenharmony_ci  numa=noacpi
16762306a36Sopenharmony_ci    Don't parse the SRAT table for NUMA setup
16862306a36Sopenharmony_ci
16962306a36Sopenharmony_ci  numa=nohmat
17062306a36Sopenharmony_ci    Don't parse the HMAT table for NUMA setup, or soft-reserved memory
17162306a36Sopenharmony_ci    partitioning.
17262306a36Sopenharmony_ci
17362306a36Sopenharmony_ci  numa=fake=<size>[MG]
17462306a36Sopenharmony_ci    If given as a memory unit, fills all system RAM with nodes of
17562306a36Sopenharmony_ci    size interleaved over physical nodes.
17662306a36Sopenharmony_ci
17762306a36Sopenharmony_ci  numa=fake=<N>
17862306a36Sopenharmony_ci    If given as an integer, fills all system RAM with N fake nodes
17962306a36Sopenharmony_ci    interleaved over physical nodes.
18062306a36Sopenharmony_ci
18162306a36Sopenharmony_ci  numa=fake=<N>U
18262306a36Sopenharmony_ci    If given as an integer followed by 'U', it will divide each
18362306a36Sopenharmony_ci    physical node into N emulated nodes.
18462306a36Sopenharmony_ci
18562306a36Sopenharmony_ciACPI
18662306a36Sopenharmony_ci====
18762306a36Sopenharmony_ci
18862306a36Sopenharmony_ci  acpi=off
18962306a36Sopenharmony_ci    Don't enable ACPI
19062306a36Sopenharmony_ci  acpi=ht
19162306a36Sopenharmony_ci    Use ACPI boot table parsing, but don't enable ACPI interpreter
19262306a36Sopenharmony_ci  acpi=force
19362306a36Sopenharmony_ci    Force ACPI on (currently not needed)
19462306a36Sopenharmony_ci  acpi=strict
19562306a36Sopenharmony_ci    Disable out of spec ACPI workarounds.
19662306a36Sopenharmony_ci  acpi_sci={edge,level,high,low}
19762306a36Sopenharmony_ci    Set up ACPI SCI interrupt.
19862306a36Sopenharmony_ci  acpi=noirq
19962306a36Sopenharmony_ci    Don't route interrupts
20062306a36Sopenharmony_ci  acpi=nocmcff
20162306a36Sopenharmony_ci    Disable firmware first mode for corrected errors. This
20262306a36Sopenharmony_ci    disables parsing the HEST CMC error source to check if
20362306a36Sopenharmony_ci    firmware has set the FF flag. This may result in
20462306a36Sopenharmony_ci    duplicate corrected error reports.
20562306a36Sopenharmony_ci
20662306a36Sopenharmony_ciPCI
20762306a36Sopenharmony_ci===
20862306a36Sopenharmony_ci
20962306a36Sopenharmony_ci  pci=off
21062306a36Sopenharmony_ci    Don't use PCI
21162306a36Sopenharmony_ci  pci=conf1
21262306a36Sopenharmony_ci    Use conf1 access.
21362306a36Sopenharmony_ci  pci=conf2
21462306a36Sopenharmony_ci    Use conf2 access.
21562306a36Sopenharmony_ci  pci=rom
21662306a36Sopenharmony_ci    Assign ROMs.
21762306a36Sopenharmony_ci  pci=assign-busses
21862306a36Sopenharmony_ci    Assign busses
21962306a36Sopenharmony_ci  pci=irqmask=MASK
22062306a36Sopenharmony_ci    Set PCI interrupt mask to MASK
22162306a36Sopenharmony_ci  pci=lastbus=NUMBER
22262306a36Sopenharmony_ci    Scan up to NUMBER busses, no matter what the mptable says.
22362306a36Sopenharmony_ci  pci=noacpi
22462306a36Sopenharmony_ci    Don't use ACPI to set up PCI interrupt routing.
22562306a36Sopenharmony_ci
22662306a36Sopenharmony_ciIOMMU (input/output memory management unit)
22762306a36Sopenharmony_ci===========================================
22862306a36Sopenharmony_ciMultiple x86-64 PCI-DMA mapping implementations exist, for example:
22962306a36Sopenharmony_ci
23062306a36Sopenharmony_ci   1. <kernel/dma/direct.c>: use no hardware/software IOMMU at all
23162306a36Sopenharmony_ci      (e.g. because you have < 3 GB memory).
23262306a36Sopenharmony_ci      Kernel boot message: "PCI-DMA: Disabling IOMMU"
23362306a36Sopenharmony_ci
23462306a36Sopenharmony_ci   2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU.
23562306a36Sopenharmony_ci      Kernel boot message: "PCI-DMA: using GART IOMMU"
23662306a36Sopenharmony_ci
23762306a36Sopenharmony_ci   3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used
23862306a36Sopenharmony_ci      e.g. if there is no hardware IOMMU in the system and it is need because
23962306a36Sopenharmony_ci      you have >3GB memory or told the kernel to us it (iommu=soft))
24062306a36Sopenharmony_ci      Kernel boot message: "PCI-DMA: Using software bounce buffering
24162306a36Sopenharmony_ci      for IO (SWIOTLB)"
24262306a36Sopenharmony_ci
24362306a36Sopenharmony_ci::
24462306a36Sopenharmony_ci
24562306a36Sopenharmony_ci  iommu=[<size>][,noagp][,off][,force][,noforce]
24662306a36Sopenharmony_ci  [,memaper[=<order>]][,merge][,fullflush][,nomerge]
24762306a36Sopenharmony_ci  [,noaperture]
24862306a36Sopenharmony_ci
24962306a36Sopenharmony_ciGeneral iommu options:
25062306a36Sopenharmony_ci
25162306a36Sopenharmony_ci    off
25262306a36Sopenharmony_ci      Don't initialize and use any kind of IOMMU.
25362306a36Sopenharmony_ci    noforce
25462306a36Sopenharmony_ci      Don't force hardware IOMMU usage when it is not needed. (default).
25562306a36Sopenharmony_ci    force
25662306a36Sopenharmony_ci      Force the use of the hardware IOMMU even when it is
25762306a36Sopenharmony_ci      not actually needed (e.g. because < 3 GB memory).
25862306a36Sopenharmony_ci    soft
25962306a36Sopenharmony_ci      Use software bounce buffering (SWIOTLB) (default for
26062306a36Sopenharmony_ci      Intel machines). This can be used to prevent the usage
26162306a36Sopenharmony_ci      of an available hardware IOMMU.
26262306a36Sopenharmony_ci
26362306a36Sopenharmony_ciiommu options only relevant to the AMD GART hardware IOMMU:
26462306a36Sopenharmony_ci
26562306a36Sopenharmony_ci    <size>
26662306a36Sopenharmony_ci      Set the size of the remapping area in bytes.
26762306a36Sopenharmony_ci    allowed
26862306a36Sopenharmony_ci      Overwrite iommu off workarounds for specific chipsets.
26962306a36Sopenharmony_ci    fullflush
27062306a36Sopenharmony_ci      Flush IOMMU on each allocation (default).
27162306a36Sopenharmony_ci    nofullflush
27262306a36Sopenharmony_ci      Don't use IOMMU fullflush.
27362306a36Sopenharmony_ci    memaper[=<order>]
27462306a36Sopenharmony_ci      Allocate an own aperture over RAM with size 32MB<<order.
27562306a36Sopenharmony_ci      (default: order=1, i.e. 64MB)
27662306a36Sopenharmony_ci    merge
27762306a36Sopenharmony_ci      Do scatter-gather (SG) merging. Implies "force" (experimental).
27862306a36Sopenharmony_ci    nomerge
27962306a36Sopenharmony_ci      Don't do scatter-gather (SG) merging.
28062306a36Sopenharmony_ci    noaperture
28162306a36Sopenharmony_ci      Ask the IOMMU not to touch the aperture for AGP.
28262306a36Sopenharmony_ci    noagp
28362306a36Sopenharmony_ci      Don't initialize the AGP driver and use full aperture.
28462306a36Sopenharmony_ci    panic
28562306a36Sopenharmony_ci      Always panic when IOMMU overflows.
28662306a36Sopenharmony_ci
28762306a36Sopenharmony_ciiommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
28862306a36Sopenharmony_ciimplementation:
28962306a36Sopenharmony_ci
29062306a36Sopenharmony_ci    swiotlb=<slots>[,force,noforce]
29162306a36Sopenharmony_ci      <slots>
29262306a36Sopenharmony_ci        Prereserve that many 2K slots for the software IO bounce buffering.
29362306a36Sopenharmony_ci      force
29462306a36Sopenharmony_ci        Force all IO through the software TLB.
29562306a36Sopenharmony_ci      noforce
29662306a36Sopenharmony_ci        Do not initialize the software TLB.
29762306a36Sopenharmony_ci
29862306a36Sopenharmony_ci
29962306a36Sopenharmony_ciMiscellaneous
30062306a36Sopenharmony_ci=============
30162306a36Sopenharmony_ci
30262306a36Sopenharmony_ci  nogbpages
30362306a36Sopenharmony_ci    Do not use GB pages for kernel direct mappings.
30462306a36Sopenharmony_ci  gbpages
30562306a36Sopenharmony_ci    Use GB pages for kernel direct mappings.
30662306a36Sopenharmony_ci
30762306a36Sopenharmony_ci
30862306a36Sopenharmony_ciAMD SEV (Secure Encrypted Virtualization)
30962306a36Sopenharmony_ci=========================================
31062306a36Sopenharmony_ciOptions relating to AMD SEV, specified via the following format:
31162306a36Sopenharmony_ci
31262306a36Sopenharmony_ci::
31362306a36Sopenharmony_ci
31462306a36Sopenharmony_ci   sev=option1[,option2]
31562306a36Sopenharmony_ci
31662306a36Sopenharmony_ciThe available options are:
31762306a36Sopenharmony_ci
31862306a36Sopenharmony_ci   debug
31962306a36Sopenharmony_ci     Enable debug messages.
320