162306a36Sopenharmony_ci.. SPDX-License-Identifier: GPL-2.0
262306a36Sopenharmony_ci
362306a36Sopenharmony_ci============================================================
462306a36Sopenharmony_ciIntel(R) Speed Select Technology User Guide
562306a36Sopenharmony_ci============================================================
662306a36Sopenharmony_ci
762306a36Sopenharmony_ciThe Intel(R) Speed Select Technology (Intel(R) SST) provides a powerful new
862306a36Sopenharmony_cicollection of features that give more granular control over CPU performance.
962306a36Sopenharmony_ciWith Intel(R) SST, one server can be configured for power and performance for a
1062306a36Sopenharmony_civariety of diverse workload requirements.
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ciRefer to the links below for an overview of the technology:
1362306a36Sopenharmony_ci
1462306a36Sopenharmony_ci- https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-article.html
1562306a36Sopenharmony_ci- https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enhancing-performance.pdf
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ciThese capabilities are further enhanced in some of the newer generations of
1862306a36Sopenharmony_ciserver platforms where these features can be enumerated and controlled
1962306a36Sopenharmony_cidynamically without pre-configuring via BIOS setup options. This dynamic
2062306a36Sopenharmony_ciconfiguration is done via mailbox commands to the hardware. One way to enumerate
2162306a36Sopenharmony_ciand configure these features is by using the Intel Speed Select utility.
2262306a36Sopenharmony_ci
2362306a36Sopenharmony_ciThis document explains how to use the Intel Speed Select tool to enumerate and
2462306a36Sopenharmony_cicontrol Intel(R) SST features. This document gives example commands and explains
2562306a36Sopenharmony_cihow these commands change the power and performance profile of the system under
2662306a36Sopenharmony_citest. Using this tool as an example, customers can replicate the messaging
2762306a36Sopenharmony_ciimplemented in the tool in their production software.
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ciintel-speed-select configuration tool
3062306a36Sopenharmony_ci======================================
3162306a36Sopenharmony_ci
3262306a36Sopenharmony_ciMost Linux distribution packages may include the "intel-speed-select" tool. If not,
3362306a36Sopenharmony_ciit can be built by downloading the Linux kernel tree from kernel.org. Once
3462306a36Sopenharmony_cidownloaded, the tool can be built without building the full kernel.
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ciFrom the kernel tree, run the following commands::
3762306a36Sopenharmony_ci
3862306a36Sopenharmony_ci# cd tools/power/x86/intel-speed-select/
3962306a36Sopenharmony_ci# make
4062306a36Sopenharmony_ci# make install
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ciGetting Help
4362306a36Sopenharmony_ci------------
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ciTo get help with the tool, execute the command below::
4662306a36Sopenharmony_ci
4762306a36Sopenharmony_ci# intel-speed-select --help
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ciThe top-level help describes arguments and features. Notice that there is a
5062306a36Sopenharmony_cimulti-level help structure in the tool. For example, to get help for the feature "perf-profile"::
5162306a36Sopenharmony_ci
5262306a36Sopenharmony_ci# intel-speed-select perf-profile --help
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ciTo get help on a command, another level of help is provided. For example for the command info "info"::
5562306a36Sopenharmony_ci
5662306a36Sopenharmony_ci# intel-speed-select perf-profile info --help
5762306a36Sopenharmony_ci
5862306a36Sopenharmony_ciSummary of platform capability
5962306a36Sopenharmony_ci------------------------------
6062306a36Sopenharmony_ciTo check the current platform and driver capabilities, execute::
6162306a36Sopenharmony_ci
6262306a36Sopenharmony_ci#intel-speed-select --info
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ciFor example on a test system::
6562306a36Sopenharmony_ci
6662306a36Sopenharmony_ci # intel-speed-select --info
6762306a36Sopenharmony_ci Intel(R) Speed Select Technology
6862306a36Sopenharmony_ci Executing on CPU model: X
6962306a36Sopenharmony_ci Platform: API version : 1
7062306a36Sopenharmony_ci Platform: Driver version : 1
7162306a36Sopenharmony_ci Platform: mbox supported : 1
7262306a36Sopenharmony_ci Platform: mmio supported : 1
7362306a36Sopenharmony_ci Intel(R) SST-PP (feature perf-profile) is supported
7462306a36Sopenharmony_ci TDP level change control is unlocked, max level: 4
7562306a36Sopenharmony_ci Intel(R) SST-TF (feature turbo-freq) is supported
7662306a36Sopenharmony_ci Intel(R) SST-BF (feature base-freq) is not supported
7762306a36Sopenharmony_ci Intel(R) SST-CP (feature core-power) is supported
7862306a36Sopenharmony_ci
7962306a36Sopenharmony_ciIntel(R) Speed Select Technology - Performance Profile (Intel(R) SST-PP)
8062306a36Sopenharmony_ci------------------------------------------------------------------------
8162306a36Sopenharmony_ci
8262306a36Sopenharmony_ciThis feature allows configuration of a server dynamically based on workload
8362306a36Sopenharmony_ciperformance requirements. This helps users during deployment as they do not have
8462306a36Sopenharmony_cito choose a specific server configuration statically.  This Intel(R) Speed Select
8562306a36Sopenharmony_ciTechnology - Performance Profile (Intel(R) SST-PP) feature introduces a mechanism
8662306a36Sopenharmony_cithat allows multiple optimized performance profiles per system. Each profile
8762306a36Sopenharmony_cidefines a set of CPUs that need to be online and rest offline to sustain a
8862306a36Sopenharmony_ciguaranteed base frequency. Once the user issues a command to use a specific
8962306a36Sopenharmony_ciperformance profile and meet CPU online/offline requirement, the user can expect
9062306a36Sopenharmony_cia change in the base frequency dynamically. This feature is called
9162306a36Sopenharmony_ci"perf-profile" when using the Intel Speed Select tool.
9262306a36Sopenharmony_ci
9362306a36Sopenharmony_ciNumber or performance levels
9462306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9562306a36Sopenharmony_ci
9662306a36Sopenharmony_ciThere can be multiple performance profiles on a system. To get the number of
9762306a36Sopenharmony_ciprofiles, execute the command below::
9862306a36Sopenharmony_ci
9962306a36Sopenharmony_ci # intel-speed-select perf-profile get-config-levels
10062306a36Sopenharmony_ci Intel(R) Speed Select Technology
10162306a36Sopenharmony_ci Executing on CPU model: X
10262306a36Sopenharmony_ci package-0
10362306a36Sopenharmony_ci  die-0
10462306a36Sopenharmony_ci    cpu-0
10562306a36Sopenharmony_ci        get-config-levels:4
10662306a36Sopenharmony_ci package-1
10762306a36Sopenharmony_ci  die-0
10862306a36Sopenharmony_ci    cpu-14
10962306a36Sopenharmony_ci        get-config-levels:4
11062306a36Sopenharmony_ci
11162306a36Sopenharmony_ciOn this system under test, there are 4 performance profiles in addition to the
11262306a36Sopenharmony_cibase performance profile (which is performance level 0).
11362306a36Sopenharmony_ci
11462306a36Sopenharmony_ciLock/Unlock status
11562306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~
11662306a36Sopenharmony_ci
11762306a36Sopenharmony_ciEven if there are multiple performance profiles, it is possible that they
11862306a36Sopenharmony_ciare locked. If they are locked, users cannot issue a command to change the
11962306a36Sopenharmony_ciperformance state. It is possible that there is a BIOS setup to unlock or check
12062306a36Sopenharmony_ciwith your system vendor.
12162306a36Sopenharmony_ci
12262306a36Sopenharmony_ciTo check if the system is locked, execute the following command::
12362306a36Sopenharmony_ci
12462306a36Sopenharmony_ci # intel-speed-select perf-profile get-lock-status
12562306a36Sopenharmony_ci Intel(R) Speed Select Technology
12662306a36Sopenharmony_ci Executing on CPU model: X
12762306a36Sopenharmony_ci package-0
12862306a36Sopenharmony_ci  die-0
12962306a36Sopenharmony_ci    cpu-0
13062306a36Sopenharmony_ci        get-lock-status:0
13162306a36Sopenharmony_ci package-1
13262306a36Sopenharmony_ci  die-0
13362306a36Sopenharmony_ci    cpu-14
13462306a36Sopenharmony_ci        get-lock-status:0
13562306a36Sopenharmony_ci
13662306a36Sopenharmony_ciIn this case, lock status is 0, which means that the system is unlocked.
13762306a36Sopenharmony_ci
13862306a36Sopenharmony_ciProperties of a performance level
13962306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14062306a36Sopenharmony_ci
14162306a36Sopenharmony_ciTo get properties of a specific performance level (For example for the level 0, below), execute the command below::
14262306a36Sopenharmony_ci
14362306a36Sopenharmony_ci # intel-speed-select perf-profile info -l 0
14462306a36Sopenharmony_ci Intel(R) Speed Select Technology
14562306a36Sopenharmony_ci Executing on CPU model: X
14662306a36Sopenharmony_ci package-0
14762306a36Sopenharmony_ci  die-0
14862306a36Sopenharmony_ci    cpu-0
14962306a36Sopenharmony_ci      perf-profile-level-0
15062306a36Sopenharmony_ci        cpu-count:28
15162306a36Sopenharmony_ci        enable-cpu-mask:000003ff,f0003fff
15262306a36Sopenharmony_ci        enable-cpu-list:0,1,2,3,4,5,6,7,8,9,10,11,12,13,28,29,30,31,32,33,34,35,36,37,38,39,40,41
15362306a36Sopenharmony_ci        thermal-design-power-ratio:26
15462306a36Sopenharmony_ci        base-frequency(MHz):2600
15562306a36Sopenharmony_ci        speed-select-turbo-freq:disabled
15662306a36Sopenharmony_ci        speed-select-base-freq:disabled
15762306a36Sopenharmony_ci	...
15862306a36Sopenharmony_ci	...
15962306a36Sopenharmony_ci
16062306a36Sopenharmony_ciHere -l option is used to specify a performance level.
16162306a36Sopenharmony_ci
16262306a36Sopenharmony_ciIf the option -l is omitted, then this command will print information about all
16362306a36Sopenharmony_cithe performance levels. The above command is printing properties of the
16462306a36Sopenharmony_ciperformance level 0.
16562306a36Sopenharmony_ci
16662306a36Sopenharmony_ciFor this performance profile, the list of CPUs displayed by the
16762306a36Sopenharmony_ci"enable-cpu-mask/enable-cpu-list" at the max can be "online." When that
16862306a36Sopenharmony_cicondition is met, then base frequency of 2600 MHz can be maintained. To
16962306a36Sopenharmony_ciunderstand more, execute "intel-speed-select perf-profile info" for performance
17062306a36Sopenharmony_cilevel 4::
17162306a36Sopenharmony_ci
17262306a36Sopenharmony_ci # intel-speed-select perf-profile info -l 4
17362306a36Sopenharmony_ci Intel(R) Speed Select Technology
17462306a36Sopenharmony_ci Executing on CPU model: X
17562306a36Sopenharmony_ci package-0
17662306a36Sopenharmony_ci  die-0
17762306a36Sopenharmony_ci    cpu-0
17862306a36Sopenharmony_ci      perf-profile-level-4
17962306a36Sopenharmony_ci        cpu-count:28
18062306a36Sopenharmony_ci        enable-cpu-mask:000000fa,f0000faf
18162306a36Sopenharmony_ci        enable-cpu-list:0,1,2,3,5,7,8,9,10,11,28,29,30,31,33,35,36,37,38,39
18262306a36Sopenharmony_ci        thermal-design-power-ratio:28
18362306a36Sopenharmony_ci        base-frequency(MHz):2800
18462306a36Sopenharmony_ci        speed-select-turbo-freq:disabled
18562306a36Sopenharmony_ci        speed-select-base-freq:unsupported
18662306a36Sopenharmony_ci	...
18762306a36Sopenharmony_ci	...
18862306a36Sopenharmony_ci
18962306a36Sopenharmony_ciThere are fewer CPUs in the "enable-cpu-mask/enable-cpu-list". Consequently, if
19062306a36Sopenharmony_cithe user only keeps these CPUs online and the rest "offline," then the base
19162306a36Sopenharmony_cifrequency is increased to 2.8 GHz compared to 2.6 GHz at performance level 0.
19262306a36Sopenharmony_ci
19362306a36Sopenharmony_ciGet current performance level
19462306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
19562306a36Sopenharmony_ci
19662306a36Sopenharmony_ciTo get the current performance level, execute::
19762306a36Sopenharmony_ci
19862306a36Sopenharmony_ci # intel-speed-select perf-profile get-config-current-level
19962306a36Sopenharmony_ci Intel(R) Speed Select Technology
20062306a36Sopenharmony_ci Executing on CPU model: X
20162306a36Sopenharmony_ci package-0
20262306a36Sopenharmony_ci  die-0
20362306a36Sopenharmony_ci    cpu-0
20462306a36Sopenharmony_ci        get-config-current_level:0
20562306a36Sopenharmony_ci
20662306a36Sopenharmony_ciFirst verify that the base_frequency displayed by the cpufreq sysfs is correct::
20762306a36Sopenharmony_ci
20862306a36Sopenharmony_ci # cat /sys/devices/system/cpu/cpu0/cpufreq/base_frequency
20962306a36Sopenharmony_ci 2600000
21062306a36Sopenharmony_ci
21162306a36Sopenharmony_ciThis matches the base-frequency (MHz) field value displayed from the
21262306a36Sopenharmony_ci"perf-profile info" command for performance level 0(cpufreq frequency is in
21362306a36Sopenharmony_ciKHz).
21462306a36Sopenharmony_ci
21562306a36Sopenharmony_ciTo check if the average frequency is equal to the base frequency for a 100% busy
21662306a36Sopenharmony_ciworkload, disable turbo::
21762306a36Sopenharmony_ci
21862306a36Sopenharmony_ci# echo 1 > /sys/devices/system/cpu/intel_pstate/no_turbo
21962306a36Sopenharmony_ci
22062306a36Sopenharmony_ciThen runs a busy workload on all CPUs, for example::
22162306a36Sopenharmony_ci
22262306a36Sopenharmony_ci#stress -c 64
22362306a36Sopenharmony_ci
22462306a36Sopenharmony_ciTo verify the base frequency, run turbostat::
22562306a36Sopenharmony_ci
22662306a36Sopenharmony_ci #turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
22762306a36Sopenharmony_ci
22862306a36Sopenharmony_ci  Package	Core	CPU	Bzy_MHz
22962306a36Sopenharmony_ci		-	-	2600
23062306a36Sopenharmony_ci  0		0	0	2600
23162306a36Sopenharmony_ci  0		1	1	2600
23262306a36Sopenharmony_ci  0		2	2	2600
23362306a36Sopenharmony_ci  0		3	3	2600
23462306a36Sopenharmony_ci  0		4	4	2600
23562306a36Sopenharmony_ci  .		.	.	.
23662306a36Sopenharmony_ci
23762306a36Sopenharmony_ci
23862306a36Sopenharmony_ciChanging performance level
23962306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24062306a36Sopenharmony_ci
24162306a36Sopenharmony_ciTo the change the performance level to 4, execute::
24262306a36Sopenharmony_ci
24362306a36Sopenharmony_ci # intel-speed-select -d perf-profile set-config-level -l 4 -o
24462306a36Sopenharmony_ci Intel(R) Speed Select Technology
24562306a36Sopenharmony_ci Executing on CPU model: X
24662306a36Sopenharmony_ci package-0
24762306a36Sopenharmony_ci  die-0
24862306a36Sopenharmony_ci    cpu-0
24962306a36Sopenharmony_ci      perf-profile
25062306a36Sopenharmony_ci        set_tdp_level:success
25162306a36Sopenharmony_ci
25262306a36Sopenharmony_ciIn the command above, "-o" is optional. If it is specified, then it will also
25362306a36Sopenharmony_cioffline CPUs which are not present in the enable_cpu_mask for this performance
25462306a36Sopenharmony_cilevel.
25562306a36Sopenharmony_ci
25662306a36Sopenharmony_ciNow if the base_frequency is checked::
25762306a36Sopenharmony_ci
25862306a36Sopenharmony_ci #cat /sys/devices/system/cpu/cpu0/cpufreq/base_frequency
25962306a36Sopenharmony_ci 2800000
26062306a36Sopenharmony_ci
26162306a36Sopenharmony_ciWhich shows that the base frequency now increased from 2600 MHz at performance
26262306a36Sopenharmony_cilevel 0 to 2800 MHz at performance level 4. As a result, any workload, which can
26362306a36Sopenharmony_ciuse fewer CPUs, can see a boost of 200 MHz compared to performance level 0.
26462306a36Sopenharmony_ci
26562306a36Sopenharmony_ciChanging performance level via BMC Interface
26662306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26762306a36Sopenharmony_ci
26862306a36Sopenharmony_ciIt is possible to change SST-PP level using out of band (OOB) agent (Via some
26962306a36Sopenharmony_ciremote management console, through BMC "Baseboard Management Controller"
27062306a36Sopenharmony_ciinterface). This mode is supported from the Sapphire Rapids processor
27162306a36Sopenharmony_cigeneration. The kernel and tool change to support this mode is added to Linux
27262306a36Sopenharmony_cikernel version 5.18. To enable this feature, kernel config
27362306a36Sopenharmony_ci"CONFIG_INTEL_HFI_THERMAL" is required. The minimum version of the tool
27462306a36Sopenharmony_ciis "v1.12" to support this feature, which is part of Linux kernel version 5.18.
27562306a36Sopenharmony_ci
27662306a36Sopenharmony_ciTo support such configuration, this tool can be used as a daemon. Add
27762306a36Sopenharmony_cia command line option --oob::
27862306a36Sopenharmony_ci
27962306a36Sopenharmony_ci # intel-speed-select --oob
28062306a36Sopenharmony_ci Intel(R) Speed Select Technology
28162306a36Sopenharmony_ci Executing on CPU model:143[0x8f]
28262306a36Sopenharmony_ci OOB mode is enabled and will run as daemon
28362306a36Sopenharmony_ci
28462306a36Sopenharmony_ciIn this mode the tool will online/offline CPUs based on the new performance
28562306a36Sopenharmony_cilevel.
28662306a36Sopenharmony_ci
28762306a36Sopenharmony_ciCheck presence of other Intel(R) SST features
28862306a36Sopenharmony_ci---------------------------------------------
28962306a36Sopenharmony_ci
29062306a36Sopenharmony_ciEach of the performance profiles also specifies weather there is support of
29162306a36Sopenharmony_ciother two Intel(R) SST features (Intel(R) Speed Select Technology - Base Frequency
29262306a36Sopenharmony_ci(Intel(R) SST-BF) and Intel(R) Speed Select Technology - Turbo Frequency (Intel
29362306a36Sopenharmony_ciSST-TF)).
29462306a36Sopenharmony_ci
29562306a36Sopenharmony_ciFor example, from the output of "perf-profile info" above, for level 0 and level
29662306a36Sopenharmony_ci4:
29762306a36Sopenharmony_ci
29862306a36Sopenharmony_ciFor level 0::
29962306a36Sopenharmony_ci       speed-select-turbo-freq:disabled
30062306a36Sopenharmony_ci       speed-select-base-freq:disabled
30162306a36Sopenharmony_ci
30262306a36Sopenharmony_ciFor level 4::
30362306a36Sopenharmony_ci       speed-select-turbo-freq:disabled
30462306a36Sopenharmony_ci       speed-select-base-freq:unsupported
30562306a36Sopenharmony_ci
30662306a36Sopenharmony_ciGiven these results, the "speed-select-base-freq" (Intel(R) SST-BF) in level 4
30762306a36Sopenharmony_cichanged from "disabled" to "unsupported" compared to performance level 0.
30862306a36Sopenharmony_ci
30962306a36Sopenharmony_ciThis means that at performance level 4, the "speed-select-base-freq" feature is
31062306a36Sopenharmony_cinot supported. However, at performance level 0, this feature is "supported", but
31162306a36Sopenharmony_cicurrently "disabled", meaning the user has not activated this feature. Whereas
31262306a36Sopenharmony_ci"speed-select-turbo-freq" (Intel(R) SST-TF) is supported at both performance
31362306a36Sopenharmony_cilevels, but currently not activated by the user.
31462306a36Sopenharmony_ci
31562306a36Sopenharmony_ciThe Intel(R) SST-BF and the Intel(R) SST-TF features are built on a foundation
31662306a36Sopenharmony_citechnology called Intel(R) Speed Select Technology - Core Power (Intel(R) SST-CP).
31762306a36Sopenharmony_ciThe platform firmware enables this feature when Intel(R) SST-BF or Intel(R) SST-TF
31862306a36Sopenharmony_ciis supported on a platform.
31962306a36Sopenharmony_ci
32062306a36Sopenharmony_ciIntel(R) Speed Select Technology Core Power (Intel(R) SST-CP)
32162306a36Sopenharmony_ci---------------------------------------------------------------
32262306a36Sopenharmony_ci
32362306a36Sopenharmony_ciIntel(R) Speed Select Technology Core Power (Intel(R) SST-CP) is an interface that
32462306a36Sopenharmony_ciallows users to define per core priority. This defines a mechanism to distribute
32562306a36Sopenharmony_cipower among cores when there is a power constrained scenario. This defines a
32662306a36Sopenharmony_ciclass of service (CLOS) configuration.
32762306a36Sopenharmony_ci
32862306a36Sopenharmony_ciThe user can configure up to 4 class of service configurations. Each CLOS group
32962306a36Sopenharmony_ciconfiguration allows definitions of parameters, which affects how the frequency
33062306a36Sopenharmony_cican be limited and power is distributed. Each CPU core can be tied to a class of
33162306a36Sopenharmony_ciservice and hence an associated priority. The granularity is at core level not
33262306a36Sopenharmony_ciat per CPU level.
33362306a36Sopenharmony_ci
33462306a36Sopenharmony_ciEnable CLOS based prioritization
33562306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
33662306a36Sopenharmony_ci
33762306a36Sopenharmony_ciTo use CLOS based prioritization feature, firmware must be informed to enable
33862306a36Sopenharmony_ciand use a priority type. There is a default per platform priority type, which
33962306a36Sopenharmony_cican be changed with optional command line parameter.
34062306a36Sopenharmony_ci
34162306a36Sopenharmony_ciTo enable and check the options, execute::
34262306a36Sopenharmony_ci
34362306a36Sopenharmony_ci # intel-speed-select core-power enable --help
34462306a36Sopenharmony_ci Intel(R) Speed Select Technology
34562306a36Sopenharmony_ci Executing on CPU model: X
34662306a36Sopenharmony_ci Enable core-power for a package/die
34762306a36Sopenharmony_ci	Clos Enable: Specify priority type with [--priority|-p]
34862306a36Sopenharmony_ci		 0: Proportional, 1: Ordered
34962306a36Sopenharmony_ci
35062306a36Sopenharmony_ciThere are two types of priority types:
35162306a36Sopenharmony_ci
35262306a36Sopenharmony_ci- Ordered
35362306a36Sopenharmony_ci
35462306a36Sopenharmony_ciPriority for ordered throttling is defined based on the index of the assigned
35562306a36Sopenharmony_ciCLOS group. Where CLOS0 gets highest priority (throttled last).
35662306a36Sopenharmony_ci
35762306a36Sopenharmony_ciPriority order is:
35862306a36Sopenharmony_ciCLOS0 > CLOS1 > CLOS2 > CLOS3.
35962306a36Sopenharmony_ci
36062306a36Sopenharmony_ci- Proportional
36162306a36Sopenharmony_ci
36262306a36Sopenharmony_ciWhen proportional priority is used, there is an additional parameter called
36362306a36Sopenharmony_cifrequency_weight, which can be specified per CLOS group. The goal of
36462306a36Sopenharmony_ciproportional priority is to provide each core with the requested min., then
36562306a36Sopenharmony_cidistribute all remaining (excess/deficit) budgets in proportion to a defined
36662306a36Sopenharmony_ciweight. This proportional priority can be configured using "core-power config"
36762306a36Sopenharmony_cicommand.
36862306a36Sopenharmony_ci
36962306a36Sopenharmony_ciTo enable with the platform default priority type, execute::
37062306a36Sopenharmony_ci
37162306a36Sopenharmony_ci # intel-speed-select core-power enable
37262306a36Sopenharmony_ci Intel(R) Speed Select Technology
37362306a36Sopenharmony_ci Executing on CPU model: X
37462306a36Sopenharmony_ci package-0
37562306a36Sopenharmony_ci  die-0
37662306a36Sopenharmony_ci    cpu-0
37762306a36Sopenharmony_ci      core-power
37862306a36Sopenharmony_ci        enable:success
37962306a36Sopenharmony_ci package-1
38062306a36Sopenharmony_ci  die-0
38162306a36Sopenharmony_ci    cpu-6
38262306a36Sopenharmony_ci      core-power
38362306a36Sopenharmony_ci        enable:success
38462306a36Sopenharmony_ci
38562306a36Sopenharmony_ciThe scope of this enable is per package or die scoped when a package contains
38662306a36Sopenharmony_cimultiple dies. To check if CLOS is enabled and get priority type, "core-power
38762306a36Sopenharmony_ciinfo" command can be used. For example to check the status of core-power feature
38862306a36Sopenharmony_cion CPU 0, execute::
38962306a36Sopenharmony_ci
39062306a36Sopenharmony_ci # intel-speed-select -c 0 core-power info
39162306a36Sopenharmony_ci Intel(R) Speed Select Technology
39262306a36Sopenharmony_ci Executing on CPU model: X
39362306a36Sopenharmony_ci package-0
39462306a36Sopenharmony_ci  die-0
39562306a36Sopenharmony_ci    cpu-0
39662306a36Sopenharmony_ci      core-power
39762306a36Sopenharmony_ci        support-status:supported
39862306a36Sopenharmony_ci        enable-status:enabled
39962306a36Sopenharmony_ci        clos-enable-status:enabled
40062306a36Sopenharmony_ci        priority-type:proportional
40162306a36Sopenharmony_ci package-1
40262306a36Sopenharmony_ci  die-0
40362306a36Sopenharmony_ci    cpu-24
40462306a36Sopenharmony_ci      core-power
40562306a36Sopenharmony_ci        support-status:supported
40662306a36Sopenharmony_ci        enable-status:enabled
40762306a36Sopenharmony_ci        clos-enable-status:enabled
40862306a36Sopenharmony_ci        priority-type:proportional
40962306a36Sopenharmony_ci
41062306a36Sopenharmony_ciConfiguring CLOS groups
41162306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~
41262306a36Sopenharmony_ci
41362306a36Sopenharmony_ciEach CLOS group has its own attributes including min, max, freq_weight and
41462306a36Sopenharmony_cidesired. These parameters can be configured with "core-power config" command.
41562306a36Sopenharmony_ciDefaults will be used if user skips setting a parameter except clos id, which is
41662306a36Sopenharmony_cimandatory. To check core-power config options, execute::
41762306a36Sopenharmony_ci
41862306a36Sopenharmony_ci # intel-speed-select core-power config --help
41962306a36Sopenharmony_ci Intel(R) Speed Select Technology
42062306a36Sopenharmony_ci Executing on CPU model: X
42162306a36Sopenharmony_ci Set core-power configuration for one of the four clos ids
42262306a36Sopenharmony_ci	Specify targeted clos id with [--clos|-c]
42362306a36Sopenharmony_ci	Specify clos Proportional Priority [--weight|-w]
42462306a36Sopenharmony_ci	Specify clos min in MHz with [--min|-n]
42562306a36Sopenharmony_ci	Specify clos max in MHz with [--max|-m]
42662306a36Sopenharmony_ci
42762306a36Sopenharmony_ciFor example::
42862306a36Sopenharmony_ci
42962306a36Sopenharmony_ci # intel-speed-select core-power config -c 0
43062306a36Sopenharmony_ci Intel(R) Speed Select Technology
43162306a36Sopenharmony_ci Executing on CPU model: X
43262306a36Sopenharmony_ci clos epp is not specified, default: 0
43362306a36Sopenharmony_ci clos frequency weight is not specified, default: 0
43462306a36Sopenharmony_ci clos min is not specified, default: 0 MHz
43562306a36Sopenharmony_ci clos max is not specified, default: 25500 MHz
43662306a36Sopenharmony_ci clos desired is not specified, default: 0
43762306a36Sopenharmony_ci package-0
43862306a36Sopenharmony_ci  die-0
43962306a36Sopenharmony_ci    cpu-0
44062306a36Sopenharmony_ci      core-power
44162306a36Sopenharmony_ci        config:success
44262306a36Sopenharmony_ci package-1
44362306a36Sopenharmony_ci  die-0
44462306a36Sopenharmony_ci    cpu-6
44562306a36Sopenharmony_ci      core-power
44662306a36Sopenharmony_ci        config:success
44762306a36Sopenharmony_ci
44862306a36Sopenharmony_ciThe user has the option to change defaults. For example, the user can change the
44962306a36Sopenharmony_ci"min" and set the base frequency to always get guaranteed base frequency.
45062306a36Sopenharmony_ci
45162306a36Sopenharmony_ciGet the current CLOS configuration
45262306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
45362306a36Sopenharmony_ci
45462306a36Sopenharmony_ciTo check the current configuration, "core-power get-config" can be used. For
45562306a36Sopenharmony_ciexample, to get the configuration of CLOS 0::
45662306a36Sopenharmony_ci
45762306a36Sopenharmony_ci # intel-speed-select core-power get-config -c 0
45862306a36Sopenharmony_ci Intel(R) Speed Select Technology
45962306a36Sopenharmony_ci Executing on CPU model: X
46062306a36Sopenharmony_ci package-0
46162306a36Sopenharmony_ci  die-0
46262306a36Sopenharmony_ci    cpu-0
46362306a36Sopenharmony_ci      core-power
46462306a36Sopenharmony_ci        clos:0
46562306a36Sopenharmony_ci        epp:0
46662306a36Sopenharmony_ci        clos-proportional-priority:0
46762306a36Sopenharmony_ci        clos-min:0 MHz
46862306a36Sopenharmony_ci        clos-max:Max Turbo frequency
46962306a36Sopenharmony_ci        clos-desired:0 MHz
47062306a36Sopenharmony_ci package-1
47162306a36Sopenharmony_ci  die-0
47262306a36Sopenharmony_ci    cpu-24
47362306a36Sopenharmony_ci      core-power
47462306a36Sopenharmony_ci        clos:0
47562306a36Sopenharmony_ci        epp:0
47662306a36Sopenharmony_ci        clos-proportional-priority:0
47762306a36Sopenharmony_ci        clos-min:0 MHz
47862306a36Sopenharmony_ci        clos-max:Max Turbo frequency
47962306a36Sopenharmony_ci        clos-desired:0 MHz
48062306a36Sopenharmony_ci
48162306a36Sopenharmony_ciAssociating a CPU with a CLOS group
48262306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
48362306a36Sopenharmony_ci
48462306a36Sopenharmony_ciTo associate a CPU to a CLOS group "core-power assoc" command can be used::
48562306a36Sopenharmony_ci
48662306a36Sopenharmony_ci # intel-speed-select core-power assoc --help
48762306a36Sopenharmony_ci Intel(R) Speed Select Technology
48862306a36Sopenharmony_ci Executing on CPU model: X
48962306a36Sopenharmony_ci Associate a clos id to a CPU
49062306a36Sopenharmony_ci	Specify targeted clos id with [--clos|-c]
49162306a36Sopenharmony_ci
49262306a36Sopenharmony_ci
49362306a36Sopenharmony_ciFor example to associate CPU 10 to CLOS group 3, execute::
49462306a36Sopenharmony_ci
49562306a36Sopenharmony_ci # intel-speed-select -c 10 core-power assoc -c 3
49662306a36Sopenharmony_ci Intel(R) Speed Select Technology
49762306a36Sopenharmony_ci Executing on CPU model: X
49862306a36Sopenharmony_ci package-0
49962306a36Sopenharmony_ci  die-0
50062306a36Sopenharmony_ci    cpu-10
50162306a36Sopenharmony_ci      core-power
50262306a36Sopenharmony_ci        assoc:success
50362306a36Sopenharmony_ci
50462306a36Sopenharmony_ciOnce a CPU is associated, its sibling CPUs are also associated to a CLOS group.
50562306a36Sopenharmony_ciOnce associated, avoid changing Linux "cpufreq" subsystem scaling frequency
50662306a36Sopenharmony_cilimits.
50762306a36Sopenharmony_ci
50862306a36Sopenharmony_ciTo check the existing association for a CPU, "core-power get-assoc" command can
50962306a36Sopenharmony_cibe used. For example, to get association of CPU 10, execute::
51062306a36Sopenharmony_ci
51162306a36Sopenharmony_ci # intel-speed-select -c 10 core-power get-assoc
51262306a36Sopenharmony_ci Intel(R) Speed Select Technology
51362306a36Sopenharmony_ci Executing on CPU model: X
51462306a36Sopenharmony_ci package-1
51562306a36Sopenharmony_ci  die-0
51662306a36Sopenharmony_ci    cpu-10
51762306a36Sopenharmony_ci      get-assoc
51862306a36Sopenharmony_ci        clos:3
51962306a36Sopenharmony_ci
52062306a36Sopenharmony_ciThis shows that CPU 10 is part of a CLOS group 3.
52162306a36Sopenharmony_ci
52262306a36Sopenharmony_ci
52362306a36Sopenharmony_ciDisable CLOS based prioritization
52462306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
52562306a36Sopenharmony_ci
52662306a36Sopenharmony_ciTo disable, execute::
52762306a36Sopenharmony_ci
52862306a36Sopenharmony_ci# intel-speed-select core-power disable
52962306a36Sopenharmony_ci
53062306a36Sopenharmony_ciSome features like Intel(R) SST-TF can only be enabled when CLOS based prioritization
53162306a36Sopenharmony_ciis enabled. For this reason, disabling while Intel(R) SST-TF is enabled can cause
53262306a36Sopenharmony_ciIntel(R) SST-TF to fail. This will cause the "disable" command to display an error
53362306a36Sopenharmony_ciif Intel(R) SST-TF is already enabled. In turn, to disable, the Intel(R) SST-TF
53462306a36Sopenharmony_cifeature must be disabled first.
53562306a36Sopenharmony_ci
53662306a36Sopenharmony_ciIntel(R) Speed Select Technology - Base Frequency (Intel(R) SST-BF)
53762306a36Sopenharmony_ci-------------------------------------------------------------------
53862306a36Sopenharmony_ci
53962306a36Sopenharmony_ciThe Intel(R) Speed Select Technology - Base Frequency (Intel(R) SST-BF) feature lets
54062306a36Sopenharmony_cithe user control base frequency. If some critical workload threads demand
54162306a36Sopenharmony_ciconstant high guaranteed performance, then this feature can be used to execute
54262306a36Sopenharmony_cithe thread at higher base frequency on specific sets of CPUs (high priority
54362306a36Sopenharmony_ciCPUs) at the cost of lower base frequency (low priority CPUs) on other CPUs.
54462306a36Sopenharmony_ciThis feature does not require offline of the low priority CPUs.
54562306a36Sopenharmony_ci
54662306a36Sopenharmony_ciThe support of Intel(R) SST-BF depends on the Intel(R) Speed Select Technology -
54762306a36Sopenharmony_ciPerformance Profile (Intel(R) SST-PP) performance level configuration. It is
54862306a36Sopenharmony_cipossible that only certain performance levels support Intel(R) SST-BF. It is also
54962306a36Sopenharmony_cipossible that only base performance level (level = 0) has support of Intel
55062306a36Sopenharmony_ciSST-BF. Consequently, first select the desired performance level to enable this
55162306a36Sopenharmony_cifeature.
55262306a36Sopenharmony_ci
55362306a36Sopenharmony_ciIn the system under test here, Intel(R) SST-BF is supported at the base
55462306a36Sopenharmony_ciperformance level 0, but currently disabled. For example for the level 0::
55562306a36Sopenharmony_ci
55662306a36Sopenharmony_ci # intel-speed-select -c 0 perf-profile info -l 0
55762306a36Sopenharmony_ci Intel(R) Speed Select Technology
55862306a36Sopenharmony_ci Executing on CPU model: X
55962306a36Sopenharmony_ci package-0
56062306a36Sopenharmony_ci  die-0
56162306a36Sopenharmony_ci    cpu-0
56262306a36Sopenharmony_ci      perf-profile-level-0
56362306a36Sopenharmony_ci        ...
56462306a36Sopenharmony_ci
56562306a36Sopenharmony_ci        speed-select-base-freq:disabled
56662306a36Sopenharmony_ci	...
56762306a36Sopenharmony_ci
56862306a36Sopenharmony_ciBefore enabling Intel(R) SST-BF and measuring its impact on a workload
56962306a36Sopenharmony_ciperformance, execute some workload and measure performance and get a baseline
57062306a36Sopenharmony_ciperformance to compare against.
57162306a36Sopenharmony_ci
57262306a36Sopenharmony_ciHere the user wants more guaranteed performance. For this reason, it is likely
57362306a36Sopenharmony_cithat turbo is disabled. To disable turbo, execute::
57462306a36Sopenharmony_ci
57562306a36Sopenharmony_ci#echo 1 > /sys/devices/system/cpu/intel_pstate/no_turbo
57662306a36Sopenharmony_ci
57762306a36Sopenharmony_ciBased on the output of the "intel-speed-select perf-profile info -l 0" base
57862306a36Sopenharmony_cifrequency of guaranteed frequency 2600 MHz.
57962306a36Sopenharmony_ci
58062306a36Sopenharmony_ci
58162306a36Sopenharmony_ciMeasure baseline performance for comparison
58262306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
58362306a36Sopenharmony_ci
58462306a36Sopenharmony_ciTo compare, pick a multi-threaded workload where each thread can be scheduled on
58562306a36Sopenharmony_ciseparate CPUs. "Hackbench pipe" test is a good example on how to improve
58662306a36Sopenharmony_ciperformance using Intel(R) SST-BF.
58762306a36Sopenharmony_ci
58862306a36Sopenharmony_ciBelow, the workload is measuring average scheduler wakeup latency, so a lower
58962306a36Sopenharmony_cinumber means better performance::
59062306a36Sopenharmony_ci
59162306a36Sopenharmony_ci # taskset -c 3,4 perf bench -r 100 sched pipe
59262306a36Sopenharmony_ci # Running 'sched/pipe' benchmark:
59362306a36Sopenharmony_ci # Executed 1000000 pipe operations between two processes
59462306a36Sopenharmony_ci     Total time: 6.102 [sec]
59562306a36Sopenharmony_ci       6.102445 usecs/op
59662306a36Sopenharmony_ci         163868 ops/sec
59762306a36Sopenharmony_ci
59862306a36Sopenharmony_ciWhile running the above test, if we take turbostat output, it will show us that
59962306a36Sopenharmony_ci2 of the CPUs are busy and reaching max. frequency (which would be the base
60062306a36Sopenharmony_cifrequency as the turbo is disabled). The turbostat output::
60162306a36Sopenharmony_ci
60262306a36Sopenharmony_ci #turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
60362306a36Sopenharmony_ci Package	Core	CPU	Bzy_MHz
60462306a36Sopenharmony_ci 0		0	0	1000
60562306a36Sopenharmony_ci 0		1	1	1005
60662306a36Sopenharmony_ci 0		2	2	1000
60762306a36Sopenharmony_ci 0		3	3	2600
60862306a36Sopenharmony_ci 0		4	4	2600
60962306a36Sopenharmony_ci 0		5	5	1000
61062306a36Sopenharmony_ci 0		6	6	1000
61162306a36Sopenharmony_ci 0		7	7	1005
61262306a36Sopenharmony_ci 0		8	8	1005
61362306a36Sopenharmony_ci 0		9	9	1000
61462306a36Sopenharmony_ci 0		10	10	1000
61562306a36Sopenharmony_ci 0		11	11	995
61662306a36Sopenharmony_ci 0		12	12	1000
61762306a36Sopenharmony_ci 0		13	13	1000
61862306a36Sopenharmony_ci
61962306a36Sopenharmony_ciFrom the above turbostat output, both CPU 3 and 4 are very busy and reaching
62062306a36Sopenharmony_cifull guaranteed frequency of 2600 MHz.
62162306a36Sopenharmony_ci
62262306a36Sopenharmony_ciIntel(R) SST-BF Capabilities
62362306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~
62462306a36Sopenharmony_ci
62562306a36Sopenharmony_ciTo get capabilities of Intel(R) SST-BF for the current performance level 0,
62662306a36Sopenharmony_ciexecute::
62762306a36Sopenharmony_ci
62862306a36Sopenharmony_ci # intel-speed-select base-freq info -l 0
62962306a36Sopenharmony_ci Intel(R) Speed Select Technology
63062306a36Sopenharmony_ci Executing on CPU model: X
63162306a36Sopenharmony_ci package-0
63262306a36Sopenharmony_ci  die-0
63362306a36Sopenharmony_ci    cpu-0
63462306a36Sopenharmony_ci      speed-select-base-freq
63562306a36Sopenharmony_ci        high-priority-base-frequency(MHz):3000
63662306a36Sopenharmony_ci        high-priority-cpu-mask:00000216,00002160
63762306a36Sopenharmony_ci        high-priority-cpu-list:5,6,8,13,33,34,36,41
63862306a36Sopenharmony_ci        low-priority-base-frequency(MHz):2400
63962306a36Sopenharmony_ci        tjunction-temperature(C):125
64062306a36Sopenharmony_ci        thermal-design-power(W):205
64162306a36Sopenharmony_ci
64262306a36Sopenharmony_ciThe above capabilities show that there are some CPUs on this system that can
64362306a36Sopenharmony_cioffer base frequency of 3000 MHz compared to the standard base frequency at this
64462306a36Sopenharmony_ciperformance levels. Nevertheless, these CPUs are fixed, and they are presented
64562306a36Sopenharmony_civia high-priority-cpu-list/high-priority-cpu-mask. But if this Intel(R) SST-BF
64662306a36Sopenharmony_cifeature is selected, the low priorities CPUs (which are not in
64762306a36Sopenharmony_cihigh-priority-cpu-list) can only offer up to 2400 MHz. As a result, if this
64862306a36Sopenharmony_ciclipping of low priority CPUs is acceptable, then the user can enable Intel
64962306a36Sopenharmony_ciSST-BF feature particularly for the above "sched pipe" workload since only two
65062306a36Sopenharmony_ciCPUs are used, they can be scheduled on high priority CPUs and can get boost of
65162306a36Sopenharmony_ci400 MHz.
65262306a36Sopenharmony_ci
65362306a36Sopenharmony_ciEnable Intel(R) SST-BF
65462306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~
65562306a36Sopenharmony_ci
65662306a36Sopenharmony_ciTo enable Intel(R) SST-BF feature, execute::
65762306a36Sopenharmony_ci
65862306a36Sopenharmony_ci # intel-speed-select base-freq enable -a
65962306a36Sopenharmony_ci Intel(R) Speed Select Technology
66062306a36Sopenharmony_ci Executing on CPU model: X
66162306a36Sopenharmony_ci package-0
66262306a36Sopenharmony_ci  die-0
66362306a36Sopenharmony_ci    cpu-0
66462306a36Sopenharmony_ci      base-freq
66562306a36Sopenharmony_ci        enable:success
66662306a36Sopenharmony_ci package-1
66762306a36Sopenharmony_ci  die-0
66862306a36Sopenharmony_ci    cpu-14
66962306a36Sopenharmony_ci      base-freq
67062306a36Sopenharmony_ci        enable:success
67162306a36Sopenharmony_ci
67262306a36Sopenharmony_ciIn this case, -a option is optional. This not only enables Intel(R) SST-BF, but it
67362306a36Sopenharmony_cialso adjusts the priority of cores using Intel(R) Speed Select Technology Core
67462306a36Sopenharmony_ciPower (Intel(R) SST-CP) features. This option sets the minimum performance of each
67562306a36Sopenharmony_ciIntel(R) Speed Select Technology - Performance Profile (Intel(R) SST-PP) class to
67662306a36Sopenharmony_cimaximum performance so that the hardware will give maximum performance possible
67762306a36Sopenharmony_cifor each CPU.
67862306a36Sopenharmony_ci
67962306a36Sopenharmony_ciIf -a option is not used, then the following steps are required before enabling
68062306a36Sopenharmony_ciIntel(R) SST-BF:
68162306a36Sopenharmony_ci
68262306a36Sopenharmony_ci- Discover Intel(R) SST-BF and note low and high priority base frequency
68362306a36Sopenharmony_ci- Note the high priority CPU list
68462306a36Sopenharmony_ci- Enable CLOS using core-power feature set
68562306a36Sopenharmony_ci- Configure CLOS parameters. Use CLOS.min to set to minimum performance
68662306a36Sopenharmony_ci- Subscribe desired CPUs to CLOS groups
68762306a36Sopenharmony_ci
68862306a36Sopenharmony_ciWith this configuration, if the same workload is executed by pinning the
68962306a36Sopenharmony_ciworkload to high priority CPUs (CPU 5 and 6 in this case)::
69062306a36Sopenharmony_ci
69162306a36Sopenharmony_ci #taskset -c 5,6 perf bench -r 100 sched pipe
69262306a36Sopenharmony_ci # Running 'sched/pipe' benchmark:
69362306a36Sopenharmony_ci # Executed 1000000 pipe operations between two processes
69462306a36Sopenharmony_ci     Total time: 5.627 [sec]
69562306a36Sopenharmony_ci       5.627922 usecs/op
69662306a36Sopenharmony_ci         177685 ops/sec
69762306a36Sopenharmony_ci
69862306a36Sopenharmony_ciThis way, by enabling Intel(R) SST-BF, the performance of this benchmark is
69962306a36Sopenharmony_ciimproved (latency reduced) by 7.79%. From the turbostat output, it can be
70062306a36Sopenharmony_ciobserved that the high priority CPUs reached 3000 MHz compared to 2600 MHz.
70162306a36Sopenharmony_ciThe turbostat output::
70262306a36Sopenharmony_ci
70362306a36Sopenharmony_ci #turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
70462306a36Sopenharmony_ci Package	Core	CPU	Bzy_MHz
70562306a36Sopenharmony_ci 0		0	0	2151
70662306a36Sopenharmony_ci 0		1	1	2166
70762306a36Sopenharmony_ci 0		2	2	2175
70862306a36Sopenharmony_ci 0		3	3	2175
70962306a36Sopenharmony_ci 0		4	4	2175
71062306a36Sopenharmony_ci 0		5	5	3000
71162306a36Sopenharmony_ci 0		6	6	3000
71262306a36Sopenharmony_ci 0		7	7	2180
71362306a36Sopenharmony_ci 0		8	8	2662
71462306a36Sopenharmony_ci 0		9	9	2176
71562306a36Sopenharmony_ci 0		10	10	2175
71662306a36Sopenharmony_ci 0		11	11	2176
71762306a36Sopenharmony_ci 0		12	12	2176
71862306a36Sopenharmony_ci 0		13	13	2661
71962306a36Sopenharmony_ci
72062306a36Sopenharmony_ciDisable Intel(R) SST-BF
72162306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~
72262306a36Sopenharmony_ci
72362306a36Sopenharmony_ciTo disable the Intel(R) SST-BF feature, execute::
72462306a36Sopenharmony_ci
72562306a36Sopenharmony_ci# intel-speed-select base-freq disable -a
72662306a36Sopenharmony_ci
72762306a36Sopenharmony_ci
72862306a36Sopenharmony_ciIntel(R) Speed Select Technology - Turbo Frequency (Intel(R) SST-TF)
72962306a36Sopenharmony_ci--------------------------------------------------------------------
73062306a36Sopenharmony_ci
73162306a36Sopenharmony_ciThis feature enables the ability to set different "All core turbo ratio limits"
73262306a36Sopenharmony_cito cores based on the priority. By using this feature, some cores can be
73362306a36Sopenharmony_ciconfigured to get higher turbo frequency by designating them as high priority at
73462306a36Sopenharmony_cithe cost of lower or no turbo frequency on the low priority cores.
73562306a36Sopenharmony_ci
73662306a36Sopenharmony_ciFor this reason, this feature is only useful when system is busy utilizing all
73762306a36Sopenharmony_ciCPUs, but the user wants some configurable option to get high performance on
73862306a36Sopenharmony_cisome CPUs.
73962306a36Sopenharmony_ci
74062306a36Sopenharmony_ciThe support of Intel(R) Speed Select Technology - Turbo Frequency (Intel(R) SST-TF)
74162306a36Sopenharmony_cidepends on the Intel(R) Speed Select Technology - Performance Profile (Intel
74262306a36Sopenharmony_ciSST-PP) performance level configuration. It is possible that only a certain
74362306a36Sopenharmony_ciperformance level supports Intel(R) SST-TF. It is also possible that only the base
74462306a36Sopenharmony_ciperformance level (level = 0) has the support of Intel(R) SST-TF. Hence, first
74562306a36Sopenharmony_ciselect the desired performance level to enable this feature.
74662306a36Sopenharmony_ci
74762306a36Sopenharmony_ciIn the system under test here, Intel(R) SST-TF is supported at the base
74862306a36Sopenharmony_ciperformance level 0, but currently disabled::
74962306a36Sopenharmony_ci
75062306a36Sopenharmony_ci # intel-speed-select -c 0 perf-profile info -l 0
75162306a36Sopenharmony_ci Intel(R) Speed Select Technology
75262306a36Sopenharmony_ci package-0
75362306a36Sopenharmony_ci  die-0
75462306a36Sopenharmony_ci    cpu-0
75562306a36Sopenharmony_ci      perf-profile-level-0
75662306a36Sopenharmony_ci        ...
75762306a36Sopenharmony_ci        ...
75862306a36Sopenharmony_ci        speed-select-turbo-freq:disabled
75962306a36Sopenharmony_ci        ...
76062306a36Sopenharmony_ci        ...
76162306a36Sopenharmony_ci
76262306a36Sopenharmony_ci
76362306a36Sopenharmony_ciTo check if performance can be improved using Intel(R) SST-TF feature, get the turbo
76462306a36Sopenharmony_cifrequency properties with Intel(R) SST-TF enabled and compare to the base turbo
76562306a36Sopenharmony_cicapability of this system.
76662306a36Sopenharmony_ci
76762306a36Sopenharmony_ciGet Base turbo capability
76862306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~
76962306a36Sopenharmony_ci
77062306a36Sopenharmony_ciTo get the base turbo capability of performance level 0, execute::
77162306a36Sopenharmony_ci
77262306a36Sopenharmony_ci # intel-speed-select perf-profile info -l 0
77362306a36Sopenharmony_ci Intel(R) Speed Select Technology
77462306a36Sopenharmony_ci Executing on CPU model: X
77562306a36Sopenharmony_ci package-0
77662306a36Sopenharmony_ci  die-0
77762306a36Sopenharmony_ci    cpu-0
77862306a36Sopenharmony_ci      perf-profile-level-0
77962306a36Sopenharmony_ci        ...
78062306a36Sopenharmony_ci        ...
78162306a36Sopenharmony_ci        turbo-ratio-limits-sse
78262306a36Sopenharmony_ci          bucket-0
78362306a36Sopenharmony_ci            core-count:2
78462306a36Sopenharmony_ci            max-turbo-frequency(MHz):3200
78562306a36Sopenharmony_ci          bucket-1
78662306a36Sopenharmony_ci            core-count:4
78762306a36Sopenharmony_ci            max-turbo-frequency(MHz):3100
78862306a36Sopenharmony_ci          bucket-2
78962306a36Sopenharmony_ci            core-count:6
79062306a36Sopenharmony_ci            max-turbo-frequency(MHz):3100
79162306a36Sopenharmony_ci          bucket-3
79262306a36Sopenharmony_ci            core-count:8
79362306a36Sopenharmony_ci            max-turbo-frequency(MHz):3100
79462306a36Sopenharmony_ci          bucket-4
79562306a36Sopenharmony_ci            core-count:10
79662306a36Sopenharmony_ci            max-turbo-frequency(MHz):3100
79762306a36Sopenharmony_ci          bucket-5
79862306a36Sopenharmony_ci            core-count:12
79962306a36Sopenharmony_ci            max-turbo-frequency(MHz):3100
80062306a36Sopenharmony_ci          bucket-6
80162306a36Sopenharmony_ci            core-count:14
80262306a36Sopenharmony_ci            max-turbo-frequency(MHz):3100
80362306a36Sopenharmony_ci          bucket-7
80462306a36Sopenharmony_ci            core-count:16
80562306a36Sopenharmony_ci            max-turbo-frequency(MHz):3100
80662306a36Sopenharmony_ci
80762306a36Sopenharmony_ciBased on the data above, when all the CPUS are busy, the max. frequency of 3100
80862306a36Sopenharmony_ciMHz can be achieved. If there is some busy workload on cpu 0 - 11 (e.g. stress)
80962306a36Sopenharmony_ciand on CPU 12 and 13, execute "hackbench pipe" workload::
81062306a36Sopenharmony_ci
81162306a36Sopenharmony_ci # taskset -c 12,13 perf bench -r 100 sched pipe
81262306a36Sopenharmony_ci # Running 'sched/pipe' benchmark:
81362306a36Sopenharmony_ci # Executed 1000000 pipe operations between two processes
81462306a36Sopenharmony_ci     Total time: 5.705 [sec]
81562306a36Sopenharmony_ci       5.705488 usecs/op
81662306a36Sopenharmony_ci         175269 ops/sec
81762306a36Sopenharmony_ci
81862306a36Sopenharmony_ciThe turbostat output::
81962306a36Sopenharmony_ci
82062306a36Sopenharmony_ci #turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
82162306a36Sopenharmony_ci Package	Core	CPU	Bzy_MHz
82262306a36Sopenharmony_ci 0		0	0	3000
82362306a36Sopenharmony_ci 0		1	1	3000
82462306a36Sopenharmony_ci 0		2	2	3000
82562306a36Sopenharmony_ci 0		3	3	3000
82662306a36Sopenharmony_ci 0		4	4	3000
82762306a36Sopenharmony_ci 0		5	5	3100
82862306a36Sopenharmony_ci 0		6	6	3100
82962306a36Sopenharmony_ci 0		7	7	3000
83062306a36Sopenharmony_ci 0		8	8	3100
83162306a36Sopenharmony_ci 0		9	9	3000
83262306a36Sopenharmony_ci 0		10	10	3000
83362306a36Sopenharmony_ci 0		11	11	3000
83462306a36Sopenharmony_ci 0		12	12	3100
83562306a36Sopenharmony_ci 0		13	13	3100
83662306a36Sopenharmony_ci
83762306a36Sopenharmony_ciBased on turbostat output, the performance is limited by frequency cap of 3100
83862306a36Sopenharmony_ciMHz. To check if the hackbench performance can be improved for CPU 12 and CPU
83962306a36Sopenharmony_ci13, first check the capability of the Intel(R) SST-TF feature for this performance
84062306a36Sopenharmony_cilevel.
84162306a36Sopenharmony_ci
84262306a36Sopenharmony_ciGet Intel(R) SST-TF Capability
84362306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
84462306a36Sopenharmony_ci
84562306a36Sopenharmony_ciTo get the capability, the "turbo-freq info" command can be used::
84662306a36Sopenharmony_ci
84762306a36Sopenharmony_ci # intel-speed-select turbo-freq info -l 0
84862306a36Sopenharmony_ci Intel(R) Speed Select Technology
84962306a36Sopenharmony_ci Executing on CPU model: X
85062306a36Sopenharmony_ci package-0
85162306a36Sopenharmony_ci  die-0
85262306a36Sopenharmony_ci    cpu-0
85362306a36Sopenharmony_ci      speed-select-turbo-freq
85462306a36Sopenharmony_ci          bucket-0
85562306a36Sopenharmony_ci            high-priority-cores-count:2
85662306a36Sopenharmony_ci            high-priority-max-frequency(MHz):3200
85762306a36Sopenharmony_ci            high-priority-max-avx2-frequency(MHz):3200
85862306a36Sopenharmony_ci            high-priority-max-avx512-frequency(MHz):3100
85962306a36Sopenharmony_ci          bucket-1
86062306a36Sopenharmony_ci            high-priority-cores-count:4
86162306a36Sopenharmony_ci            high-priority-max-frequency(MHz):3100
86262306a36Sopenharmony_ci            high-priority-max-avx2-frequency(MHz):3000
86362306a36Sopenharmony_ci            high-priority-max-avx512-frequency(MHz):2900
86462306a36Sopenharmony_ci          bucket-2
86562306a36Sopenharmony_ci            high-priority-cores-count:6
86662306a36Sopenharmony_ci            high-priority-max-frequency(MHz):3100
86762306a36Sopenharmony_ci            high-priority-max-avx2-frequency(MHz):3000
86862306a36Sopenharmony_ci            high-priority-max-avx512-frequency(MHz):2900
86962306a36Sopenharmony_ci          speed-select-turbo-freq-clip-frequencies
87062306a36Sopenharmony_ci            low-priority-max-frequency(MHz):2600
87162306a36Sopenharmony_ci            low-priority-max-avx2-frequency(MHz):2400
87262306a36Sopenharmony_ci            low-priority-max-avx512-frequency(MHz):2100
87362306a36Sopenharmony_ci
87462306a36Sopenharmony_ciBased on the output above, there is an Intel(R) SST-TF bucket for which there are
87562306a36Sopenharmony_citwo high priority cores. If only two high priority cores are set, then max.
87662306a36Sopenharmony_citurbo frequency on those cores can be increased to 3200 MHz. This is 100 MHz
87762306a36Sopenharmony_cimore than the base turbo capability for all cores.
87862306a36Sopenharmony_ci
87962306a36Sopenharmony_ciIn turn, for the hackbench workload, two CPUs can be set as high priority and
88062306a36Sopenharmony_cirest as low priority. One side effect is that once enabled, the low priority
88162306a36Sopenharmony_cicores will be clipped to a lower frequency of 2600 MHz.
88262306a36Sopenharmony_ci
88362306a36Sopenharmony_ciEnable Intel(R) SST-TF
88462306a36Sopenharmony_ci~~~~~~~~~~~~~~~~~~~~~~
88562306a36Sopenharmony_ci
88662306a36Sopenharmony_ciTo enable Intel(R) SST-TF, execute::
88762306a36Sopenharmony_ci
88862306a36Sopenharmony_ci # intel-speed-select -c 12,13 turbo-freq enable -a
88962306a36Sopenharmony_ci Intel(R) Speed Select Technology
89062306a36Sopenharmony_ci Executing on CPU model: X
89162306a36Sopenharmony_ci package-0
89262306a36Sopenharmony_ci  die-0
89362306a36Sopenharmony_ci    cpu-12
89462306a36Sopenharmony_ci      turbo-freq
89562306a36Sopenharmony_ci        enable:success
89662306a36Sopenharmony_ci package-0
89762306a36Sopenharmony_ci  die-0
89862306a36Sopenharmony_ci    cpu-13
89962306a36Sopenharmony_ci      turbo-freq
90062306a36Sopenharmony_ci        enable:success
90162306a36Sopenharmony_ci package--1
90262306a36Sopenharmony_ci  die-0
90362306a36Sopenharmony_ci    cpu-63
90462306a36Sopenharmony_ci      turbo-freq --auto
90562306a36Sopenharmony_ci        enable:success
90662306a36Sopenharmony_ci
90762306a36Sopenharmony_ciIn this case, the option "-a" is optional. If set, it enables Intel(R) SST-TF
90862306a36Sopenharmony_cifeature and also sets the CPUs to high and low priority using Intel Speed
90962306a36Sopenharmony_ciSelect Technology Core Power (Intel(R) SST-CP) features. The CPU numbers passed
91062306a36Sopenharmony_ciwith "-c" arguments are marked as high priority, including its siblings.
91162306a36Sopenharmony_ci
91262306a36Sopenharmony_ciIf -a option is not used, then the following steps are required before enabling
91362306a36Sopenharmony_ciIntel(R) SST-TF:
91462306a36Sopenharmony_ci
91562306a36Sopenharmony_ci- Discover Intel(R) SST-TF and note buckets of high priority cores and maximum frequency
91662306a36Sopenharmony_ci
91762306a36Sopenharmony_ci- Enable CLOS using core-power feature set - Configure CLOS parameters
91862306a36Sopenharmony_ci
91962306a36Sopenharmony_ci- Subscribe desired CPUs to CLOS groups making sure that high priority cores are set to the maximum frequency
92062306a36Sopenharmony_ci
92162306a36Sopenharmony_ciIf the same hackbench workload is executed, schedule hackbench threads on high
92262306a36Sopenharmony_cipriority CPUs::
92362306a36Sopenharmony_ci
92462306a36Sopenharmony_ci #taskset -c 12,13 perf bench -r 100 sched pipe
92562306a36Sopenharmony_ci # Running 'sched/pipe' benchmark:
92662306a36Sopenharmony_ci # Executed 1000000 pipe operations between two processes
92762306a36Sopenharmony_ci     Total time: 5.510 [sec]
92862306a36Sopenharmony_ci       5.510165 usecs/op
92962306a36Sopenharmony_ci         180826 ops/sec
93062306a36Sopenharmony_ci
93162306a36Sopenharmony_ciThis improved performance by around 3.3% improvement on a busy system. Here the
93262306a36Sopenharmony_citurbostat output will show that the CPU 12 and CPU 13 are getting 100 MHz boost.
93362306a36Sopenharmony_ciThe turbostat output::
93462306a36Sopenharmony_ci
93562306a36Sopenharmony_ci #turbostat -c 0-13 --show Package,Core,CPU,Bzy_MHz -i 1
93662306a36Sopenharmony_ci Package	Core	CPU	Bzy_MHz
93762306a36Sopenharmony_ci ...
93862306a36Sopenharmony_ci 0		12	12	3200
93962306a36Sopenharmony_ci 0		13	13	3200
940