162306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.tmc/trigger_cntr
262306a36Sopenharmony_ciDate:		November 2014
362306a36Sopenharmony_ciKernelVersion:	3.19
462306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
562306a36Sopenharmony_ciDescription:	(RW) Disables write access to the Trace RAM by stopping the
662306a36Sopenharmony_ci		formatter after a defined number of words have been stored
762306a36Sopenharmony_ci		following the trigger event. Additional interface for this
862306a36Sopenharmony_ci		driver are expected to be added as it matures.
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ciWhat:           /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rsz
1162306a36Sopenharmony_ciDate:           March 2016
1262306a36Sopenharmony_ciKernelVersion:  4.7
1362306a36Sopenharmony_ciContact:        Mathieu Poirier <mathieu.poirier@linaro.org>
1462306a36Sopenharmony_ciDescription:    (Read) Defines the size, in 32-bit words, of the local RAM buffer.
1562306a36Sopenharmony_ci                The value is read directly from HW register RSZ, 0x004.
1662306a36Sopenharmony_ci
1762306a36Sopenharmony_ciWhat:           /sys/bus/coresight/devices/<memory_map>.tmc/mgmt/sts
1862306a36Sopenharmony_ciDate:           March 2016
1962306a36Sopenharmony_ciKernelVersion:  4.7
2062306a36Sopenharmony_ciContact:        Mathieu Poirier <mathieu.poirier@linaro.org>
2162306a36Sopenharmony_ciDescription:	(Read) Shows the value held by the TMC status register.  The value
2262306a36Sopenharmony_ci                is read directly from HW register STS, 0x00C.
2362306a36Sopenharmony_ci
2462306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rrp
2562306a36Sopenharmony_ciDate:		March 2016
2662306a36Sopenharmony_ciKernelVersion:	4.7
2762306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
2862306a36Sopenharmony_ciDescription:	(Read) Shows the value held by the TMC RAM Read Pointer register
2962306a36Sopenharmony_ci		that is used to read entries from the Trace RAM over the APB
3062306a36Sopenharmony_ci		interface.  The value is read directly from HW register RRP,
3162306a36Sopenharmony_ci		0x014.
3262306a36Sopenharmony_ci
3362306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.tmc/mgmt/rwp
3462306a36Sopenharmony_ciDate:		March 2016
3562306a36Sopenharmony_ciKernelVersion:	4.7
3662306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
3762306a36Sopenharmony_ciDescription:	(Read) Shows the value held by the TMC RAM Write Pointer register
3862306a36Sopenharmony_ci		that is used to sets the write pointer to write entries from
3962306a36Sopenharmony_ci		the CoreSight bus into the Trace RAM. The value is read directly
4062306a36Sopenharmony_ci		from HW register RWP, 0x018.
4162306a36Sopenharmony_ci
4262306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.tmc/mgmt/trg
4362306a36Sopenharmony_ciDate:		March 2016
4462306a36Sopenharmony_ciKernelVersion:	4.7
4562306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
4662306a36Sopenharmony_ciDescription:	(Read) Similar to "trigger_cntr" above except that this value is
4762306a36Sopenharmony_ci		read directly from HW register TRG, 0x01C.
4862306a36Sopenharmony_ci
4962306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ctl
5062306a36Sopenharmony_ciDate:		March 2016
5162306a36Sopenharmony_ciKernelVersion:	4.7
5262306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
5362306a36Sopenharmony_ciDescription:	(Read) Shows the value held by the TMC Control register. The value
5462306a36Sopenharmony_ci		is read directly from HW register CTL, 0x020.
5562306a36Sopenharmony_ci
5662306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ffsr
5762306a36Sopenharmony_ciDate:		March 2016
5862306a36Sopenharmony_ciKernelVersion:	4.7
5962306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
6062306a36Sopenharmony_ciDescription:	(Read) Shows the value held by the TMC Formatter and Flush Status
6162306a36Sopenharmony_ci		register.  The value is read directly from HW register FFSR,
6262306a36Sopenharmony_ci		0x300.
6362306a36Sopenharmony_ci
6462306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.tmc/mgmt/ffcr
6562306a36Sopenharmony_ciDate:		March 2016
6662306a36Sopenharmony_ciKernelVersion:	4.7
6762306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
6862306a36Sopenharmony_ciDescription:	(Read) Shows the value held by the TMC Formatter and Flush Control
6962306a36Sopenharmony_ci		register.  The value is read directly from HW register FFCR,
7062306a36Sopenharmony_ci		0x304.
7162306a36Sopenharmony_ci
7262306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.tmc/mgmt/mode
7362306a36Sopenharmony_ciDate:		March 2016
7462306a36Sopenharmony_ciKernelVersion:	4.7
7562306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
7662306a36Sopenharmony_ciDescription:	(Read) Shows the value held by the TMC Mode register, which
7762306a36Sopenharmony_ci		indicate the mode the device has been configured to enact.  The
7862306a36Sopenharmony_ci		The value is read directly from the MODE register, 0x028.
7962306a36Sopenharmony_ci
8062306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.tmc/mgmt/devid
8162306a36Sopenharmony_ciDate:		March 2016
8262306a36Sopenharmony_ciKernelVersion:	4.7
8362306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
8462306a36Sopenharmony_ciDescription:	(Read) Indicates the capabilities of the Coresight TMC.
8562306a36Sopenharmony_ci		The value is read directly from the DEVID register, 0xFC8,
8662306a36Sopenharmony_ci
8762306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.tmc/buffer_size
8862306a36Sopenharmony_ciDate:		December 2018
8962306a36Sopenharmony_ciKernelVersion:	4.19
9062306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
9162306a36Sopenharmony_ciDescription:	(RW) Size of the trace buffer for TMC-ETR when used in SYSFS
9262306a36Sopenharmony_ci		mode. Writable only for TMC-ETR configurations. The value
9362306a36Sopenharmony_ci		should be aligned to the kernel pagesize.
94