162306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.etb/enable_sink
262306a36Sopenharmony_ciDate:		November 2014
362306a36Sopenharmony_ciKernelVersion:	3.19
462306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
562306a36Sopenharmony_ciDescription:	(RW) Add/remove a sink from a trace path.  There can be multiple
662306a36Sopenharmony_ci		source for a single sink.
762306a36Sopenharmony_ci
862306a36Sopenharmony_ci		ex::
962306a36Sopenharmony_ci
1062306a36Sopenharmony_ci		  echo 1 > /sys/bus/coresight/devices/20010000.etb/enable_sink
1162306a36Sopenharmony_ci
1262306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.etb/trigger_cntr
1362306a36Sopenharmony_ciDate:		November 2014
1462306a36Sopenharmony_ciKernelVersion:	3.19
1562306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
1662306a36Sopenharmony_ciDescription:	(RW) Disables write access to the Trace RAM by stopping the
1762306a36Sopenharmony_ci		formatter after a defined number of words have been stored
1862306a36Sopenharmony_ci		following the trigger event. The number of 32-bit words written
1962306a36Sopenharmony_ci		into the Trace RAM following the trigger event is equal to the
2062306a36Sopenharmony_ci		value stored in this register+1 (from ARM ETB-TRM).
2162306a36Sopenharmony_ci
2262306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/rdp
2362306a36Sopenharmony_ciDate:		March 2016
2462306a36Sopenharmony_ciKernelVersion:	4.7
2562306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
2662306a36Sopenharmony_ciDescription:	(Read) Defines the depth, in words, of the trace RAM in powers of
2762306a36Sopenharmony_ci		2.  The value is read directly from HW register RDP, 0x004.
2862306a36Sopenharmony_ci
2962306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/sts
3062306a36Sopenharmony_ciDate:		March 2016
3162306a36Sopenharmony_ciKernelVersion:	4.7
3262306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
3362306a36Sopenharmony_ciDescription:	(Read) Shows the value held by the ETB status register.  The value
3462306a36Sopenharmony_ci		is read directly from HW register STS, 0x00C.
3562306a36Sopenharmony_ci
3662306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/rrp
3762306a36Sopenharmony_ciDate:		March 2016
3862306a36Sopenharmony_ciKernelVersion:	4.7
3962306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
4062306a36Sopenharmony_ciDescription:	(Read) Shows the value held by the ETB RAM Read Pointer register
4162306a36Sopenharmony_ci		that is used to read entries from the Trace RAM over the APB
4262306a36Sopenharmony_ci		interface.  The value is read directly from HW register RRP,
4362306a36Sopenharmony_ci		0x014.
4462306a36Sopenharmony_ci
4562306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/rwp
4662306a36Sopenharmony_ciDate:		March 2016
4762306a36Sopenharmony_ciKernelVersion:	4.7
4862306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
4962306a36Sopenharmony_ciDescription:	(Read) Shows the value held by the ETB RAM Write Pointer register
5062306a36Sopenharmony_ci		that is used to sets the write pointer to write entries from
5162306a36Sopenharmony_ci		the CoreSight bus into the Trace RAM. The value is read directly
5262306a36Sopenharmony_ci		from HW register RWP, 0x018.
5362306a36Sopenharmony_ci
5462306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/trg
5562306a36Sopenharmony_ciDate:		March 2016
5662306a36Sopenharmony_ciKernelVersion:	4.7
5762306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
5862306a36Sopenharmony_ciDescription:	(Read) Similar to "trigger_cntr" above except that this value is
5962306a36Sopenharmony_ci		read directly from HW register TRG, 0x01C.
6062306a36Sopenharmony_ci
6162306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/ctl
6262306a36Sopenharmony_ciDate:		March 2016
6362306a36Sopenharmony_ciKernelVersion:	4.7
6462306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
6562306a36Sopenharmony_ciDescription:	(Read) Shows the value held by the ETB Control register. The value
6662306a36Sopenharmony_ci		is read directly from HW register CTL, 0x020.
6762306a36Sopenharmony_ci
6862306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/ffsr
6962306a36Sopenharmony_ciDate:		March 2016
7062306a36Sopenharmony_ciKernelVersion:	4.7
7162306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
7262306a36Sopenharmony_ciDescription:	(Read) Shows the value held by the ETB Formatter and Flush Status
7362306a36Sopenharmony_ci		register.  The value is read directly from HW register FFSR,
7462306a36Sopenharmony_ci		0x300.
7562306a36Sopenharmony_ci
7662306a36Sopenharmony_ciWhat:		/sys/bus/coresight/devices/<memory_map>.etb/mgmt/ffcr
7762306a36Sopenharmony_ciDate:		March 2016
7862306a36Sopenharmony_ciKernelVersion:	4.7
7962306a36Sopenharmony_ciContact:	Mathieu Poirier <mathieu.poirier@linaro.org>
8062306a36Sopenharmony_ciDescription:	(Read) Shows the value held by the ETB Formatter and Flush Control
8162306a36Sopenharmony_ci		register.  The value is read directly from HW register FFCR,
8262306a36Sopenharmony_ci		0x304.
83