162306a36Sopenharmony_ciWhat: /sys/kernel/debug/dcc/.../ready 262306a36Sopenharmony_ciDate: December 2022 362306a36Sopenharmony_ciContact: Souradeep Chowdhury <quic_schowdhu@quicinc.com> 462306a36Sopenharmony_ciDescription: 562306a36Sopenharmony_ci This file is used to check the status of the dcc 662306a36Sopenharmony_ci hardware if it's ready to receive user configurations. 762306a36Sopenharmony_ci A 'Y' here indicates dcc is ready. 862306a36Sopenharmony_ci 962306a36Sopenharmony_ciWhat: /sys/kernel/debug/dcc/.../trigger 1062306a36Sopenharmony_ciDate: December 2022 1162306a36Sopenharmony_ciContact: Souradeep Chowdhury <quic_schowdhu@quicinc.com> 1262306a36Sopenharmony_ciDescription: 1362306a36Sopenharmony_ci This is the debugfs interface for manual software 1462306a36Sopenharmony_ci triggers. The trigger can be invoked by writing '1' 1562306a36Sopenharmony_ci to the file. 1662306a36Sopenharmony_ci 1762306a36Sopenharmony_ciWhat: /sys/kernel/debug/dcc/.../config_reset 1862306a36Sopenharmony_ciDate: December 2022 1962306a36Sopenharmony_ciContact: Souradeep Chowdhury <quic_schowdhu@quicinc.com> 2062306a36Sopenharmony_ciDescription: 2162306a36Sopenharmony_ci This file is used to reset the configuration of 2262306a36Sopenharmony_ci a dcc driver to the default configuration. When '1' 2362306a36Sopenharmony_ci is written to the file, all the previous addresses 2462306a36Sopenharmony_ci stored in the driver gets removed and users need to 2562306a36Sopenharmony_ci reconfigure addresses again. 2662306a36Sopenharmony_ci 2762306a36Sopenharmony_ciWhat: /sys/kernel/debug/dcc/.../[list-number]/config 2862306a36Sopenharmony_ciDate: December 2022 2962306a36Sopenharmony_ciContact: Souradeep Chowdhury <quic_schowdhu@quicinc.com> 3062306a36Sopenharmony_ciDescription: 3162306a36Sopenharmony_ci This stores the addresses of the registers which 3262306a36Sopenharmony_ci can be read in case of a hardware crash or manual 3362306a36Sopenharmony_ci software triggers. The input addresses type 3462306a36Sopenharmony_ci can be one of following dcc instructions: read, 3562306a36Sopenharmony_ci write, read-write, and loop type. The lists need to 3662306a36Sopenharmony_ci be configured sequentially and not in a overlapping 3762306a36Sopenharmony_ci manner; e.g. users can jump to list x only after 3862306a36Sopenharmony_ci list y is configured and enabled. The input format for 3962306a36Sopenharmony_ci each type is as follows: 4062306a36Sopenharmony_ci 4162306a36Sopenharmony_ci i) Read instruction 4262306a36Sopenharmony_ci 4362306a36Sopenharmony_ci :: 4462306a36Sopenharmony_ci 4562306a36Sopenharmony_ci echo R <addr> <n> <bus> >/sys/kernel/debug/dcc/../[list-number]/config 4662306a36Sopenharmony_ci 4762306a36Sopenharmony_ci where: 4862306a36Sopenharmony_ci 4962306a36Sopenharmony_ci <addr> 5062306a36Sopenharmony_ci The address to be read. 5162306a36Sopenharmony_ci 5262306a36Sopenharmony_ci <n> 5362306a36Sopenharmony_ci The addresses word count, starting from address <1>. 5462306a36Sopenharmony_ci Each word is 32 bits (4 bytes). If omitted, defaulted 5562306a36Sopenharmony_ci to 1. 5662306a36Sopenharmony_ci 5762306a36Sopenharmony_ci <bus type> 5862306a36Sopenharmony_ci The bus type, which can be either 'apb' or 'ahb'. 5962306a36Sopenharmony_ci The default is 'ahb' if leaved out. 6062306a36Sopenharmony_ci 6162306a36Sopenharmony_ci ii) Write instruction 6262306a36Sopenharmony_ci 6362306a36Sopenharmony_ci :: 6462306a36Sopenharmony_ci 6562306a36Sopenharmony_ci echo W <addr> <n> <bus type> > /sys/kernel/debug/dcc/../[list-number]/config 6662306a36Sopenharmony_ci 6762306a36Sopenharmony_ci where: 6862306a36Sopenharmony_ci 6962306a36Sopenharmony_ci <addr> 7062306a36Sopenharmony_ci The address to be written. 7162306a36Sopenharmony_ci 7262306a36Sopenharmony_ci <n> 7362306a36Sopenharmony_ci The value to be written at <addr>. 7462306a36Sopenharmony_ci 7562306a36Sopenharmony_ci <bus type> 7662306a36Sopenharmony_ci The bus type, which can be either 'apb' or 'ahb'. 7762306a36Sopenharmony_ci 7862306a36Sopenharmony_ci iii) Read-write instruction 7962306a36Sopenharmony_ci 8062306a36Sopenharmony_ci :: 8162306a36Sopenharmony_ci 8262306a36Sopenharmony_ci echo RW <addr> <n> <mask> > /sys/kernel/debug/dcc/../[list-number]/config 8362306a36Sopenharmony_ci 8462306a36Sopenharmony_ci where: 8562306a36Sopenharmony_ci 8662306a36Sopenharmony_ci <addr> 8762306a36Sopenharmony_ci The address to be read and written. 8862306a36Sopenharmony_ci 8962306a36Sopenharmony_ci <n> 9062306a36Sopenharmony_ci The value to be written at <addr>. 9162306a36Sopenharmony_ci 9262306a36Sopenharmony_ci <mask> 9362306a36Sopenharmony_ci The value mask. 9462306a36Sopenharmony_ci 9562306a36Sopenharmony_ci iv) Loop instruction 9662306a36Sopenharmony_ci 9762306a36Sopenharmony_ci :: 9862306a36Sopenharmony_ci 9962306a36Sopenharmony_ci echo L <loop count> <address count> <address>... > /sys/kernel/debug/dcc/../[list-number]/config 10062306a36Sopenharmony_ci 10162306a36Sopenharmony_ci where: 10262306a36Sopenharmony_ci 10362306a36Sopenharmony_ci <loop count> 10462306a36Sopenharmony_ci Number of iterations 10562306a36Sopenharmony_ci 10662306a36Sopenharmony_ci <address count> 10762306a36Sopenharmony_ci total number of addresses to be written 10862306a36Sopenharmony_ci 10962306a36Sopenharmony_ci <address> 11062306a36Sopenharmony_ci Space-separated list of addresses. 11162306a36Sopenharmony_ci 11262306a36Sopenharmony_ciWhat: /sys/kernel/debug/dcc/.../[list-number]/enable 11362306a36Sopenharmony_ciDate: December 2022 11462306a36Sopenharmony_ciContact: Souradeep Chowdhury <quic_schowdhu@quicinc.com> 11562306a36Sopenharmony_ciDescription: 11662306a36Sopenharmony_ci This debugfs interface is used for enabling the 11762306a36Sopenharmony_ci the dcc hardware. A file named "enable" is in the 11862306a36Sopenharmony_ci directory list number where users can enable/disable 11962306a36Sopenharmony_ci the specific list by writing boolean (1 or 0) to the 12062306a36Sopenharmony_ci file. 12162306a36Sopenharmony_ci 12262306a36Sopenharmony_ci On enabling the dcc, all the addresses specified 12362306a36Sopenharmony_ci by the user for the corresponding list is written 12462306a36Sopenharmony_ci into dcc sram which is read by the dcc hardware 12562306a36Sopenharmony_ci on manual or crash induced triggers. Lists must 12662306a36Sopenharmony_ci be configured and enabled sequentially, e.g. list 12762306a36Sopenharmony_ci 2 can only be enabled when list 1 have so. 128