1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * intel_pt_decoder.h: Intel Processor Trace support 4 * Copyright (c) 2013-2014, Intel Corporation. 5 */ 6 7#ifndef INCLUDE__INTEL_PT_DECODER_H__ 8#define INCLUDE__INTEL_PT_DECODER_H__ 9 10#include <stdint.h> 11#include <stddef.h> 12#include <stdbool.h> 13 14#include "intel-pt-insn-decoder.h" 15 16#define INTEL_PT_IN_TX (1 << 0) 17#define INTEL_PT_ABORT_TX (1 << 1) 18#define INTEL_PT_ASYNC (1 << 2) 19#define INTEL_PT_FUP_IP (1 << 3) 20#define INTEL_PT_SAMPLE_IPC (1 << 4) 21 22enum intel_pt_sample_type { 23 INTEL_PT_BRANCH = 1 << 0, 24 INTEL_PT_INSTRUCTION = 1 << 1, 25 INTEL_PT_TRANSACTION = 1 << 2, 26 INTEL_PT_PTW = 1 << 3, 27 INTEL_PT_MWAIT_OP = 1 << 4, 28 INTEL_PT_PWR_ENTRY = 1 << 5, 29 INTEL_PT_EX_STOP = 1 << 6, 30 INTEL_PT_PWR_EXIT = 1 << 7, 31 INTEL_PT_CBR_CHG = 1 << 8, 32 INTEL_PT_TRACE_BEGIN = 1 << 9, 33 INTEL_PT_TRACE_END = 1 << 10, 34 INTEL_PT_BLK_ITEMS = 1 << 11, 35}; 36 37enum intel_pt_period_type { 38 INTEL_PT_PERIOD_NONE, 39 INTEL_PT_PERIOD_INSTRUCTIONS, 40 INTEL_PT_PERIOD_TICKS, 41 INTEL_PT_PERIOD_MTC, 42}; 43 44enum { 45 INTEL_PT_ERR_NOMEM = 1, 46 INTEL_PT_ERR_INTERN, 47 INTEL_PT_ERR_BADPKT, 48 INTEL_PT_ERR_NODATA, 49 INTEL_PT_ERR_NOINSN, 50 INTEL_PT_ERR_MISMAT, 51 INTEL_PT_ERR_OVR, 52 INTEL_PT_ERR_LOST, 53 INTEL_PT_ERR_UNK, 54 INTEL_PT_ERR_NELOOP, 55 INTEL_PT_ERR_MAX, 56}; 57 58enum intel_pt_param_flags { 59 /* 60 * FUP packet can contain next linear instruction pointer instead of 61 * current linear instruction pointer. 62 */ 63 INTEL_PT_FUP_WITH_NLIP = 1 << 0, 64}; 65 66enum intel_pt_blk_type { 67 INTEL_PT_GP_REGS = 1, 68 INTEL_PT_PEBS_BASIC = 4, 69 INTEL_PT_PEBS_MEM = 5, 70 INTEL_PT_LBR_0 = 8, 71 INTEL_PT_LBR_1 = 9, 72 INTEL_PT_LBR_2 = 10, 73 INTEL_PT_XMM = 16, 74 INTEL_PT_BLK_TYPE_MAX 75}; 76 77/* 78 * The block type numbers are not sequential but here they are given sequential 79 * positions to avoid wasting space for array placement. 80 */ 81enum intel_pt_blk_type_pos { 82 INTEL_PT_GP_REGS_POS, 83 INTEL_PT_PEBS_BASIC_POS, 84 INTEL_PT_PEBS_MEM_POS, 85 INTEL_PT_LBR_0_POS, 86 INTEL_PT_LBR_1_POS, 87 INTEL_PT_LBR_2_POS, 88 INTEL_PT_XMM_POS, 89 INTEL_PT_BLK_TYPE_CNT 90}; 91 92/* Get the array position for a block type */ 93static inline int intel_pt_blk_type_pos(enum intel_pt_blk_type blk_type) 94{ 95#define BLK_TYPE(bt) [INTEL_PT_##bt] = INTEL_PT_##bt##_POS + 1 96 const int map[INTEL_PT_BLK_TYPE_MAX] = { 97 BLK_TYPE(GP_REGS), 98 BLK_TYPE(PEBS_BASIC), 99 BLK_TYPE(PEBS_MEM), 100 BLK_TYPE(LBR_0), 101 BLK_TYPE(LBR_1), 102 BLK_TYPE(LBR_2), 103 BLK_TYPE(XMM), 104 }; 105#undef BLK_TYPE 106 107 return blk_type < INTEL_PT_BLK_TYPE_MAX ? map[blk_type] - 1 : -1; 108} 109 110#define INTEL_PT_BLK_ITEM_ID_CNT 32 111 112/* 113 * Use unions so that the block items can be accessed by name or by array index. 114 * There is an array of 32-bit masks for each block type, which indicate which 115 * values are present. Then arrays of 32 64-bit values for each block type. 116 */ 117struct intel_pt_blk_items { 118 union { 119 uint32_t mask[INTEL_PT_BLK_TYPE_CNT]; 120 struct { 121 uint32_t has_rflags:1; 122 uint32_t has_rip:1; 123 uint32_t has_rax:1; 124 uint32_t has_rcx:1; 125 uint32_t has_rdx:1; 126 uint32_t has_rbx:1; 127 uint32_t has_rsp:1; 128 uint32_t has_rbp:1; 129 uint32_t has_rsi:1; 130 uint32_t has_rdi:1; 131 uint32_t has_r8:1; 132 uint32_t has_r9:1; 133 uint32_t has_r10:1; 134 uint32_t has_r11:1; 135 uint32_t has_r12:1; 136 uint32_t has_r13:1; 137 uint32_t has_r14:1; 138 uint32_t has_r15:1; 139 uint32_t has_unused_0:14; 140 uint32_t has_ip:1; 141 uint32_t has_applicable_counters:1; 142 uint32_t has_timestamp:1; 143 uint32_t has_unused_1:29; 144 uint32_t has_mem_access_address:1; 145 uint32_t has_mem_aux_info:1; 146 uint32_t has_mem_access_latency:1; 147 uint32_t has_tsx_aux_info:1; 148 uint32_t has_unused_2:28; 149 uint32_t has_lbr_0; 150 uint32_t has_lbr_1; 151 uint32_t has_lbr_2; 152 uint32_t has_xmm; 153 }; 154 }; 155 union { 156 uint64_t val[INTEL_PT_BLK_TYPE_CNT][INTEL_PT_BLK_ITEM_ID_CNT]; 157 struct { 158 struct { 159 uint64_t rflags; 160 uint64_t rip; 161 uint64_t rax; 162 uint64_t rcx; 163 uint64_t rdx; 164 uint64_t rbx; 165 uint64_t rsp; 166 uint64_t rbp; 167 uint64_t rsi; 168 uint64_t rdi; 169 uint64_t r8; 170 uint64_t r9; 171 uint64_t r10; 172 uint64_t r11; 173 uint64_t r12; 174 uint64_t r13; 175 uint64_t r14; 176 uint64_t r15; 177 uint64_t unused_0[INTEL_PT_BLK_ITEM_ID_CNT - 18]; 178 }; 179 struct { 180 uint64_t ip; 181 uint64_t applicable_counters; 182 uint64_t timestamp; 183 uint64_t unused_1[INTEL_PT_BLK_ITEM_ID_CNT - 3]; 184 }; 185 struct { 186 uint64_t mem_access_address; 187 uint64_t mem_aux_info; 188 uint64_t mem_access_latency; 189 uint64_t tsx_aux_info; 190 uint64_t unused_2[INTEL_PT_BLK_ITEM_ID_CNT - 4]; 191 }; 192 uint64_t lbr_0[INTEL_PT_BLK_ITEM_ID_CNT]; 193 uint64_t lbr_1[INTEL_PT_BLK_ITEM_ID_CNT]; 194 uint64_t lbr_2[INTEL_PT_BLK_ITEM_ID_CNT]; 195 uint64_t xmm[INTEL_PT_BLK_ITEM_ID_CNT]; 196 }; 197 }; 198 bool is_32_bit; 199}; 200 201struct intel_pt_state { 202 enum intel_pt_sample_type type; 203 int err; 204 uint64_t from_ip; 205 uint64_t to_ip; 206 uint64_t cr3; 207 uint64_t tot_insn_cnt; 208 uint64_t tot_cyc_cnt; 209 uint64_t timestamp; 210 uint64_t est_timestamp; 211 uint64_t trace_nr; 212 uint64_t ptw_payload; 213 uint64_t mwait_payload; 214 uint64_t pwre_payload; 215 uint64_t pwrx_payload; 216 uint64_t cbr_payload; 217 uint32_t cbr; 218 uint32_t flags; 219 enum intel_pt_insn_op insn_op; 220 int insn_len; 221 char insn[INTEL_PT_INSN_BUF_SZ]; 222 struct intel_pt_blk_items items; 223}; 224 225struct intel_pt_insn; 226 227struct intel_pt_buffer { 228 const unsigned char *buf; 229 size_t len; 230 bool consecutive; 231 uint64_t ref_timestamp; 232 uint64_t trace_nr; 233}; 234 235typedef int (*intel_pt_lookahead_cb_t)(struct intel_pt_buffer *, void *); 236 237struct intel_pt_params { 238 int (*get_trace)(struct intel_pt_buffer *buffer, void *data); 239 int (*walk_insn)(struct intel_pt_insn *intel_pt_insn, 240 uint64_t *insn_cnt_ptr, uint64_t *ip, uint64_t to_ip, 241 uint64_t max_insn_cnt, void *data); 242 bool (*pgd_ip)(uint64_t ip, void *data); 243 int (*lookahead)(void *data, intel_pt_lookahead_cb_t cb, void *cb_data); 244 void *data; 245 bool return_compression; 246 bool branch_enable; 247 uint64_t ctl; 248 uint64_t period; 249 enum intel_pt_period_type period_type; 250 unsigned max_non_turbo_ratio; 251 unsigned int mtc_period; 252 uint32_t tsc_ctc_ratio_n; 253 uint32_t tsc_ctc_ratio_d; 254 enum intel_pt_param_flags flags; 255 unsigned int quick; 256}; 257 258struct intel_pt_decoder; 259 260struct intel_pt_decoder *intel_pt_decoder_new(struct intel_pt_params *params); 261void intel_pt_decoder_free(struct intel_pt_decoder *decoder); 262 263const struct intel_pt_state *intel_pt_decode(struct intel_pt_decoder *decoder); 264 265int intel_pt_fast_forward(struct intel_pt_decoder *decoder, uint64_t timestamp); 266 267unsigned char *intel_pt_find_overlap(unsigned char *buf_a, size_t len_a, 268 unsigned char *buf_b, size_t len_b, 269 bool have_tsc, bool *consecutive); 270 271int intel_pt__strerror(int code, char *buf, size_t buflen); 272 273#endif 274