18c2ecf20Sopenharmony_ci[ 28c2ecf20Sopenharmony_ci { 38c2ecf20Sopenharmony_ci "CollectPEBSRecord": "2", 48c2ecf20Sopenharmony_ci "PublicDescription": "Counts all microcode Floating Point assists.", 58c2ecf20Sopenharmony_ci "EventCode": "0xC1", 68c2ecf20Sopenharmony_ci "Counter": "0,1,2,3,4,5,6,7", 78c2ecf20Sopenharmony_ci "UMask": "0x2", 88c2ecf20Sopenharmony_ci "PEBScounters": "0,1,2,3,4,5,6,7", 98c2ecf20Sopenharmony_ci "EventName": "ASSISTS.FP", 108c2ecf20Sopenharmony_ci "SampleAfterValue": "100003", 118c2ecf20Sopenharmony_ci "BriefDescription": "Counts all microcode FP assists.", 128c2ecf20Sopenharmony_ci "CounterMask": "1" 138c2ecf20Sopenharmony_ci }, 148c2ecf20Sopenharmony_ci { 158c2ecf20Sopenharmony_ci "CollectPEBSRecord": "2", 168c2ecf20Sopenharmony_ci "PublicDescription": "Counts number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 178c2ecf20Sopenharmony_ci "EventCode": "0xc7", 188c2ecf20Sopenharmony_ci "Counter": "0,1,2,3,4,5,6,7", 198c2ecf20Sopenharmony_ci "UMask": "0x1", 208c2ecf20Sopenharmony_ci "PEBScounters": "0,1,2,3,4,5,6,7", 218c2ecf20Sopenharmony_ci "EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE", 228c2ecf20Sopenharmony_ci "SampleAfterValue": "2000003", 238c2ecf20Sopenharmony_ci "BriefDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 RANGE SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 248c2ecf20Sopenharmony_ci }, 258c2ecf20Sopenharmony_ci { 268c2ecf20Sopenharmony_ci "CollectPEBSRecord": "2", 278c2ecf20Sopenharmony_ci "PublicDescription": "Counts number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 288c2ecf20Sopenharmony_ci "EventCode": "0xc7", 298c2ecf20Sopenharmony_ci "Counter": "0,1,2,3,4,5,6,7", 308c2ecf20Sopenharmony_ci "UMask": "0x2", 318c2ecf20Sopenharmony_ci "PEBScounters": "0,1,2,3,4,5,6,7", 328c2ecf20Sopenharmony_ci "EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE", 338c2ecf20Sopenharmony_ci "SampleAfterValue": "2000003", 348c2ecf20Sopenharmony_ci "BriefDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 1 computation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 RANGE SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 358c2ecf20Sopenharmony_ci }, 368c2ecf20Sopenharmony_ci { 378c2ecf20Sopenharmony_ci "CollectPEBSRecord": "2", 388c2ecf20Sopenharmony_ci "PublicDescription": "Counts number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 398c2ecf20Sopenharmony_ci "EventCode": "0xc7", 408c2ecf20Sopenharmony_ci "Counter": "0,1,2,3,4,5,6,7", 418c2ecf20Sopenharmony_ci "UMask": "0x4", 428c2ecf20Sopenharmony_ci "PEBScounters": "0,1,2,3,4,5,6,7", 438c2ecf20Sopenharmony_ci "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE", 448c2ecf20Sopenharmony_ci "SampleAfterValue": "2000003", 458c2ecf20Sopenharmony_ci "BriefDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT14 RCP14 RANGE DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 468c2ecf20Sopenharmony_ci }, 478c2ecf20Sopenharmony_ci { 488c2ecf20Sopenharmony_ci "CollectPEBSRecord": "2", 498c2ecf20Sopenharmony_ci "PublicDescription": "Counts number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 508c2ecf20Sopenharmony_ci "EventCode": "0xc7", 518c2ecf20Sopenharmony_ci "Counter": "0,1,2,3,4,5,6,7", 528c2ecf20Sopenharmony_ci "UMask": "0x8", 538c2ecf20Sopenharmony_ci "PEBScounters": "0,1,2,3,4,5,6,7", 548c2ecf20Sopenharmony_ci "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE", 558c2ecf20Sopenharmony_ci "SampleAfterValue": "2000003", 568c2ecf20Sopenharmony_ci "BriefDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 578c2ecf20Sopenharmony_ci }, 588c2ecf20Sopenharmony_ci { 598c2ecf20Sopenharmony_ci "CollectPEBSRecord": "2", 608c2ecf20Sopenharmony_ci "PublicDescription": "Counts number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 618c2ecf20Sopenharmony_ci "EventCode": "0xc7", 628c2ecf20Sopenharmony_ci "Counter": "0,1,2,3,4,5,6,7", 638c2ecf20Sopenharmony_ci "UMask": "0x10", 648c2ecf20Sopenharmony_ci "PEBScounters": "0,1,2,3,4,5,6,7", 658c2ecf20Sopenharmony_ci "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE", 668c2ecf20Sopenharmony_ci "SampleAfterValue": "2000003", 678c2ecf20Sopenharmony_ci "BriefDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 RANGE SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 688c2ecf20Sopenharmony_ci }, 698c2ecf20Sopenharmony_ci { 708c2ecf20Sopenharmony_ci "CollectPEBSRecord": "2", 718c2ecf20Sopenharmony_ci "PublicDescription": "Counts number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 728c2ecf20Sopenharmony_ci "EventCode": "0xc7", 738c2ecf20Sopenharmony_ci "Counter": "0,1,2,3,4,5,6,7", 748c2ecf20Sopenharmony_ci "UMask": "0x20", 758c2ecf20Sopenharmony_ci "PEBScounters": "0,1,2,3,4,5,6,7", 768c2ecf20Sopenharmony_ci "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE", 778c2ecf20Sopenharmony_ci "SampleAfterValue": "2000003", 788c2ecf20Sopenharmony_ci "BriefDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 RANGE SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 798c2ecf20Sopenharmony_ci }, 808c2ecf20Sopenharmony_ci { 818c2ecf20Sopenharmony_ci "CollectPEBSRecord": "2", 828c2ecf20Sopenharmony_ci "PublicDescription": "Counts number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 RANGE FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 838c2ecf20Sopenharmony_ci "EventCode": "0xc7", 848c2ecf20Sopenharmony_ci "Counter": "0,1,2,3,4,5,6,7", 858c2ecf20Sopenharmony_ci "UMask": "0x40", 868c2ecf20Sopenharmony_ci "PEBScounters": "0,1,2,3,4,5,6,7", 878c2ecf20Sopenharmony_ci "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE", 888c2ecf20Sopenharmony_ci "SampleAfterValue": "2000003", 898c2ecf20Sopenharmony_ci "BriefDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 RANGE FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 908c2ecf20Sopenharmony_ci }, 918c2ecf20Sopenharmony_ci { 928c2ecf20Sopenharmony_ci "CollectPEBSRecord": "2", 938c2ecf20Sopenharmony_ci "PublicDescription": "Counts number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 16 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 RANGE FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 948c2ecf20Sopenharmony_ci "EventCode": "0xc7", 958c2ecf20Sopenharmony_ci "Counter": "0,1,2,3,4,5,6,7", 968c2ecf20Sopenharmony_ci "UMask": "0x80", 978c2ecf20Sopenharmony_ci "PEBScounters": "0,1,2,3,4,5,6,7", 988c2ecf20Sopenharmony_ci "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE", 998c2ecf20Sopenharmony_ci "SampleAfterValue": "2000003", 1008c2ecf20Sopenharmony_ci "BriefDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 RANGE FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element." 1018c2ecf20Sopenharmony_ci } 1028c2ecf20Sopenharmony_ci]