1// SPDX-License-Identifier: GPL-2.0
2//
3// Xilinx ASoC I2S audio support
4//
5// Copyright (C) 2018 Xilinx, Inc.
6//
7// Author: Praveen Vuppala <praveenv@xilinx.com>
8// Author: Maruthi Srinivas Bayyavarapu <maruthis@xilinx.com>
9
10#include <linux/io.h>
11#include <linux/module.h>
12#include <linux/of.h>
13#include <linux/of_platform.h>
14#include <linux/platform_device.h>
15#include <sound/pcm_params.h>
16#include <sound/soc.h>
17
18#define DRV_NAME "xlnx_i2s"
19
20#define I2S_CORE_CTRL_OFFSET		0x08
21#define I2S_I2STIM_OFFSET		0x20
22#define I2S_CH0_OFFSET			0x30
23#define I2S_I2STIM_VALID_MASK		GENMASK(7, 0)
24
25static int xlnx_i2s_set_sclkout_div(struct snd_soc_dai *cpu_dai,
26				    int div_id, int div)
27{
28	void __iomem *base = snd_soc_dai_get_drvdata(cpu_dai);
29
30	if (!div || (div & ~I2S_I2STIM_VALID_MASK))
31		return -EINVAL;
32
33	writel(div, base + I2S_I2STIM_OFFSET);
34
35	return 0;
36}
37
38static int xlnx_i2s_hw_params(struct snd_pcm_substream *substream,
39			      struct snd_pcm_hw_params *params,
40			      struct snd_soc_dai *i2s_dai)
41{
42	u32 reg_off, chan_id;
43	void __iomem *base = snd_soc_dai_get_drvdata(i2s_dai);
44
45	chan_id = params_channels(params) / 2;
46
47	while (chan_id > 0) {
48		reg_off = I2S_CH0_OFFSET + ((chan_id - 1) * 4);
49		writel(chan_id, base + reg_off);
50		chan_id--;
51	}
52
53	return 0;
54}
55
56static int xlnx_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
57			    struct snd_soc_dai *i2s_dai)
58{
59	void __iomem *base = snd_soc_dai_get_drvdata(i2s_dai);
60
61	switch (cmd) {
62	case SNDRV_PCM_TRIGGER_START:
63	case SNDRV_PCM_TRIGGER_RESUME:
64	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
65		writel(1, base + I2S_CORE_CTRL_OFFSET);
66		break;
67	case SNDRV_PCM_TRIGGER_STOP:
68	case SNDRV_PCM_TRIGGER_SUSPEND:
69	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
70		writel(0, base + I2S_CORE_CTRL_OFFSET);
71		break;
72	default:
73		return -EINVAL;
74	}
75
76	return 0;
77}
78
79static const struct snd_soc_dai_ops xlnx_i2s_dai_ops = {
80	.trigger = xlnx_i2s_trigger,
81	.set_clkdiv = xlnx_i2s_set_sclkout_div,
82	.hw_params = xlnx_i2s_hw_params
83};
84
85static const struct snd_soc_component_driver xlnx_i2s_component = {
86	.name = DRV_NAME,
87};
88
89static const struct of_device_id xlnx_i2s_of_match[] = {
90	{ .compatible = "xlnx,i2s-transmitter-1.0", },
91	{ .compatible = "xlnx,i2s-receiver-1.0", },
92	{},
93};
94MODULE_DEVICE_TABLE(of, xlnx_i2s_of_match);
95
96static int xlnx_i2s_probe(struct platform_device *pdev)
97{
98	void __iomem *base;
99	struct snd_soc_dai_driver *dai_drv;
100	int ret;
101	u32 ch, format, data_width;
102	struct device *dev = &pdev->dev;
103	struct device_node *node = dev->of_node;
104
105	dai_drv = devm_kzalloc(&pdev->dev, sizeof(*dai_drv), GFP_KERNEL);
106	if (!dai_drv)
107		return -ENOMEM;
108
109	base = devm_platform_ioremap_resource(pdev, 0);
110	if (IS_ERR(base))
111		return PTR_ERR(base);
112
113	ret = of_property_read_u32(node, "xlnx,num-channels", &ch);
114	if (ret < 0) {
115		dev_err(dev, "cannot get supported channels\n");
116		return ret;
117	}
118	ch = ch * 2;
119
120	ret = of_property_read_u32(node, "xlnx,dwidth", &data_width);
121	if (ret < 0) {
122		dev_err(dev, "cannot get data width\n");
123		return ret;
124	}
125	switch (data_width) {
126	case 16:
127		format = SNDRV_PCM_FMTBIT_S16_LE;
128		break;
129	case 24:
130		format = SNDRV_PCM_FMTBIT_S24_LE;
131		break;
132	default:
133		return -EINVAL;
134	}
135
136	if (of_device_is_compatible(node, "xlnx,i2s-transmitter-1.0")) {
137		dai_drv->name = "xlnx_i2s_playback";
138		dai_drv->playback.stream_name = "Playback";
139		dai_drv->playback.formats = format;
140		dai_drv->playback.channels_min = ch;
141		dai_drv->playback.channels_max = ch;
142		dai_drv->playback.rates	= SNDRV_PCM_RATE_8000_192000;
143		dai_drv->ops = &xlnx_i2s_dai_ops;
144	} else if (of_device_is_compatible(node, "xlnx,i2s-receiver-1.0")) {
145		dai_drv->name = "xlnx_i2s_capture";
146		dai_drv->capture.stream_name = "Capture";
147		dai_drv->capture.formats = format;
148		dai_drv->capture.channels_min = ch;
149		dai_drv->capture.channels_max = ch;
150		dai_drv->capture.rates = SNDRV_PCM_RATE_8000_192000;
151		dai_drv->ops = &xlnx_i2s_dai_ops;
152	} else {
153		return -ENODEV;
154	}
155
156	dev_set_drvdata(&pdev->dev, base);
157
158	ret = devm_snd_soc_register_component(&pdev->dev, &xlnx_i2s_component,
159					      dai_drv, 1);
160	if (ret) {
161		dev_err(&pdev->dev, "i2s component registration failed\n");
162		return ret;
163	}
164
165	dev_info(&pdev->dev, "%s DAI registered\n", dai_drv->name);
166
167	return ret;
168}
169
170static struct platform_driver xlnx_i2s_aud_driver = {
171	.driver = {
172		.name = DRV_NAME,
173		.of_match_table = xlnx_i2s_of_match,
174	},
175	.probe = xlnx_i2s_probe,
176};
177
178module_platform_driver(xlnx_i2s_aud_driver);
179
180MODULE_LICENSE("GPL v2");
181MODULE_AUTHOR("Praveen Vuppala  <praveenv@xilinx.com>");
182MODULE_AUTHOR("Maruthi Srinivas Bayyavarapu <maruthis@xilinx.com>");
183