18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * omap-dmic.h -- OMAP Digital Microphone Controller 48c2ecf20Sopenharmony_ci */ 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ci#ifndef _OMAP_DMIC_H 78c2ecf20Sopenharmony_ci#define _OMAP_DMIC_H 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci#define OMAP_DMIC_REVISION_REG 0x00 108c2ecf20Sopenharmony_ci#define OMAP_DMIC_SYSCONFIG_REG 0x10 118c2ecf20Sopenharmony_ci#define OMAP_DMIC_IRQSTATUS_RAW_REG 0x24 128c2ecf20Sopenharmony_ci#define OMAP_DMIC_IRQSTATUS_REG 0x28 138c2ecf20Sopenharmony_ci#define OMAP_DMIC_IRQENABLE_SET_REG 0x2C 148c2ecf20Sopenharmony_ci#define OMAP_DMIC_IRQENABLE_CLR_REG 0x30 158c2ecf20Sopenharmony_ci#define OMAP_DMIC_IRQWAKE_EN_REG 0x34 168c2ecf20Sopenharmony_ci#define OMAP_DMIC_DMAENABLE_SET_REG 0x38 178c2ecf20Sopenharmony_ci#define OMAP_DMIC_DMAENABLE_CLR_REG 0x3C 188c2ecf20Sopenharmony_ci#define OMAP_DMIC_DMAWAKEEN_REG 0x40 198c2ecf20Sopenharmony_ci#define OMAP_DMIC_CTRL_REG 0x44 208c2ecf20Sopenharmony_ci#define OMAP_DMIC_DATA_REG 0x48 218c2ecf20Sopenharmony_ci#define OMAP_DMIC_FIFO_CTRL_REG 0x4C 228c2ecf20Sopenharmony_ci#define OMAP_DMIC_FIFO_DMIC1R_DATA_REG 0x50 238c2ecf20Sopenharmony_ci#define OMAP_DMIC_FIFO_DMIC1L_DATA_REG 0x54 248c2ecf20Sopenharmony_ci#define OMAP_DMIC_FIFO_DMIC2R_DATA_REG 0x58 258c2ecf20Sopenharmony_ci#define OMAP_DMIC_FIFO_DMIC2L_DATA_REG 0x5C 268c2ecf20Sopenharmony_ci#define OMAP_DMIC_FIFO_DMIC3R_DATA_REG 0x60 278c2ecf20Sopenharmony_ci#define OMAP_DMIC_FIFO_DMIC3L_DATA_REG 0x64 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci/* IRQSTATUS_RAW, IRQSTATUS, IRQENABLE_SET, IRQENABLE_CLR bit fields */ 308c2ecf20Sopenharmony_ci#define OMAP_DMIC_IRQ (1 << 0) 318c2ecf20Sopenharmony_ci#define OMAP_DMIC_IRQ_FULL (1 << 1) 328c2ecf20Sopenharmony_ci#define OMAP_DMIC_IRQ_ALMST_EMPTY (1 << 2) 338c2ecf20Sopenharmony_ci#define OMAP_DMIC_IRQ_EMPTY (1 << 3) 348c2ecf20Sopenharmony_ci#define OMAP_DMIC_IRQ_MASK 0x07 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci/* DMIC_DMAENABLE bit fields */ 378c2ecf20Sopenharmony_ci#define OMAP_DMIC_DMA_ENABLE 0x1 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci/* DMIC_CTRL bit fields */ 408c2ecf20Sopenharmony_ci#define OMAP_DMIC_UP1_ENABLE (1 << 0) 418c2ecf20Sopenharmony_ci#define OMAP_DMIC_UP2_ENABLE (1 << 1) 428c2ecf20Sopenharmony_ci#define OMAP_DMIC_UP3_ENABLE (1 << 2) 438c2ecf20Sopenharmony_ci#define OMAP_DMIC_UP_ENABLE_MASK 0x7 448c2ecf20Sopenharmony_ci#define OMAP_DMIC_FORMAT (1 << 3) 458c2ecf20Sopenharmony_ci#define OMAP_DMIC_POLAR1 (1 << 4) 468c2ecf20Sopenharmony_ci#define OMAP_DMIC_POLAR2 (1 << 5) 478c2ecf20Sopenharmony_ci#define OMAP_DMIC_POLAR3 (1 << 6) 488c2ecf20Sopenharmony_ci#define OMAP_DMIC_POLAR_MASK (0x7 << 4) 498c2ecf20Sopenharmony_ci#define OMAP_DMIC_CLK_DIV(x) (((x) & 0x7) << 7) 508c2ecf20Sopenharmony_ci#define OMAP_DMIC_CLK_DIV_MASK (0x7 << 7) 518c2ecf20Sopenharmony_ci#define OMAP_DMIC_RESET (1 << 10) 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci#define OMAP_DMICOUTFORMAT_LJUST (0 << 3) 548c2ecf20Sopenharmony_ci#define OMAP_DMICOUTFORMAT_RJUST (1 << 3) 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci/* DMIC_FIFO_CTRL bit fields */ 578c2ecf20Sopenharmony_ci#define OMAP_DMIC_THRES_MAX 0xF 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_cienum omap_dmic_clk { 608c2ecf20Sopenharmony_ci OMAP_DMIC_SYSCLK_PAD_CLKS, /* PAD_CLKS */ 618c2ecf20Sopenharmony_ci OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS, /* SLIMBUS_CLK */ 628c2ecf20Sopenharmony_ci OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS, /* DMIC_SYNC_MUX_CLK */ 638c2ecf20Sopenharmony_ci OMAP_DMIC_ABE_DMIC_CLK, /* abe_dmic_clk */ 648c2ecf20Sopenharmony_ci}; 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ci#endif 67