18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * SPEAr SPDIF OUT controller header file 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (ST) 2011 Vipin Kumar (vipin.kumar@st.com) 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#ifndef SPDIF_OUT_REGS_H 98c2ecf20Sopenharmony_ci#define SPDIF_OUT_REGS_H 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci#define SPDIF_OUT_SOFT_RST 0x00 128c2ecf20Sopenharmony_ci #define SPDIF_OUT_RESET (1 << 0) 138c2ecf20Sopenharmony_ci#define SPDIF_OUT_FIFO_DATA 0x04 148c2ecf20Sopenharmony_ci#define SPDIF_OUT_INT_STA 0x08 158c2ecf20Sopenharmony_ci#define SPDIF_OUT_INT_STA_CLR 0x0C 168c2ecf20Sopenharmony_ci #define SPDIF_INT_UNDERFLOW (1 << 0) 178c2ecf20Sopenharmony_ci #define SPDIF_INT_EODATA (1 << 1) 188c2ecf20Sopenharmony_ci #define SPDIF_INT_EOBLOCK (1 << 2) 198c2ecf20Sopenharmony_ci #define SPDIF_INT_EOLATENCY (1 << 3) 208c2ecf20Sopenharmony_ci #define SPDIF_INT_EOPD_DATA (1 << 4) 218c2ecf20Sopenharmony_ci #define SPDIF_INT_MEMFULLREAD (1 << 5) 228c2ecf20Sopenharmony_ci #define SPDIF_INT_EOPD_PAUSE (1 << 6) 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci#define SPDIF_OUT_INT_EN 0x10 258c2ecf20Sopenharmony_ci#define SPDIF_OUT_INT_EN_SET 0x14 268c2ecf20Sopenharmony_ci#define SPDIF_OUT_INT_EN_CLR 0x18 278c2ecf20Sopenharmony_ci#define SPDIF_OUT_CTRL 0x1C 288c2ecf20Sopenharmony_ci #define SPDIF_OPMODE_MASK (7 << 0) 298c2ecf20Sopenharmony_ci #define SPDIF_OPMODE_OFF (0 << 0) 308c2ecf20Sopenharmony_ci #define SPDIF_OPMODE_MUTE_PCM (1 << 0) 318c2ecf20Sopenharmony_ci #define SPDIF_OPMODE_MUTE_PAUSE (2 << 0) 328c2ecf20Sopenharmony_ci #define SPDIF_OPMODE_AUD_DATA (3 << 0) 338c2ecf20Sopenharmony_ci #define SPDIF_OPMODE_ENCODE (4 << 0) 348c2ecf20Sopenharmony_ci #define SPDIF_STATE_NORMAL (1 << 3) 358c2ecf20Sopenharmony_ci #define SPDIF_DIVIDER_MASK (0xff << 5) 368c2ecf20Sopenharmony_ci #define SPDIF_DIVIDER_SHIFT (5) 378c2ecf20Sopenharmony_ci #define SPDIF_SAMPLEREAD_MASK (0x1ffff << 15) 388c2ecf20Sopenharmony_ci #define SPDIF_SAMPLEREAD_SHIFT (15) 398c2ecf20Sopenharmony_ci#define SPDIF_OUT_STA 0x20 408c2ecf20Sopenharmony_ci#define SPDIF_OUT_PA_PB 0x24 418c2ecf20Sopenharmony_ci#define SPDIF_OUT_PC_PD 0x28 428c2ecf20Sopenharmony_ci#define SPDIF_OUT_CL1 0x2C 438c2ecf20Sopenharmony_ci#define SPDIF_OUT_CR1 0x30 448c2ecf20Sopenharmony_ci#define SPDIF_OUT_CL2_CR2_UV 0x34 458c2ecf20Sopenharmony_ci#define SPDIF_OUT_PAUSE_LAT 0x38 468c2ecf20Sopenharmony_ci#define SPDIF_OUT_FRMLEN_BRST 0x3C 478c2ecf20Sopenharmony_ci#define SPDIF_OUT_CFG 0x40 488c2ecf20Sopenharmony_ci #define SPDIF_OUT_MEMFMT_16_0 (0 << 5) 498c2ecf20Sopenharmony_ci #define SPDIF_OUT_MEMFMT_16_16 (1 << 5) 508c2ecf20Sopenharmony_ci #define SPDIF_OUT_VALID_DMA (0 << 3) 518c2ecf20Sopenharmony_ci #define SPDIF_OUT_VALID_HW (1 << 3) 528c2ecf20Sopenharmony_ci #define SPDIF_OUT_USER_DMA (0 << 2) 538c2ecf20Sopenharmony_ci #define SPDIF_OUT_USER_HW (1 << 2) 548c2ecf20Sopenharmony_ci #define SPDIF_OUT_CHNLSTA_DMA (0 << 1) 558c2ecf20Sopenharmony_ci #define SPDIF_OUT_CHNLSTA_HW (1 << 1) 568c2ecf20Sopenharmony_ci #define SPDIF_OUT_PARITY_HW (0 << 0) 578c2ecf20Sopenharmony_ci #define SPDIF_OUT_PARITY_DMA (1 << 0) 588c2ecf20Sopenharmony_ci #define SPDIF_OUT_FDMA_TRIG_2 (2 << 8) 598c2ecf20Sopenharmony_ci #define SPDIF_OUT_FDMA_TRIG_6 (6 << 8) 608c2ecf20Sopenharmony_ci #define SPDIF_OUT_FDMA_TRIG_8 (8 << 8) 618c2ecf20Sopenharmony_ci #define SPDIF_OUT_FDMA_TRIG_10 (10 << 8) 628c2ecf20Sopenharmony_ci #define SPDIF_OUT_FDMA_TRIG_12 (12 << 8) 638c2ecf20Sopenharmony_ci #define SPDIF_OUT_FDMA_TRIG_16 (16 << 8) 648c2ecf20Sopenharmony_ci #define SPDIF_OUT_FDMA_TRIG_18 (18 << 8) 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ci#endif /* SPDIF_OUT_REGS_H */ 67