1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 2/* 3 * This file is provided under a dual BSD/GPLv2 license. When using or 4 * redistributing this file, you may do so under either license. 5 * 6 * Copyright(c) 2018 Intel Corporation. All rights reserved. 7 * 8 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9 */ 10 11#ifndef __SOUND_SOC_SOF_PRIV_H 12#define __SOUND_SOC_SOF_PRIV_H 13 14#include <linux/device.h> 15#include <sound/hdaudio.h> 16#include <sound/sof.h> 17#include <sound/sof/info.h> 18#include <sound/sof/pm.h> 19#include <sound/sof/trace.h> 20#include <uapi/sound/sof/fw.h> 21 22/* debug flags */ 23#define SOF_DBG_ENABLE_TRACE BIT(0) 24#define SOF_DBG_REGS BIT(1) 25#define SOF_DBG_MBOX BIT(2) 26#define SOF_DBG_TEXT BIT(3) 27#define SOF_DBG_PCI BIT(4) 28#define SOF_DBG_RETAIN_CTX BIT(5) /* prevent DSP D3 on FW exception */ 29 30/* global debug state set by SOF_DBG_ flags */ 31extern int sof_core_debug; 32 33/* max BARs mmaped devices can use */ 34#define SND_SOF_BARS 8 35 36/* time in ms for runtime suspend delay */ 37#define SND_SOF_SUSPEND_DELAY_MS 2000 38 39/* DMA buffer size for trace */ 40#define DMA_BUF_SIZE_FOR_TRACE (PAGE_SIZE * 16) 41 42#define SOF_IPC_DSP_REPLY 0 43#define SOF_IPC_HOST_REPLY 1 44 45/* convenience constructor for DAI driver streams */ 46#define SOF_DAI_STREAM(sname, scmin, scmax, srates, sfmt) \ 47 {.stream_name = sname, .channels_min = scmin, .channels_max = scmax, \ 48 .rates = srates, .formats = sfmt} 49 50#define SOF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | \ 51 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_FLOAT) 52 53#define ENABLE_DEBUGFS_CACHEBUF \ 54 (IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_ENABLE_DEBUGFS_CACHE) || \ 55 IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_IPC_FLOOD_TEST)) 56 57/* So far the primary core on all DSPs has ID 0 */ 58#define SOF_DSP_PRIMARY_CORE 0 59 60/* DSP power state */ 61enum sof_dsp_power_states { 62 SOF_DSP_PM_D0, 63 SOF_DSP_PM_D1, 64 SOF_DSP_PM_D2, 65 SOF_DSP_PM_D3_HOT, 66 SOF_DSP_PM_D3, 67 SOF_DSP_PM_D3_COLD, 68}; 69 70struct sof_dsp_power_state { 71 u32 state; 72 u32 substate; /* platform-specific */ 73}; 74 75/* System suspend target state */ 76enum sof_system_suspend_state { 77 SOF_SUSPEND_NONE = 0, 78 SOF_SUSPEND_S0IX, 79 SOF_SUSPEND_S3, 80}; 81 82struct snd_sof_dev; 83struct snd_sof_ipc_msg; 84struct snd_sof_ipc; 85struct snd_sof_debugfs_map; 86struct snd_soc_tplg_ops; 87struct snd_soc_component; 88struct snd_sof_pdata; 89 90/* 91 * SOF DSP HW abstraction operations. 92 * Used to abstract DSP HW architecture and any IO busses between host CPU 93 * and DSP device(s). 94 */ 95struct snd_sof_dsp_ops { 96 97 /* probe and remove */ 98 int (*probe)(struct snd_sof_dev *sof_dev); /* mandatory */ 99 int (*remove)(struct snd_sof_dev *sof_dev); /* optional */ 100 101 /* DSP core boot / reset */ 102 int (*run)(struct snd_sof_dev *sof_dev); /* mandatory */ 103 int (*stall)(struct snd_sof_dev *sof_dev); /* optional */ 104 int (*reset)(struct snd_sof_dev *sof_dev); /* optional */ 105 int (*core_power_up)(struct snd_sof_dev *sof_dev, 106 unsigned int core_mask); /* optional */ 107 int (*core_power_down)(struct snd_sof_dev *sof_dev, 108 unsigned int core_mask); /* optional */ 109 110 /* 111 * Register IO: only used by respective drivers themselves, 112 * TODO: consider removing these operations and calling respective 113 * implementations directly 114 */ 115 void (*write)(struct snd_sof_dev *sof_dev, void __iomem *addr, 116 u32 value); /* optional */ 117 u32 (*read)(struct snd_sof_dev *sof_dev, 118 void __iomem *addr); /* optional */ 119 void (*write64)(struct snd_sof_dev *sof_dev, void __iomem *addr, 120 u64 value); /* optional */ 121 u64 (*read64)(struct snd_sof_dev *sof_dev, 122 void __iomem *addr); /* optional */ 123 124 /* memcpy IO */ 125 void (*block_read)(struct snd_sof_dev *sof_dev, u32 bar, 126 u32 offset, void *dest, 127 size_t size); /* mandatory */ 128 void (*block_write)(struct snd_sof_dev *sof_dev, u32 bar, 129 u32 offset, void *src, 130 size_t size); /* mandatory */ 131 132 /* doorbell */ 133 irqreturn_t (*irq_handler)(int irq, void *context); /* optional */ 134 irqreturn_t (*irq_thread)(int irq, void *context); /* optional */ 135 136 /* ipc */ 137 int (*send_msg)(struct snd_sof_dev *sof_dev, 138 struct snd_sof_ipc_msg *msg); /* mandatory */ 139 140 /* FW loading */ 141 int (*load_firmware)(struct snd_sof_dev *sof_dev); /* mandatory */ 142 int (*load_module)(struct snd_sof_dev *sof_dev, 143 struct snd_sof_mod_hdr *hdr); /* optional */ 144 /* 145 * FW ready checks for ABI compatibility and creates 146 * memory windows at first boot 147 */ 148 int (*fw_ready)(struct snd_sof_dev *sdev, u32 msg_id); /* mandatory */ 149 150 /* connect pcm substream to a host stream */ 151 int (*pcm_open)(struct snd_sof_dev *sdev, 152 struct snd_pcm_substream *substream); /* optional */ 153 /* disconnect pcm substream to a host stream */ 154 int (*pcm_close)(struct snd_sof_dev *sdev, 155 struct snd_pcm_substream *substream); /* optional */ 156 157 /* host stream hw params */ 158 int (*pcm_hw_params)(struct snd_sof_dev *sdev, 159 struct snd_pcm_substream *substream, 160 struct snd_pcm_hw_params *params, 161 struct sof_ipc_stream_params *ipc_params); /* optional */ 162 163 /* host stream hw_free */ 164 int (*pcm_hw_free)(struct snd_sof_dev *sdev, 165 struct snd_pcm_substream *substream); /* optional */ 166 167 /* host stream trigger */ 168 int (*pcm_trigger)(struct snd_sof_dev *sdev, 169 struct snd_pcm_substream *substream, 170 int cmd); /* optional */ 171 172 /* host stream pointer */ 173 snd_pcm_uframes_t (*pcm_pointer)(struct snd_sof_dev *sdev, 174 struct snd_pcm_substream *substream); /* optional */ 175 176#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES) 177 /* Except for probe_pointer, all probe ops are mandatory */ 178 int (*probe_assign)(struct snd_sof_dev *sdev, 179 struct snd_compr_stream *cstream, 180 struct snd_soc_dai *dai); /* mandatory */ 181 int (*probe_free)(struct snd_sof_dev *sdev, 182 struct snd_compr_stream *cstream, 183 struct snd_soc_dai *dai); /* mandatory */ 184 int (*probe_set_params)(struct snd_sof_dev *sdev, 185 struct snd_compr_stream *cstream, 186 struct snd_compr_params *params, 187 struct snd_soc_dai *dai); /* mandatory */ 188 int (*probe_trigger)(struct snd_sof_dev *sdev, 189 struct snd_compr_stream *cstream, int cmd, 190 struct snd_soc_dai *dai); /* mandatory */ 191 int (*probe_pointer)(struct snd_sof_dev *sdev, 192 struct snd_compr_stream *cstream, 193 struct snd_compr_tstamp *tstamp, 194 struct snd_soc_dai *dai); /* optional */ 195#endif 196 197 /* host read DSP stream data */ 198 void (*ipc_msg_data)(struct snd_sof_dev *sdev, 199 struct snd_pcm_substream *substream, 200 void *p, size_t sz); /* mandatory */ 201 202 /* host configure DSP HW parameters */ 203 int (*ipc_pcm_params)(struct snd_sof_dev *sdev, 204 struct snd_pcm_substream *substream, 205 const struct sof_ipc_pcm_params_reply *reply); /* mandatory */ 206 207 /* pre/post firmware run */ 208 int (*pre_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 209 int (*post_fw_run)(struct snd_sof_dev *sof_dev); /* optional */ 210 211 /* DSP PM */ 212 int (*suspend)(struct snd_sof_dev *sof_dev, 213 u32 target_state); /* optional */ 214 int (*resume)(struct snd_sof_dev *sof_dev); /* optional */ 215 int (*runtime_suspend)(struct snd_sof_dev *sof_dev); /* optional */ 216 int (*runtime_resume)(struct snd_sof_dev *sof_dev); /* optional */ 217 int (*runtime_idle)(struct snd_sof_dev *sof_dev); /* optional */ 218 int (*set_hw_params_upon_resume)(struct snd_sof_dev *sdev); /* optional */ 219 int (*set_power_state)(struct snd_sof_dev *sdev, 220 const struct sof_dsp_power_state *target_state); /* optional */ 221 222 /* DSP clocking */ 223 int (*set_clk)(struct snd_sof_dev *sof_dev, u32 freq); /* optional */ 224 225 /* debug */ 226 const struct snd_sof_debugfs_map *debug_map; /* optional */ 227 int debug_map_count; /* optional */ 228 void (*dbg_dump)(struct snd_sof_dev *sof_dev, 229 u32 flags); /* optional */ 230 void (*ipc_dump)(struct snd_sof_dev *sof_dev); /* optional */ 231 232 /* host DMA trace initialization */ 233 int (*trace_init)(struct snd_sof_dev *sdev, 234 u32 *stream_tag); /* optional */ 235 int (*trace_release)(struct snd_sof_dev *sdev); /* optional */ 236 int (*trace_trigger)(struct snd_sof_dev *sdev, 237 int cmd); /* optional */ 238 239 /* misc */ 240 int (*get_bar_index)(struct snd_sof_dev *sdev, 241 u32 type); /* optional */ 242 int (*get_mailbox_offset)(struct snd_sof_dev *sdev);/* mandatory for common loader code */ 243 int (*get_window_offset)(struct snd_sof_dev *sdev, 244 u32 id);/* mandatory for common loader code */ 245 246 /* machine driver ops */ 247 int (*machine_register)(struct snd_sof_dev *sdev, 248 void *pdata); /* optional */ 249 void (*machine_unregister)(struct snd_sof_dev *sdev, 250 void *pdata); /* optional */ 251 void (*machine_select)(struct snd_sof_dev *sdev); /* optional */ 252 void (*set_mach_params)(const struct snd_soc_acpi_mach *mach, 253 struct device *dev); /* optional */ 254 255 /* DAI ops */ 256 struct snd_soc_dai_driver *drv; 257 int num_drv; 258 259 /* ALSA HW info flags, will be stored in snd_pcm_runtime.hw.info */ 260 u32 hw_info; 261 262 const struct sof_arch_ops *arch_ops; 263}; 264 265/* DSP architecture specific callbacks for oops and stack dumps */ 266struct sof_arch_ops { 267 void (*dsp_oops)(struct snd_sof_dev *sdev, void *oops); 268 void (*dsp_stack)(struct snd_sof_dev *sdev, void *oops, 269 u32 *stack, u32 stack_words); 270}; 271 272#define sof_arch_ops(sdev) ((sdev)->pdata->desc->ops->arch_ops) 273 274/* DSP device HW descriptor mapping between bus ID and ops */ 275struct sof_ops_table { 276 const struct sof_dev_desc *desc; 277 const struct snd_sof_dsp_ops *ops; 278}; 279 280enum sof_dfsentry_type { 281 SOF_DFSENTRY_TYPE_IOMEM = 0, 282 SOF_DFSENTRY_TYPE_BUF, 283}; 284 285enum sof_debugfs_access_type { 286 SOF_DEBUGFS_ACCESS_ALWAYS = 0, 287 SOF_DEBUGFS_ACCESS_D0_ONLY, 288}; 289 290/* FS entry for debug files that can expose DSP memories, registers */ 291struct snd_sof_dfsentry { 292 size_t size; 293 enum sof_dfsentry_type type; 294 /* 295 * access_type specifies if the 296 * memory -> DSP resource (memory, register etc) is always accessible 297 * or if it is accessible only when the DSP is in D0. 298 */ 299 enum sof_debugfs_access_type access_type; 300#if ENABLE_DEBUGFS_CACHEBUF 301 char *cache_buf; /* buffer to cache the contents of debugfs memory */ 302#endif 303 struct snd_sof_dev *sdev; 304 struct list_head list; /* list in sdev dfsentry list */ 305 union { 306 void __iomem *io_mem; 307 void *buf; 308 }; 309}; 310 311/* Debug mapping for any DSP memory or registers that can used for debug */ 312struct snd_sof_debugfs_map { 313 const char *name; 314 u32 bar; 315 u32 offset; 316 u32 size; 317 /* 318 * access_type specifies if the memory is always accessible 319 * or if it is accessible only when the DSP is in D0. 320 */ 321 enum sof_debugfs_access_type access_type; 322}; 323 324/* mailbox descriptor, used for host <-> DSP IPC */ 325struct snd_sof_mailbox { 326 u32 offset; 327 size_t size; 328}; 329 330/* IPC message descriptor for host <-> DSP IO */ 331struct snd_sof_ipc_msg { 332 /* message data */ 333 u32 header; 334 void *msg_data; 335 void *reply_data; 336 size_t msg_size; 337 size_t reply_size; 338 int reply_error; 339 340 wait_queue_head_t waitq; 341 bool ipc_complete; 342}; 343 344enum snd_sof_fw_state { 345 SOF_FW_BOOT_NOT_STARTED = 0, 346 SOF_FW_BOOT_PREPARE, 347 SOF_FW_BOOT_IN_PROGRESS, 348 SOF_FW_BOOT_FAILED, 349 SOF_FW_BOOT_READY_FAILED, /* firmware booted but fw_ready op failed */ 350 SOF_FW_BOOT_COMPLETE, 351}; 352 353/* 354 * SOF Device Level. 355 */ 356struct snd_sof_dev { 357 struct device *dev; 358 spinlock_t ipc_lock; /* lock for IPC users */ 359 spinlock_t hw_lock; /* lock for HW IO access */ 360 361 /* 362 * ASoC components. plat_drv fields are set dynamically so 363 * can't use const 364 */ 365 struct snd_soc_component_driver plat_drv; 366 367 /* current DSP power state */ 368 struct sof_dsp_power_state dsp_power_state; 369 370 /* Intended power target of system suspend */ 371 enum sof_system_suspend_state system_suspend_target; 372 373 /* DSP firmware boot */ 374 wait_queue_head_t boot_wait; 375 enum snd_sof_fw_state fw_state; 376 bool first_boot; 377 378 /* work queue in case the probe is implemented in two steps */ 379 struct work_struct probe_work; 380 381 /* DSP HW differentiation */ 382 struct snd_sof_pdata *pdata; 383 384 /* IPC */ 385 struct snd_sof_ipc *ipc; 386 struct snd_sof_mailbox dsp_box; /* DSP initiated IPC */ 387 struct snd_sof_mailbox host_box; /* Host initiated IPC */ 388 struct snd_sof_mailbox stream_box; /* Stream position update */ 389 struct snd_sof_mailbox debug_box; /* Debug info updates */ 390 struct snd_sof_ipc_msg *msg; 391 int ipc_irq; 392 u32 next_comp_id; /* monotonic - reset during S3 */ 393 394 /* memory bases for mmaped DSPs - set by dsp_init() */ 395 void __iomem *bar[SND_SOF_BARS]; /* DSP base address */ 396 int mmio_bar; 397 int mailbox_bar; 398 size_t dsp_oops_offset; 399 400 /* debug */ 401 struct dentry *debugfs_root; 402 struct list_head dfsentry_list; 403 404 /* firmware loader */ 405 struct snd_dma_buffer dmab; 406 struct snd_dma_buffer dmab_bdl; 407 struct sof_ipc_fw_ready fw_ready; 408 struct sof_ipc_fw_version fw_version; 409 struct sof_ipc_cc_version *cc_version; 410 411 /* topology */ 412 struct snd_soc_tplg_ops *tplg_ops; 413 struct list_head pcm_list; 414 struct list_head kcontrol_list; 415 struct list_head widget_list; 416 struct list_head dai_list; 417 struct list_head route_list; 418 struct snd_soc_component *component; 419 u32 enabled_cores_mask; /* keep track of enabled cores */ 420 421 /* FW configuration */ 422 struct sof_ipc_window *info_window; 423 424 /* IPC timeouts in ms */ 425 int ipc_timeout; 426 int boot_timeout; 427 428#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_PROBES) 429 unsigned int extractor_stream_tag; 430#endif 431 432 /* DMA for Trace */ 433 struct snd_dma_buffer dmatb; 434 struct snd_dma_buffer dmatp; 435 int dma_trace_pages; 436 wait_queue_head_t trace_sleep; 437 u32 host_offset; 438 bool dtrace_is_supported; /* set with Kconfig or module parameter */ 439 bool dtrace_is_enabled; 440 bool dtrace_error; 441 bool dtrace_draining; 442 443 bool msi_enabled; 444 445 void *private; /* core does not touch this */ 446}; 447 448/* 449 * Device Level. 450 */ 451 452int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data); 453int snd_sof_device_remove(struct device *dev); 454 455int snd_sof_runtime_suspend(struct device *dev); 456int snd_sof_runtime_resume(struct device *dev); 457int snd_sof_runtime_idle(struct device *dev); 458int snd_sof_resume(struct device *dev); 459int snd_sof_suspend(struct device *dev); 460int snd_sof_dsp_power_down_notify(struct snd_sof_dev *sdev); 461int snd_sof_prepare(struct device *dev); 462void snd_sof_complete(struct device *dev); 463 464void snd_sof_new_platform_drv(struct snd_sof_dev *sdev); 465 466int snd_sof_create_page_table(struct device *dev, 467 struct snd_dma_buffer *dmab, 468 unsigned char *page_table, size_t size); 469 470/* 471 * Firmware loading. 472 */ 473int snd_sof_load_firmware(struct snd_sof_dev *sdev); 474int snd_sof_load_firmware_raw(struct snd_sof_dev *sdev); 475int snd_sof_load_firmware_memcpy(struct snd_sof_dev *sdev); 476int snd_sof_run_firmware(struct snd_sof_dev *sdev); 477int snd_sof_parse_module_memcpy(struct snd_sof_dev *sdev, 478 struct snd_sof_mod_hdr *module); 479void snd_sof_fw_unload(struct snd_sof_dev *sdev); 480int snd_sof_fw_parse_ext_data(struct snd_sof_dev *sdev, u32 bar, u32 offset); 481 482/* 483 * IPC low level APIs. 484 */ 485struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev); 486void snd_sof_ipc_free(struct snd_sof_dev *sdev); 487void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id); 488void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev); 489int snd_sof_ipc_stream_pcm_params(struct snd_sof_dev *sdev, 490 struct sof_ipc_pcm_params *params); 491int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox, 492 size_t dspbox_size, u32 hostbox, 493 size_t hostbox_size); 494int snd_sof_ipc_valid(struct snd_sof_dev *sdev); 495int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header, 496 void *msg_data, size_t msg_bytes, void *reply_data, 497 size_t reply_bytes); 498int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, u32 header, 499 void *msg_data, size_t msg_bytes, 500 void *reply_data, size_t reply_bytes); 501 502/* 503 * Trace/debug 504 */ 505int snd_sof_init_trace(struct snd_sof_dev *sdev); 506void snd_sof_release_trace(struct snd_sof_dev *sdev); 507void snd_sof_free_trace(struct snd_sof_dev *sdev); 508int snd_sof_dbg_init(struct snd_sof_dev *sdev); 509void snd_sof_free_debug(struct snd_sof_dev *sdev); 510int snd_sof_debugfs_io_item(struct snd_sof_dev *sdev, 511 void __iomem *base, size_t size, 512 const char *name, 513 enum sof_debugfs_access_type access_type); 514int snd_sof_debugfs_buf_item(struct snd_sof_dev *sdev, 515 void *base, size_t size, 516 const char *name, mode_t mode); 517int snd_sof_trace_update_pos(struct snd_sof_dev *sdev, 518 struct sof_ipc_dma_trace_posn *posn); 519void snd_sof_trace_notify_for_error(struct snd_sof_dev *sdev); 520void snd_sof_get_status(struct snd_sof_dev *sdev, u32 panic_code, 521 u32 tracep_code, void *oops, 522 struct sof_ipc_panic_info *panic_info, 523 void *stack, size_t stack_words); 524int snd_sof_init_trace_ipc(struct snd_sof_dev *sdev); 525void snd_sof_handle_fw_exception(struct snd_sof_dev *sdev); 526 527/* 528 * Platform specific ops. 529 */ 530extern struct snd_compress_ops sof_compressed_ops; 531 532/* 533 * DSP Architectures. 534 */ 535static inline void sof_stack(struct snd_sof_dev *sdev, void *oops, u32 *stack, 536 u32 stack_words) 537{ 538 sof_arch_ops(sdev)->dsp_stack(sdev, oops, stack, stack_words); 539} 540 541static inline void sof_oops(struct snd_sof_dev *sdev, void *oops) 542{ 543 if (sof_arch_ops(sdev)->dsp_oops) 544 sof_arch_ops(sdev)->dsp_oops(sdev, oops); 545} 546 547extern const struct sof_arch_ops sof_xtensa_arch_ops; 548 549/* 550 * Utilities 551 */ 552void sof_io_write(struct snd_sof_dev *sdev, void __iomem *addr, u32 value); 553void sof_io_write64(struct snd_sof_dev *sdev, void __iomem *addr, u64 value); 554u32 sof_io_read(struct snd_sof_dev *sdev, void __iomem *addr); 555u64 sof_io_read64(struct snd_sof_dev *sdev, void __iomem *addr); 556void sof_mailbox_write(struct snd_sof_dev *sdev, u32 offset, 557 void *message, size_t bytes); 558void sof_mailbox_read(struct snd_sof_dev *sdev, u32 offset, 559 void *message, size_t bytes); 560void sof_block_write(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *src, 561 size_t size); 562void sof_block_read(struct snd_sof_dev *sdev, u32 bar, u32 offset, void *dest, 563 size_t size); 564 565int sof_fw_ready(struct snd_sof_dev *sdev, u32 msg_id); 566 567void intel_ipc_msg_data(struct snd_sof_dev *sdev, 568 struct snd_pcm_substream *substream, 569 void *p, size_t sz); 570int intel_ipc_pcm_params(struct snd_sof_dev *sdev, 571 struct snd_pcm_substream *substream, 572 const struct sof_ipc_pcm_params_reply *reply); 573 574int intel_pcm_open(struct snd_sof_dev *sdev, 575 struct snd_pcm_substream *substream); 576int intel_pcm_close(struct snd_sof_dev *sdev, 577 struct snd_pcm_substream *substream); 578 579int sof_machine_check(struct snd_sof_dev *sdev); 580 581#define sof_dev_dbg_or_err(dev, is_err, fmt, ...) \ 582 do { \ 583 if (is_err) \ 584 dev_err(dev, "error: " fmt, __VA_ARGS__); \ 585 else \ 586 dev_dbg(dev, fmt, __VA_ARGS__); \ 587 } while (0) 588 589#endif 590