1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2// 3// This file is provided under a dual BSD/GPLv2 license. When using or 4// redistributing this file, you may do so under either license. 5// 6// Copyright(c) 2018 Intel Corporation. All rights reserved. 7// 8// Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 9// 10// Generic IPC layer that can work over MMIO and SPI/I2C. PHY layer provided 11// by platform driver code. 12// 13 14#include <linux/mutex.h> 15#include <linux/types.h> 16 17#include "sof-priv.h" 18#include "sof-audio.h" 19#include "ops.h" 20 21static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id); 22static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd); 23 24/* 25 * IPC message Tx/Rx message handling. 26 */ 27 28/* SOF generic IPC data */ 29struct snd_sof_ipc { 30 struct snd_sof_dev *sdev; 31 32 /* protects messages and the disable flag */ 33 struct mutex tx_mutex; 34 /* disables further sending of ipc's */ 35 bool disable_ipc_tx; 36 37 struct snd_sof_ipc_msg msg; 38}; 39 40struct sof_ipc_ctrl_data_params { 41 size_t msg_bytes; 42 size_t hdr_bytes; 43 size_t pl_size; 44 size_t elems; 45 u32 num_msg; 46 u8 *src; 47 u8 *dst; 48}; 49 50#if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC) 51static void ipc_log_header(struct device *dev, u8 *text, u32 cmd) 52{ 53 u8 *str; 54 u8 *str2 = NULL; 55 u32 glb; 56 u32 type; 57 bool vdbg = false; 58 59 glb = cmd & SOF_GLB_TYPE_MASK; 60 type = cmd & SOF_CMD_TYPE_MASK; 61 62 switch (glb) { 63 case SOF_IPC_GLB_REPLY: 64 str = "GLB_REPLY"; break; 65 case SOF_IPC_GLB_COMPOUND: 66 str = "GLB_COMPOUND"; break; 67 case SOF_IPC_GLB_TPLG_MSG: 68 str = "GLB_TPLG_MSG"; 69 switch (type) { 70 case SOF_IPC_TPLG_COMP_NEW: 71 str2 = "COMP_NEW"; break; 72 case SOF_IPC_TPLG_COMP_FREE: 73 str2 = "COMP_FREE"; break; 74 case SOF_IPC_TPLG_COMP_CONNECT: 75 str2 = "COMP_CONNECT"; break; 76 case SOF_IPC_TPLG_PIPE_NEW: 77 str2 = "PIPE_NEW"; break; 78 case SOF_IPC_TPLG_PIPE_FREE: 79 str2 = "PIPE_FREE"; break; 80 case SOF_IPC_TPLG_PIPE_CONNECT: 81 str2 = "PIPE_CONNECT"; break; 82 case SOF_IPC_TPLG_PIPE_COMPLETE: 83 str2 = "PIPE_COMPLETE"; break; 84 case SOF_IPC_TPLG_BUFFER_NEW: 85 str2 = "BUFFER_NEW"; break; 86 case SOF_IPC_TPLG_BUFFER_FREE: 87 str2 = "BUFFER_FREE"; break; 88 default: 89 str2 = "unknown type"; break; 90 } 91 break; 92 case SOF_IPC_GLB_PM_MSG: 93 str = "GLB_PM_MSG"; 94 switch (type) { 95 case SOF_IPC_PM_CTX_SAVE: 96 str2 = "CTX_SAVE"; break; 97 case SOF_IPC_PM_CTX_RESTORE: 98 str2 = "CTX_RESTORE"; break; 99 case SOF_IPC_PM_CTX_SIZE: 100 str2 = "CTX_SIZE"; break; 101 case SOF_IPC_PM_CLK_SET: 102 str2 = "CLK_SET"; break; 103 case SOF_IPC_PM_CLK_GET: 104 str2 = "CLK_GET"; break; 105 case SOF_IPC_PM_CLK_REQ: 106 str2 = "CLK_REQ"; break; 107 case SOF_IPC_PM_CORE_ENABLE: 108 str2 = "CORE_ENABLE"; break; 109 default: 110 str2 = "unknown type"; break; 111 } 112 break; 113 case SOF_IPC_GLB_COMP_MSG: 114 str = "GLB_COMP_MSG"; 115 switch (type) { 116 case SOF_IPC_COMP_SET_VALUE: 117 str2 = "SET_VALUE"; break; 118 case SOF_IPC_COMP_GET_VALUE: 119 str2 = "GET_VALUE"; break; 120 case SOF_IPC_COMP_SET_DATA: 121 str2 = "SET_DATA"; break; 122 case SOF_IPC_COMP_GET_DATA: 123 str2 = "GET_DATA"; break; 124 default: 125 str2 = "unknown type"; break; 126 } 127 break; 128 case SOF_IPC_GLB_STREAM_MSG: 129 str = "GLB_STREAM_MSG"; 130 switch (type) { 131 case SOF_IPC_STREAM_PCM_PARAMS: 132 str2 = "PCM_PARAMS"; break; 133 case SOF_IPC_STREAM_PCM_PARAMS_REPLY: 134 str2 = "PCM_REPLY"; break; 135 case SOF_IPC_STREAM_PCM_FREE: 136 str2 = "PCM_FREE"; break; 137 case SOF_IPC_STREAM_TRIG_START: 138 str2 = "TRIG_START"; break; 139 case SOF_IPC_STREAM_TRIG_STOP: 140 str2 = "TRIG_STOP"; break; 141 case SOF_IPC_STREAM_TRIG_PAUSE: 142 str2 = "TRIG_PAUSE"; break; 143 case SOF_IPC_STREAM_TRIG_RELEASE: 144 str2 = "TRIG_RELEASE"; break; 145 case SOF_IPC_STREAM_TRIG_DRAIN: 146 str2 = "TRIG_DRAIN"; break; 147 case SOF_IPC_STREAM_TRIG_XRUN: 148 str2 = "TRIG_XRUN"; break; 149 case SOF_IPC_STREAM_POSITION: 150 vdbg = true; 151 str2 = "POSITION"; break; 152 case SOF_IPC_STREAM_VORBIS_PARAMS: 153 str2 = "VORBIS_PARAMS"; break; 154 case SOF_IPC_STREAM_VORBIS_FREE: 155 str2 = "VORBIS_FREE"; break; 156 default: 157 str2 = "unknown type"; break; 158 } 159 break; 160 case SOF_IPC_FW_READY: 161 str = "FW_READY"; break; 162 case SOF_IPC_GLB_DAI_MSG: 163 str = "GLB_DAI_MSG"; 164 switch (type) { 165 case SOF_IPC_DAI_CONFIG: 166 str2 = "CONFIG"; break; 167 case SOF_IPC_DAI_LOOPBACK: 168 str2 = "LOOPBACK"; break; 169 default: 170 str2 = "unknown type"; break; 171 } 172 break; 173 case SOF_IPC_GLB_TRACE_MSG: 174 str = "GLB_TRACE_MSG"; break; 175 case SOF_IPC_GLB_TEST_MSG: 176 str = "GLB_TEST_MSG"; 177 switch (type) { 178 case SOF_IPC_TEST_IPC_FLOOD: 179 str2 = "IPC_FLOOD"; break; 180 default: 181 str2 = "unknown type"; break; 182 } 183 break; 184 default: 185 str = "unknown GLB command"; break; 186 } 187 188 if (str2) { 189 if (vdbg) 190 dev_vdbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2); 191 else 192 dev_dbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2); 193 } else { 194 dev_dbg(dev, "%s: 0x%x: %s\n", text, cmd, str); 195 } 196} 197#else 198static inline void ipc_log_header(struct device *dev, u8 *text, u32 cmd) 199{ 200 if ((cmd & SOF_GLB_TYPE_MASK) != SOF_IPC_GLB_TRACE_MSG) 201 dev_dbg(dev, "%s: 0x%x\n", text, cmd); 202} 203#endif 204 205/* wait for IPC message reply */ 206static int tx_wait_done(struct snd_sof_ipc *ipc, struct snd_sof_ipc_msg *msg, 207 void *reply_data) 208{ 209 struct snd_sof_dev *sdev = ipc->sdev; 210 struct sof_ipc_cmd_hdr *hdr = msg->msg_data; 211 int ret; 212 213 /* wait for DSP IPC completion */ 214 ret = wait_event_timeout(msg->waitq, msg->ipc_complete, 215 msecs_to_jiffies(sdev->ipc_timeout)); 216 217 if (ret == 0) { 218 dev_err(sdev->dev, "error: ipc timed out for 0x%x size %d\n", 219 hdr->cmd, hdr->size); 220 snd_sof_handle_fw_exception(ipc->sdev); 221 ret = -ETIMEDOUT; 222 } else { 223 ret = msg->reply_error; 224 if (ret < 0) { 225 dev_err(sdev->dev, "error: ipc error for 0x%x size %zu\n", 226 hdr->cmd, msg->reply_size); 227 } else { 228 ipc_log_header(sdev->dev, "ipc tx succeeded", hdr->cmd); 229 if (msg->reply_size) 230 /* copy the data returned from DSP */ 231 memcpy(reply_data, msg->reply_data, 232 msg->reply_size); 233 } 234 } 235 236 return ret; 237} 238 239/* send IPC message from host to DSP */ 240static int sof_ipc_tx_message_unlocked(struct snd_sof_ipc *ipc, u32 header, 241 void *msg_data, size_t msg_bytes, 242 void *reply_data, size_t reply_bytes) 243{ 244 struct snd_sof_dev *sdev = ipc->sdev; 245 struct snd_sof_ipc_msg *msg; 246 int ret; 247 248 if (ipc->disable_ipc_tx) 249 return -ENODEV; 250 251 /* 252 * The spin-lock is also still needed to protect message objects against 253 * other atomic contexts. 254 */ 255 spin_lock_irq(&sdev->ipc_lock); 256 257 /* initialise the message */ 258 msg = &ipc->msg; 259 260 msg->header = header; 261 msg->msg_size = msg_bytes; 262 msg->reply_size = reply_bytes; 263 msg->reply_error = 0; 264 265 /* attach any data */ 266 if (msg_bytes) 267 memcpy(msg->msg_data, msg_data, msg_bytes); 268 269 sdev->msg = msg; 270 271 ret = snd_sof_dsp_send_msg(sdev, msg); 272 /* Next reply that we receive will be related to this message */ 273 if (!ret) 274 msg->ipc_complete = false; 275 276 spin_unlock_irq(&sdev->ipc_lock); 277 278 if (ret < 0) { 279 dev_err_ratelimited(sdev->dev, 280 "error: ipc tx failed with error %d\n", 281 ret); 282 return ret; 283 } 284 285 ipc_log_header(sdev->dev, "ipc tx", msg->header); 286 287 /* now wait for completion */ 288 if (!ret) 289 ret = tx_wait_done(ipc, msg, reply_data); 290 291 return ret; 292} 293 294/* send IPC message from host to DSP */ 295int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header, 296 void *msg_data, size_t msg_bytes, void *reply_data, 297 size_t reply_bytes) 298{ 299 const struct sof_dsp_power_state target_state = { 300 .state = SOF_DSP_PM_D0, 301 }; 302 int ret; 303 304 /* ensure the DSP is in D0 before sending a new IPC */ 305 ret = snd_sof_dsp_set_power_state(ipc->sdev, &target_state); 306 if (ret < 0) { 307 dev_err(ipc->sdev->dev, "error: resuming DSP %d\n", ret); 308 return ret; 309 } 310 311 return sof_ipc_tx_message_no_pm(ipc, header, msg_data, msg_bytes, 312 reply_data, reply_bytes); 313} 314EXPORT_SYMBOL(sof_ipc_tx_message); 315 316/* 317 * send IPC message from host to DSP without modifying the DSP state. 318 * This will be used for IPC's that can be handled by the DSP 319 * even in a low-power D0 substate. 320 */ 321int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, u32 header, 322 void *msg_data, size_t msg_bytes, 323 void *reply_data, size_t reply_bytes) 324{ 325 int ret; 326 327 if (msg_bytes > SOF_IPC_MSG_MAX_SIZE || 328 reply_bytes > SOF_IPC_MSG_MAX_SIZE) 329 return -ENOBUFS; 330 331 /* Serialise IPC TX */ 332 mutex_lock(&ipc->tx_mutex); 333 334 ret = sof_ipc_tx_message_unlocked(ipc, header, msg_data, msg_bytes, 335 reply_data, reply_bytes); 336 337 mutex_unlock(&ipc->tx_mutex); 338 339 return ret; 340} 341EXPORT_SYMBOL(sof_ipc_tx_message_no_pm); 342 343/* handle reply message from DSP */ 344void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id) 345{ 346 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg; 347 348 if (msg->ipc_complete) { 349 dev_dbg(sdev->dev, 350 "no reply expected, received 0x%x, will be ignored", 351 msg_id); 352 return; 353 } 354 355 /* wake up and return the error if we have waiters on this message ? */ 356 msg->ipc_complete = true; 357 wake_up(&msg->waitq); 358} 359EXPORT_SYMBOL(snd_sof_ipc_reply); 360 361/* DSP firmware has sent host a message */ 362void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev) 363{ 364 struct sof_ipc_cmd_hdr hdr; 365 u32 cmd, type; 366 int err = 0; 367 368 /* read back header */ 369 snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr)); 370 ipc_log_header(sdev->dev, "ipc rx", hdr.cmd); 371 372 cmd = hdr.cmd & SOF_GLB_TYPE_MASK; 373 type = hdr.cmd & SOF_CMD_TYPE_MASK; 374 375 /* check message type */ 376 switch (cmd) { 377 case SOF_IPC_GLB_REPLY: 378 dev_err(sdev->dev, "error: ipc reply unknown\n"); 379 break; 380 case SOF_IPC_FW_READY: 381 /* check for FW boot completion */ 382 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) { 383 err = sof_ops(sdev)->fw_ready(sdev, cmd); 384 if (err < 0) 385 sdev->fw_state = SOF_FW_BOOT_READY_FAILED; 386 else 387 sdev->fw_state = SOF_FW_BOOT_COMPLETE; 388 389 /* wake up firmware loader */ 390 wake_up(&sdev->boot_wait); 391 } 392 break; 393 case SOF_IPC_GLB_COMPOUND: 394 case SOF_IPC_GLB_TPLG_MSG: 395 case SOF_IPC_GLB_PM_MSG: 396 case SOF_IPC_GLB_COMP_MSG: 397 break; 398 case SOF_IPC_GLB_STREAM_MSG: 399 /* need to pass msg id into the function */ 400 ipc_stream_message(sdev, hdr.cmd); 401 break; 402 case SOF_IPC_GLB_TRACE_MSG: 403 ipc_trace_message(sdev, type); 404 break; 405 default: 406 dev_err(sdev->dev, "error: unknown DSP message 0x%x\n", cmd); 407 break; 408 } 409 410 ipc_log_header(sdev->dev, "ipc rx done", hdr.cmd); 411} 412EXPORT_SYMBOL(snd_sof_ipc_msgs_rx); 413 414/* 415 * IPC trace mechanism. 416 */ 417 418static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_id) 419{ 420 struct sof_ipc_dma_trace_posn posn; 421 422 switch (msg_id) { 423 case SOF_IPC_TRACE_DMA_POSITION: 424 /* read back full message */ 425 snd_sof_ipc_msg_data(sdev, NULL, &posn, sizeof(posn)); 426 snd_sof_trace_update_pos(sdev, &posn); 427 break; 428 default: 429 dev_err(sdev->dev, "error: unhandled trace message %x\n", 430 msg_id); 431 break; 432 } 433} 434 435/* 436 * IPC stream position. 437 */ 438 439static void ipc_period_elapsed(struct snd_sof_dev *sdev, u32 msg_id) 440{ 441 struct snd_soc_component *scomp = sdev->component; 442 struct snd_sof_pcm_stream *stream; 443 struct sof_ipc_stream_posn posn; 444 struct snd_sof_pcm *spcm; 445 int direction; 446 447 spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction); 448 if (!spcm) { 449 dev_err(sdev->dev, 450 "error: period elapsed for unknown stream, msg_id %d\n", 451 msg_id); 452 return; 453 } 454 455 stream = &spcm->stream[direction]; 456 snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn)); 457 458 dev_vdbg(sdev->dev, "posn : host 0x%llx dai 0x%llx wall 0x%llx\n", 459 posn.host_posn, posn.dai_posn, posn.wallclock); 460 461 memcpy(&stream->posn, &posn, sizeof(posn)); 462 463 /* only inform ALSA for period_wakeup mode */ 464 if (!stream->substream->runtime->no_period_wakeup) 465 snd_sof_pcm_period_elapsed(stream->substream); 466} 467 468/* DSP notifies host of an XRUN within FW */ 469static void ipc_xrun(struct snd_sof_dev *sdev, u32 msg_id) 470{ 471 struct snd_soc_component *scomp = sdev->component; 472 struct snd_sof_pcm_stream *stream; 473 struct sof_ipc_stream_posn posn; 474 struct snd_sof_pcm *spcm; 475 int direction; 476 477 spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction); 478 if (!spcm) { 479 dev_err(sdev->dev, "error: XRUN for unknown stream, msg_id %d\n", 480 msg_id); 481 return; 482 } 483 484 stream = &spcm->stream[direction]; 485 snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn)); 486 487 dev_dbg(sdev->dev, "posn XRUN: host %llx comp %d size %d\n", 488 posn.host_posn, posn.xrun_comp_id, posn.xrun_size); 489 490#if defined(CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP) 491 /* stop PCM on XRUN - used for pipeline debug */ 492 memcpy(&stream->posn, &posn, sizeof(posn)); 493 snd_pcm_stop_xrun(stream->substream); 494#endif 495} 496 497/* stream notifications from DSP FW */ 498static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd) 499{ 500 /* get msg cmd type and msd id */ 501 u32 msg_type = msg_cmd & SOF_CMD_TYPE_MASK; 502 u32 msg_id = SOF_IPC_MESSAGE_ID(msg_cmd); 503 504 switch (msg_type) { 505 case SOF_IPC_STREAM_POSITION: 506 ipc_period_elapsed(sdev, msg_id); 507 break; 508 case SOF_IPC_STREAM_TRIG_XRUN: 509 ipc_xrun(sdev, msg_id); 510 break; 511 default: 512 dev_err(sdev->dev, "error: unhandled stream message %x\n", 513 msg_id); 514 break; 515 } 516} 517 518/* get stream position IPC - use faster MMIO method if available on platform */ 519int snd_sof_ipc_stream_posn(struct snd_soc_component *scomp, 520 struct snd_sof_pcm *spcm, int direction, 521 struct sof_ipc_stream_posn *posn) 522{ 523 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp); 524 struct sof_ipc_stream stream; 525 int err; 526 527 /* read position via slower IPC */ 528 stream.hdr.size = sizeof(stream); 529 stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_POSITION; 530 stream.comp_id = spcm->stream[direction].comp_id; 531 532 /* send IPC to the DSP */ 533 err = sof_ipc_tx_message(sdev->ipc, 534 stream.hdr.cmd, &stream, sizeof(stream), posn, 535 sizeof(*posn)); 536 if (err < 0) { 537 dev_err(sdev->dev, "error: failed to get stream %d position\n", 538 stream.comp_id); 539 return err; 540 } 541 542 return 0; 543} 544EXPORT_SYMBOL(snd_sof_ipc_stream_posn); 545 546static int sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type, 547 struct sof_ipc_ctrl_data *src, 548 struct sof_ipc_ctrl_data *dst, 549 struct sof_ipc_ctrl_data_params *sparams) 550{ 551 switch (ctrl_type) { 552 case SOF_CTRL_TYPE_VALUE_CHAN_GET: 553 case SOF_CTRL_TYPE_VALUE_CHAN_SET: 554 sparams->src = (u8 *)src->chanv; 555 sparams->dst = (u8 *)dst->chanv; 556 break; 557 case SOF_CTRL_TYPE_VALUE_COMP_GET: 558 case SOF_CTRL_TYPE_VALUE_COMP_SET: 559 sparams->src = (u8 *)src->compv; 560 sparams->dst = (u8 *)dst->compv; 561 break; 562 case SOF_CTRL_TYPE_DATA_GET: 563 case SOF_CTRL_TYPE_DATA_SET: 564 sparams->src = (u8 *)src->data->data; 565 sparams->dst = (u8 *)dst->data->data; 566 break; 567 default: 568 return -EINVAL; 569 } 570 571 /* calculate payload size and number of messages */ 572 sparams->pl_size = SOF_IPC_MSG_MAX_SIZE - sparams->hdr_bytes; 573 sparams->num_msg = DIV_ROUND_UP(sparams->msg_bytes, sparams->pl_size); 574 575 return 0; 576} 577 578static int sof_set_get_large_ctrl_data(struct snd_sof_dev *sdev, 579 struct sof_ipc_ctrl_data *cdata, 580 struct sof_ipc_ctrl_data_params *sparams, 581 bool send) 582{ 583 struct sof_ipc_ctrl_data *partdata; 584 size_t send_bytes; 585 size_t offset = 0; 586 size_t msg_bytes; 587 size_t pl_size; 588 int err; 589 int i; 590 591 /* allocate max ipc size because we have at least one */ 592 partdata = kzalloc(SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL); 593 if (!partdata) 594 return -ENOMEM; 595 596 if (send) 597 err = sof_get_ctrl_copy_params(cdata->type, cdata, partdata, 598 sparams); 599 else 600 err = sof_get_ctrl_copy_params(cdata->type, partdata, cdata, 601 sparams); 602 if (err < 0) { 603 kfree(partdata); 604 return err; 605 } 606 607 msg_bytes = sparams->msg_bytes; 608 pl_size = sparams->pl_size; 609 610 /* copy the header data */ 611 memcpy(partdata, cdata, sparams->hdr_bytes); 612 613 /* Serialise IPC TX */ 614 mutex_lock(&sdev->ipc->tx_mutex); 615 616 /* copy the payload data in a loop */ 617 for (i = 0; i < sparams->num_msg; i++) { 618 send_bytes = min(msg_bytes, pl_size); 619 partdata->num_elems = send_bytes; 620 partdata->rhdr.hdr.size = sparams->hdr_bytes + send_bytes; 621 partdata->msg_index = i; 622 msg_bytes -= send_bytes; 623 partdata->elems_remaining = msg_bytes; 624 625 if (send) 626 memcpy(sparams->dst, sparams->src + offset, send_bytes); 627 628 err = sof_ipc_tx_message_unlocked(sdev->ipc, 629 partdata->rhdr.hdr.cmd, 630 partdata, 631 partdata->rhdr.hdr.size, 632 partdata, 633 partdata->rhdr.hdr.size); 634 if (err < 0) 635 break; 636 637 if (!send) 638 memcpy(sparams->dst + offset, sparams->src, send_bytes); 639 640 offset += pl_size; 641 } 642 643 mutex_unlock(&sdev->ipc->tx_mutex); 644 645 kfree(partdata); 646 return err; 647} 648 649/* 650 * IPC get()/set() for kcontrols. 651 */ 652int snd_sof_ipc_set_get_comp_data(struct snd_sof_control *scontrol, 653 u32 ipc_cmd, 654 enum sof_ipc_ctrl_type ctrl_type, 655 enum sof_ipc_ctrl_cmd ctrl_cmd, 656 bool send) 657{ 658 struct snd_soc_component *scomp = scontrol->scomp; 659 struct sof_ipc_ctrl_data *cdata = scontrol->control_data; 660 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp); 661 struct sof_ipc_fw_ready *ready = &sdev->fw_ready; 662 struct sof_ipc_fw_version *v = &ready->version; 663 struct sof_ipc_ctrl_data_params sparams; 664 size_t send_bytes; 665 int err; 666 667 /* read or write firmware volume */ 668 if (scontrol->readback_offset != 0) { 669 /* write/read value header via mmaped region */ 670 send_bytes = sizeof(struct sof_ipc_ctrl_value_chan) * 671 cdata->num_elems; 672 if (send) 673 snd_sof_dsp_block_write(sdev, sdev->mmio_bar, 674 scontrol->readback_offset, 675 cdata->chanv, send_bytes); 676 677 else 678 snd_sof_dsp_block_read(sdev, sdev->mmio_bar, 679 scontrol->readback_offset, 680 cdata->chanv, send_bytes); 681 return 0; 682 } 683 684 cdata->rhdr.hdr.cmd = SOF_IPC_GLB_COMP_MSG | ipc_cmd; 685 cdata->cmd = ctrl_cmd; 686 cdata->type = ctrl_type; 687 cdata->comp_id = scontrol->comp_id; 688 cdata->msg_index = 0; 689 690 /* calculate header and data size */ 691 switch (cdata->type) { 692 case SOF_CTRL_TYPE_VALUE_CHAN_GET: 693 case SOF_CTRL_TYPE_VALUE_CHAN_SET: 694 sparams.msg_bytes = scontrol->num_channels * 695 sizeof(struct sof_ipc_ctrl_value_chan); 696 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data); 697 sparams.elems = scontrol->num_channels; 698 break; 699 case SOF_CTRL_TYPE_VALUE_COMP_GET: 700 case SOF_CTRL_TYPE_VALUE_COMP_SET: 701 sparams.msg_bytes = scontrol->num_channels * 702 sizeof(struct sof_ipc_ctrl_value_comp); 703 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data); 704 sparams.elems = scontrol->num_channels; 705 break; 706 case SOF_CTRL_TYPE_DATA_GET: 707 case SOF_CTRL_TYPE_DATA_SET: 708 sparams.msg_bytes = cdata->data->size; 709 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data) + 710 sizeof(struct sof_abi_hdr); 711 sparams.elems = cdata->data->size; 712 break; 713 default: 714 return -EINVAL; 715 } 716 717 cdata->rhdr.hdr.size = sparams.msg_bytes + sparams.hdr_bytes; 718 cdata->num_elems = sparams.elems; 719 cdata->elems_remaining = 0; 720 721 /* send normal size ipc in one part */ 722 if (cdata->rhdr.hdr.size <= SOF_IPC_MSG_MAX_SIZE) { 723 err = sof_ipc_tx_message(sdev->ipc, cdata->rhdr.hdr.cmd, cdata, 724 cdata->rhdr.hdr.size, cdata, 725 cdata->rhdr.hdr.size); 726 727 if (err < 0) 728 dev_err(sdev->dev, "error: set/get ctrl ipc comp %d\n", 729 cdata->comp_id); 730 731 return err; 732 } 733 734 /* data is bigger than max ipc size, chop into smaller pieces */ 735 dev_dbg(sdev->dev, "large ipc size %u, control size %u\n", 736 cdata->rhdr.hdr.size, scontrol->size); 737 738 /* large messages is only supported from ABI 3.3.0 onwards */ 739 if (v->abi_version < SOF_ABI_VER(3, 3, 0)) { 740 dev_err(sdev->dev, "error: incompatible FW ABI version\n"); 741 return -EINVAL; 742 } 743 744 err = sof_set_get_large_ctrl_data(sdev, cdata, &sparams, send); 745 746 if (err < 0) 747 dev_err(sdev->dev, "error: set/get large ctrl ipc comp %d\n", 748 cdata->comp_id); 749 750 return err; 751} 752EXPORT_SYMBOL(snd_sof_ipc_set_get_comp_data); 753 754/* 755 * IPC layer enumeration. 756 */ 757 758int snd_sof_dsp_mailbox_init(struct snd_sof_dev *sdev, u32 dspbox, 759 size_t dspbox_size, u32 hostbox, 760 size_t hostbox_size) 761{ 762 sdev->dsp_box.offset = dspbox; 763 sdev->dsp_box.size = dspbox_size; 764 sdev->host_box.offset = hostbox; 765 sdev->host_box.size = hostbox_size; 766 return 0; 767} 768EXPORT_SYMBOL(snd_sof_dsp_mailbox_init); 769 770int snd_sof_ipc_valid(struct snd_sof_dev *sdev) 771{ 772 struct sof_ipc_fw_ready *ready = &sdev->fw_ready; 773 struct sof_ipc_fw_version *v = &ready->version; 774 775 dev_info(sdev->dev, 776 "Firmware info: version %d:%d:%d-%s\n", v->major, v->minor, 777 v->micro, v->tag); 778 dev_info(sdev->dev, 779 "Firmware: ABI %d:%d:%d Kernel ABI %d:%d:%d\n", 780 SOF_ABI_VERSION_MAJOR(v->abi_version), 781 SOF_ABI_VERSION_MINOR(v->abi_version), 782 SOF_ABI_VERSION_PATCH(v->abi_version), 783 SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH); 784 785 if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION, v->abi_version)) { 786 dev_err(sdev->dev, "error: incompatible FW ABI version\n"); 787 return -EINVAL; 788 } 789 790 if (v->abi_version > SOF_ABI_VERSION) { 791 if (!IS_ENABLED(CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS)) { 792 dev_warn(sdev->dev, "warn: FW ABI is more recent than kernel\n"); 793 } else { 794 dev_err(sdev->dev, "error: FW ABI is more recent than kernel\n"); 795 return -EINVAL; 796 } 797 } 798 799 if (ready->flags & SOF_IPC_INFO_BUILD) { 800 dev_info(sdev->dev, 801 "Firmware debug build %d on %s-%s - options:\n" 802 " GDB: %s\n" 803 " lock debug: %s\n" 804 " lock vdebug: %s\n", 805 v->build, v->date, v->time, 806 (ready->flags & SOF_IPC_INFO_GDB) ? 807 "enabled" : "disabled", 808 (ready->flags & SOF_IPC_INFO_LOCKS) ? 809 "enabled" : "disabled", 810 (ready->flags & SOF_IPC_INFO_LOCKSV) ? 811 "enabled" : "disabled"); 812 } 813 814 /* copy the fw_version into debugfs at first boot */ 815 memcpy(&sdev->fw_version, v, sizeof(*v)); 816 817 return 0; 818} 819EXPORT_SYMBOL(snd_sof_ipc_valid); 820 821struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev) 822{ 823 struct snd_sof_ipc *ipc; 824 struct snd_sof_ipc_msg *msg; 825 826 ipc = devm_kzalloc(sdev->dev, sizeof(*ipc), GFP_KERNEL); 827 if (!ipc) 828 return NULL; 829 830 mutex_init(&ipc->tx_mutex); 831 ipc->sdev = sdev; 832 msg = &ipc->msg; 833 834 /* indicate that we aren't sending a message ATM */ 835 msg->ipc_complete = true; 836 837 /* pre-allocate message data */ 838 msg->msg_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, 839 GFP_KERNEL); 840 if (!msg->msg_data) 841 return NULL; 842 843 msg->reply_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, 844 GFP_KERNEL); 845 if (!msg->reply_data) 846 return NULL; 847 848 init_waitqueue_head(&msg->waitq); 849 850 return ipc; 851} 852EXPORT_SYMBOL(snd_sof_ipc_init); 853 854void snd_sof_ipc_free(struct snd_sof_dev *sdev) 855{ 856 struct snd_sof_ipc *ipc = sdev->ipc; 857 858 if (!ipc) 859 return; 860 861 /* disable sending of ipc's */ 862 mutex_lock(&ipc->tx_mutex); 863 ipc->disable_ipc_tx = true; 864 mutex_unlock(&ipc->tx_mutex); 865} 866EXPORT_SYMBOL(snd_sof_ipc_free); 867