18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * This file is provided under a dual BSD/GPLv2 license. When using or 48c2ecf20Sopenharmony_ci * redistributing this file, you may do so under either license. 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * Copyright(c) 2019 Intel Corporation. All rights reserved. 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci * Author: Keyon Jie <yang.jie@linux.intel.com> 98c2ecf20Sopenharmony_ci */ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci#ifndef __SOF_INTEL_HDA_IPC_H 128c2ecf20Sopenharmony_ci#define __SOF_INTEL_HDA_IPC_H 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci/* 158c2ecf20Sopenharmony_ci * Primary register, mapped to 168c2ecf20Sopenharmony_ci * - DIPCTDR (HIPCIDR) in sideband IPC (cAVS 1.8+) 178c2ecf20Sopenharmony_ci * - DIPCT in cAVS 1.5 IPC 188c2ecf20Sopenharmony_ci * 198c2ecf20Sopenharmony_ci * Secondary register, mapped to: 208c2ecf20Sopenharmony_ci * - DIPCTDD (HIPCIDD) in sideband IPC (cAVS 1.8+) 218c2ecf20Sopenharmony_ci * - DIPCTE in cAVS 1.5 IPC 228c2ecf20Sopenharmony_ci */ 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci/* Common bits in primary register */ 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci/* Reserved for doorbell */ 278c2ecf20Sopenharmony_ci#define HDA_IPC_RSVD_31 BIT(31) 288c2ecf20Sopenharmony_ci/* Target, 0 - normal message, 1 - compact message(cAVS compatible) */ 298c2ecf20Sopenharmony_ci#define HDA_IPC_MSG_COMPACT BIT(30) 308c2ecf20Sopenharmony_ci/* Direction, 0 - request, 1 - response */ 318c2ecf20Sopenharmony_ci#define HDA_IPC_RSP BIT(29) 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci#define HDA_IPC_TYPE_SHIFT 24 348c2ecf20Sopenharmony_ci#define HDA_IPC_TYPE_MASK GENMASK(28, 24) 358c2ecf20Sopenharmony_ci#define HDA_IPC_TYPE(x) ((x) << HDA_IPC_TYPE_SHIFT) 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci#define HDA_IPC_PM_GATE HDA_IPC_TYPE(0x8U) 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci/* Command specific payload bits in secondary register */ 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci/* Disable DMA tracing (0 - keep tracing, 1 - to disable DMA trace) */ 428c2ecf20Sopenharmony_ci#define HDA_PM_NO_DMA_TRACE BIT(4) 438c2ecf20Sopenharmony_ci/* Prevent clock gating (0 - cg allowed, 1 - DSP clock always on) */ 448c2ecf20Sopenharmony_ci#define HDA_PM_PCG BIT(3) 458c2ecf20Sopenharmony_ci/* Prevent power gating (0 - deep power state transitions allowed) */ 468c2ecf20Sopenharmony_ci#define HDA_PM_PPG BIT(2) 478c2ecf20Sopenharmony_ci/* Indicates whether streaming is active */ 488c2ecf20Sopenharmony_ci#define HDA_PM_PG_STREAMING BIT(1) 498c2ecf20Sopenharmony_ci#define HDA_PM_PG_RSVD BIT(0) 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ciirqreturn_t cnl_ipc_irq_thread(int irq, void *context); 528c2ecf20Sopenharmony_ciint cnl_ipc_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg); 538c2ecf20Sopenharmony_civoid cnl_ipc_dump(struct snd_sof_dev *sdev); 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci#endif 56