18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0+ */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * ALSA Soc Audio Layer - S3C_I2SV2 I2S driver
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (c) 2007 Simtec Electronics
68c2ecf20Sopenharmony_ci *	http://armlinux.simtec.co.uk/
78c2ecf20Sopenharmony_ci *	Ben Dooks <ben@simtec.co.uk>
88c2ecf20Sopenharmony_ci */
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ci/* This code is the core support for the I2S block found in a number of
118c2ecf20Sopenharmony_ci * Samsung SoC devices which is unofficially named I2S-V2. Currently the
128c2ecf20Sopenharmony_ci * S3C2412 and the S3C64XX series use this block to provide 1 or 2 I2S
138c2ecf20Sopenharmony_ci * channels via configurable GPIO.
148c2ecf20Sopenharmony_ci */
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci#ifndef __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H
178c2ecf20Sopenharmony_ci#define __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H __FILE__
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci#define S3C_I2SV2_DIV_BCLK	(1)
208c2ecf20Sopenharmony_ci#define S3C_I2SV2_DIV_RCLK	(2)
218c2ecf20Sopenharmony_ci#define S3C_I2SV2_DIV_PRESCALER	(3)
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci#define S3C_I2SV2_CLKSRC_PCLK		0
248c2ecf20Sopenharmony_ci#define S3C_I2SV2_CLKSRC_AUDIOBUS	1
258c2ecf20Sopenharmony_ci#define S3C_I2SV2_CLKSRC_CDCLK		2
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci/* Set this flag for I2S controllers that have the bit IISMOD[12]
288c2ecf20Sopenharmony_ci * bridge/break RCLK signal and external Xi2sCDCLK pin.
298c2ecf20Sopenharmony_ci */
308c2ecf20Sopenharmony_ci#define S3C_FEATURE_CDCLKCON	(1 << 0)
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ci/**
338c2ecf20Sopenharmony_ci * struct s3c_i2sv2_info - S3C I2S-V2 information
348c2ecf20Sopenharmony_ci * @dev: The parent device passed to use from the probe.
358c2ecf20Sopenharmony_ci * @regs: The pointer to the device registe block.
368c2ecf20Sopenharmony_ci * @feature: Set of bit-flags indicating features of the controller.
378c2ecf20Sopenharmony_ci * @master: True if the I2S core is the I2S bit clock master.
388c2ecf20Sopenharmony_ci * @dma_playback: DMA information for playback channel.
398c2ecf20Sopenharmony_ci * @dma_capture: DMA information for capture channel.
408c2ecf20Sopenharmony_ci * @suspend_iismod: PM save for the IISMOD register.
418c2ecf20Sopenharmony_ci * @suspend_iiscon: PM save for the IISCON register.
428c2ecf20Sopenharmony_ci * @suspend_iispsr: PM save for the IISPSR register.
438c2ecf20Sopenharmony_ci *
448c2ecf20Sopenharmony_ci * This is the private codec state for the hardware associated with an
458c2ecf20Sopenharmony_ci * I2S channel such as the register mappings and clock sources.
468c2ecf20Sopenharmony_ci */
478c2ecf20Sopenharmony_cistruct s3c_i2sv2_info {
488c2ecf20Sopenharmony_ci	struct device	*dev;
498c2ecf20Sopenharmony_ci	void __iomem	*regs;
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_ci	u32		feature;
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci	struct clk	*iis_pclk;
548c2ecf20Sopenharmony_ci	struct clk	*iis_cclk;
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ci	unsigned char	 master;
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_ci	struct snd_dmaengine_dai_dma_data *dma_playback;
598c2ecf20Sopenharmony_ci	struct snd_dmaengine_dai_dma_data *dma_capture;
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_ci	u32		 suspend_iismod;
628c2ecf20Sopenharmony_ci	u32		 suspend_iiscon;
638c2ecf20Sopenharmony_ci	u32		 suspend_iispsr;
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ci	unsigned long	base;
668c2ecf20Sopenharmony_ci};
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ciextern struct clk *s3c_i2sv2_get_clock(struct snd_soc_dai *cpu_dai);
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_cistruct s3c_i2sv2_rate_calc {
718c2ecf20Sopenharmony_ci	unsigned int	clk_div;	/* for prescaler */
728c2ecf20Sopenharmony_ci	unsigned int	fs_div;		/* for root frame clock */
738c2ecf20Sopenharmony_ci};
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ciextern int s3c_i2sv2_iis_calc_rate(struct s3c_i2sv2_rate_calc *info,
768c2ecf20Sopenharmony_ci				   unsigned int *fstab,
778c2ecf20Sopenharmony_ci				   unsigned int rate, struct clk *clk);
788c2ecf20Sopenharmony_ci
798c2ecf20Sopenharmony_ci/**
808c2ecf20Sopenharmony_ci * s3c_i2sv2_probe - probe for i2s device helper
818c2ecf20Sopenharmony_ci * @dai: The ASoC DAI structure supplied to the original probe.
828c2ecf20Sopenharmony_ci * @i2s: Our local i2s structure to fill in.
838c2ecf20Sopenharmony_ci * @base: The base address for the registers.
848c2ecf20Sopenharmony_ci */
858c2ecf20Sopenharmony_ciextern int s3c_i2sv2_probe(struct snd_soc_dai *dai,
868c2ecf20Sopenharmony_ci			   struct s3c_i2sv2_info *i2s);
878c2ecf20Sopenharmony_ci
888c2ecf20Sopenharmony_ci/**
898c2ecf20Sopenharmony_ci * s3c_i2sv2_cleanup - cleanup resources allocated in s3c_i2sv2_probe
908c2ecf20Sopenharmony_ci * @dai: The ASoC DAI structure supplied to the original probe.
918c2ecf20Sopenharmony_ci * @i2s: Our local i2s structure to fill in.
928c2ecf20Sopenharmony_ci */
938c2ecf20Sopenharmony_ciextern void s3c_i2sv2_cleanup(struct snd_soc_dai *dai,
948c2ecf20Sopenharmony_ci			      struct s3c_i2sv2_info *i2s);
958c2ecf20Sopenharmony_ci/**
968c2ecf20Sopenharmony_ci * s3c_i2sv2_register_component - register component and dai with soc core
978c2ecf20Sopenharmony_ci * @dev: DAI device
988c2ecf20Sopenharmony_ci * @id: DAI ID
998c2ecf20Sopenharmony_ci * @drv: The driver structure to register
1008c2ecf20Sopenharmony_ci *
1018c2ecf20Sopenharmony_ci * Fill in any missing fields and then register the given dai with the
1028c2ecf20Sopenharmony_ci * soc core.
1038c2ecf20Sopenharmony_ci */
1048c2ecf20Sopenharmony_ciextern int s3c_i2sv2_register_component(struct device *dev, int id,
1058c2ecf20Sopenharmony_ci					const struct snd_soc_component_driver *cmp_drv,
1068c2ecf20Sopenharmony_ci					struct snd_soc_dai_driver *dai_drv);
1078c2ecf20Sopenharmony_ci
1088c2ecf20Sopenharmony_ci#endif /* __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H */
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