1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * mt8183-afe-clk.h  --  Mediatek 8183 afe clock ctrl definition
4 *
5 * Copyright (c) 2018 MediaTek Inc.
6 * Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com>
7 */
8
9#ifndef _MT8183_AFE_CLK_H_
10#define _MT8183_AFE_CLK_H_
11
12/* APLL */
13#define APLL1_W_NAME "APLL1"
14#define APLL2_W_NAME "APLL2"
15enum {
16	MT8183_APLL1 = 0,
17	MT8183_APLL2,
18};
19
20struct mtk_base_afe;
21
22int mt8183_init_clock(struct mtk_base_afe *afe);
23int mt8183_afe_enable_clock(struct mtk_base_afe *afe);
24int mt8183_afe_disable_clock(struct mtk_base_afe *afe);
25
26int mt8183_apll1_enable(struct mtk_base_afe *afe);
27void mt8183_apll1_disable(struct mtk_base_afe *afe);
28
29int mt8183_apll2_enable(struct mtk_base_afe *afe);
30void mt8183_apll2_disable(struct mtk_base_afe *afe);
31
32int mt8183_get_apll_rate(struct mtk_base_afe *afe, int apll);
33int mt8183_get_apll_by_rate(struct mtk_base_afe *afe, int rate);
34int mt8183_get_apll_by_name(struct mtk_base_afe *afe, const char *name);
35
36int mt8183_mck_enable(struct mtk_base_afe *afe, int mck_id, int rate);
37void mt8183_mck_disable(struct mtk_base_afe *afe, int mck_id);
38#endif
39