1// SPDX-License-Identifier: GPL-2.0-only 2// 3// Freescale MPC5200 PSC DMA 4// ALSA SoC Platform driver 5// 6// Copyright (C) 2008 Secret Lab Technologies Ltd. 7// Copyright (C) 2009 Jon Smirl, Digispeaker 8 9#include <linux/module.h> 10#include <linux/of_device.h> 11#include <linux/dma-mapping.h> 12#include <linux/slab.h> 13#include <linux/of_address.h> 14#include <linux/of_irq.h> 15#include <linux/of_platform.h> 16 17#include <sound/soc.h> 18 19#include <linux/fsl/bestcomm/bestcomm.h> 20#include <linux/fsl/bestcomm/gen_bd.h> 21#include <asm/mpc52xx_psc.h> 22 23#include "mpc5200_dma.h" 24 25#define DRV_NAME "mpc5200_dma" 26 27/* 28 * Interrupt handlers 29 */ 30static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma) 31{ 32 struct psc_dma *psc_dma = _psc_dma; 33 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; 34 u16 isr; 35 36 isr = in_be16(®s->mpc52xx_psc_isr); 37 38 /* Playback underrun error */ 39 if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP)) 40 psc_dma->stats.underrun_count++; 41 42 /* Capture overrun error */ 43 if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR)) 44 psc_dma->stats.overrun_count++; 45 46 out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT); 47 48 return IRQ_HANDLED; 49} 50 51/** 52 * psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer 53 * @s: pointer to stream private data structure 54 * 55 * Enqueues another audio period buffer into the bestcomm queue. 56 * 57 * Note: The routine must only be called when there is space available in 58 * the queue. Otherwise the enqueue will fail and the audio ring buffer 59 * will get out of sync 60 */ 61static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s) 62{ 63 struct bcom_bd *bd; 64 65 /* Prepare and enqueue the next buffer descriptor */ 66 bd = bcom_prepare_next_buffer(s->bcom_task); 67 bd->status = s->period_bytes; 68 bd->data[0] = s->runtime->dma_addr + (s->period_next * s->period_bytes); 69 bcom_submit_next_buffer(s->bcom_task, NULL); 70 71 /* Update for next period */ 72 s->period_next = (s->period_next + 1) % s->runtime->periods; 73} 74 75/* Bestcomm DMA irq handler */ 76static irqreturn_t psc_dma_bcom_irq(int irq, void *_psc_dma_stream) 77{ 78 struct psc_dma_stream *s = _psc_dma_stream; 79 80 spin_lock(&s->psc_dma->lock); 81 /* For each finished period, dequeue the completed period buffer 82 * and enqueue a new one in it's place. */ 83 while (bcom_buffer_done(s->bcom_task)) { 84 bcom_retrieve_buffer(s->bcom_task, NULL, NULL); 85 86 s->period_current = (s->period_current+1) % s->runtime->periods; 87 s->period_count++; 88 89 psc_dma_bcom_enqueue_next_buffer(s); 90 } 91 spin_unlock(&s->psc_dma->lock); 92 93 /* If the stream is active, then also inform the PCM middle layer 94 * of the period finished event. */ 95 if (s->active) 96 snd_pcm_period_elapsed(s->stream); 97 98 return IRQ_HANDLED; 99} 100 101static int psc_dma_hw_free(struct snd_soc_component *component, 102 struct snd_pcm_substream *substream) 103{ 104 snd_pcm_set_runtime_buffer(substream, NULL); 105 return 0; 106} 107 108/** 109 * psc_dma_trigger: start and stop the DMA transfer. 110 * @component: triggered component 111 * @substream: triggered substream 112 * @cmd: triggered command 113 * 114 * This function is called by ALSA to start, stop, pause, and resume the DMA 115 * transfer of data. 116 */ 117static int psc_dma_trigger(struct snd_soc_component *component, 118 struct snd_pcm_substream *substream, int cmd) 119{ 120 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 121 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); 122 struct snd_pcm_runtime *runtime = substream->runtime; 123 struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma); 124 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; 125 u16 imr; 126 unsigned long flags; 127 int i; 128 129 switch (cmd) { 130 case SNDRV_PCM_TRIGGER_START: 131 dev_dbg(psc_dma->dev, "START: stream=%i fbits=%u ps=%u #p=%u\n", 132 substream->pstr->stream, runtime->frame_bits, 133 (int)runtime->period_size, runtime->periods); 134 s->period_bytes = frames_to_bytes(runtime, 135 runtime->period_size); 136 s->period_next = 0; 137 s->period_current = 0; 138 s->active = 1; 139 s->period_count = 0; 140 s->runtime = runtime; 141 142 /* Fill up the bestcomm bd queue and enable DMA. 143 * This will begin filling the PSC's fifo. 144 */ 145 spin_lock_irqsave(&psc_dma->lock, flags); 146 147 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) 148 bcom_gen_bd_rx_reset(s->bcom_task); 149 else 150 bcom_gen_bd_tx_reset(s->bcom_task); 151 152 for (i = 0; i < runtime->periods; i++) 153 if (!bcom_queue_full(s->bcom_task)) 154 psc_dma_bcom_enqueue_next_buffer(s); 155 156 bcom_enable(s->bcom_task); 157 spin_unlock_irqrestore(&psc_dma->lock, flags); 158 159 out_8(®s->command, MPC52xx_PSC_RST_ERR_STAT); 160 161 break; 162 163 case SNDRV_PCM_TRIGGER_STOP: 164 dev_dbg(psc_dma->dev, "STOP: stream=%i periods_count=%i\n", 165 substream->pstr->stream, s->period_count); 166 s->active = 0; 167 168 spin_lock_irqsave(&psc_dma->lock, flags); 169 bcom_disable(s->bcom_task); 170 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) 171 bcom_gen_bd_rx_reset(s->bcom_task); 172 else 173 bcom_gen_bd_tx_reset(s->bcom_task); 174 spin_unlock_irqrestore(&psc_dma->lock, flags); 175 176 break; 177 178 default: 179 dev_dbg(psc_dma->dev, "unhandled trigger: stream=%i cmd=%i\n", 180 substream->pstr->stream, cmd); 181 return -EINVAL; 182 } 183 184 /* Update interrupt enable settings */ 185 imr = 0; 186 if (psc_dma->playback.active) 187 imr |= MPC52xx_PSC_IMR_TXEMP; 188 if (psc_dma->capture.active) 189 imr |= MPC52xx_PSC_IMR_ORERR; 190 out_be16(®s->isr_imr.imr, psc_dma->imr | imr); 191 192 return 0; 193} 194 195 196/* --------------------------------------------------------------------- 197 * The PSC DMA 'ASoC platform' driver 198 * 199 * Can be referenced by an 'ASoC machine' driver 200 * This driver only deals with the audio bus; it doesn't have any 201 * interaction with the attached codec 202 */ 203 204static const struct snd_pcm_hardware psc_dma_hardware = { 205 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | 206 SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | 207 SNDRV_PCM_INFO_BATCH, 208 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | 209 SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE, 210 .period_bytes_max = 1024 * 1024, 211 .period_bytes_min = 32, 212 .periods_min = 2, 213 .periods_max = 256, 214 .buffer_bytes_max = 2 * 1024 * 1024, 215 .fifo_size = 512, 216}; 217 218static int psc_dma_open(struct snd_soc_component *component, 219 struct snd_pcm_substream *substream) 220{ 221 struct snd_pcm_runtime *runtime = substream->runtime; 222 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 223 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); 224 struct psc_dma_stream *s; 225 int rc; 226 227 dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream); 228 229 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) 230 s = &psc_dma->capture; 231 else 232 s = &psc_dma->playback; 233 234 snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware); 235 236 rc = snd_pcm_hw_constraint_integer(runtime, 237 SNDRV_PCM_HW_PARAM_PERIODS); 238 if (rc < 0) { 239 dev_err(substream->pcm->card->dev, "invalid buffer size\n"); 240 return rc; 241 } 242 243 s->stream = substream; 244 return 0; 245} 246 247static int psc_dma_close(struct snd_soc_component *component, 248 struct snd_pcm_substream *substream) 249{ 250 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 251 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); 252 struct psc_dma_stream *s; 253 254 dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream); 255 256 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) 257 s = &psc_dma->capture; 258 else 259 s = &psc_dma->playback; 260 261 if (!psc_dma->playback.active && 262 !psc_dma->capture.active) { 263 264 /* Disable all interrupts and reset the PSC */ 265 out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr); 266 out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */ 267 } 268 s->stream = NULL; 269 return 0; 270} 271 272static snd_pcm_uframes_t 273psc_dma_pointer(struct snd_soc_component *component, 274 struct snd_pcm_substream *substream) 275{ 276 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 277 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); 278 struct psc_dma_stream *s; 279 dma_addr_t count; 280 281 if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) 282 s = &psc_dma->capture; 283 else 284 s = &psc_dma->playback; 285 286 count = s->period_current * s->period_bytes; 287 288 return bytes_to_frames(substream->runtime, count); 289} 290 291static int psc_dma_hw_params(struct snd_soc_component *component, 292 struct snd_pcm_substream *substream, 293 struct snd_pcm_hw_params *params) 294{ 295 snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); 296 297 return 0; 298} 299 300static int psc_dma_new(struct snd_soc_component *component, 301 struct snd_soc_pcm_runtime *rtd) 302{ 303 struct snd_card *card = rtd->card->snd_card; 304 struct snd_soc_dai *dai = asoc_rtd_to_cpu(rtd, 0); 305 struct snd_pcm *pcm = rtd->pcm; 306 size_t size = psc_dma_hardware.buffer_bytes_max; 307 int rc; 308 309 dev_dbg(component->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n", 310 card, dai, pcm); 311 312 rc = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32)); 313 if (rc) 314 return rc; 315 316 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) { 317 rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev, 318 size, &pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer); 319 if (rc) 320 goto playback_alloc_err; 321 } 322 323 if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) { 324 rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev, 325 size, &pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream->dma_buffer); 326 if (rc) 327 goto capture_alloc_err; 328 } 329 330 return 0; 331 332 capture_alloc_err: 333 if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) 334 snd_dma_free_pages(&pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer); 335 336 playback_alloc_err: 337 dev_err(card->dev, "Cannot allocate buffer(s)\n"); 338 339 return -ENOMEM; 340} 341 342static void psc_dma_free(struct snd_soc_component *component, 343 struct snd_pcm *pcm) 344{ 345 struct snd_pcm_substream *substream; 346 int stream; 347 348 dev_dbg(component->dev, "psc_dma_free(pcm=%p)\n", pcm); 349 350 for (stream = 0; stream < 2; stream++) { 351 substream = pcm->streams[stream].substream; 352 if (substream) { 353 snd_dma_free_pages(&substream->dma_buffer); 354 substream->dma_buffer.area = NULL; 355 substream->dma_buffer.addr = 0; 356 } 357 } 358} 359 360static const struct snd_soc_component_driver mpc5200_audio_dma_component = { 361 .name = DRV_NAME, 362 .open = psc_dma_open, 363 .close = psc_dma_close, 364 .hw_free = psc_dma_hw_free, 365 .pointer = psc_dma_pointer, 366 .trigger = psc_dma_trigger, 367 .hw_params = psc_dma_hw_params, 368 .pcm_construct = psc_dma_new, 369 .pcm_destruct = psc_dma_free, 370}; 371 372int mpc5200_audio_dma_create(struct platform_device *op) 373{ 374 phys_addr_t fifo; 375 struct psc_dma *psc_dma; 376 struct resource res; 377 int size, irq, rc; 378 const __be32 *prop; 379 void __iomem *regs; 380 int ret; 381 382 /* Fetch the registers and IRQ of the PSC */ 383 irq = irq_of_parse_and_map(op->dev.of_node, 0); 384 if (of_address_to_resource(op->dev.of_node, 0, &res)) { 385 dev_err(&op->dev, "Missing reg property\n"); 386 return -ENODEV; 387 } 388 regs = ioremap(res.start, resource_size(&res)); 389 if (!regs) { 390 dev_err(&op->dev, "Could not map registers\n"); 391 return -ENODEV; 392 } 393 394 /* Allocate and initialize the driver private data */ 395 psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL); 396 if (!psc_dma) { 397 ret = -ENOMEM; 398 goto out_unmap; 399 } 400 401 /* Get the PSC ID */ 402 prop = of_get_property(op->dev.of_node, "cell-index", &size); 403 if (!prop || size < sizeof *prop) { 404 ret = -ENODEV; 405 goto out_free; 406 } 407 408 spin_lock_init(&psc_dma->lock); 409 mutex_init(&psc_dma->mutex); 410 psc_dma->id = be32_to_cpu(*prop); 411 psc_dma->irq = irq; 412 psc_dma->psc_regs = regs; 413 psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs; 414 psc_dma->dev = &op->dev; 415 psc_dma->playback.psc_dma = psc_dma; 416 psc_dma->capture.psc_dma = psc_dma; 417 snprintf(psc_dma->name, sizeof psc_dma->name, "PSC%u", psc_dma->id); 418 419 /* Find the address of the fifo data registers and setup the 420 * DMA tasks */ 421 fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32); 422 psc_dma->capture.bcom_task = 423 bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512); 424 psc_dma->playback.bcom_task = 425 bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo); 426 if (!psc_dma->capture.bcom_task || 427 !psc_dma->playback.bcom_task) { 428 dev_err(&op->dev, "Could not allocate bestcomm tasks\n"); 429 ret = -ENODEV; 430 goto out_free; 431 } 432 433 /* Disable all interrupts and reset the PSC */ 434 out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr); 435 /* reset receiver */ 436 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX); 437 /* reset transmitter */ 438 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX); 439 /* reset error */ 440 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT); 441 /* reset mode */ 442 out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1); 443 444 /* Set up mode register; 445 * First write: RxRdy (FIFO Alarm) generates rx FIFO irq 446 * Second write: register Normal mode for non loopback 447 */ 448 out_8(&psc_dma->psc_regs->mode, 0); 449 out_8(&psc_dma->psc_regs->mode, 0); 450 451 /* Set the TX and RX fifo alarm thresholds */ 452 out_be16(&psc_dma->fifo_regs->rfalarm, 0x100); 453 out_8(&psc_dma->fifo_regs->rfcntl, 0x4); 454 out_be16(&psc_dma->fifo_regs->tfalarm, 0x100); 455 out_8(&psc_dma->fifo_regs->tfcntl, 0x7); 456 457 /* Lookup the IRQ numbers */ 458 psc_dma->playback.irq = 459 bcom_get_task_irq(psc_dma->playback.bcom_task); 460 psc_dma->capture.irq = 461 bcom_get_task_irq(psc_dma->capture.bcom_task); 462 463 rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED, 464 "psc-dma-status", psc_dma); 465 rc |= request_irq(psc_dma->capture.irq, &psc_dma_bcom_irq, IRQF_SHARED, 466 "psc-dma-capture", &psc_dma->capture); 467 rc |= request_irq(psc_dma->playback.irq, &psc_dma_bcom_irq, IRQF_SHARED, 468 "psc-dma-playback", &psc_dma->playback); 469 if (rc) { 470 ret = -ENODEV; 471 goto out_irq; 472 } 473 474 /* Save what we've done so it can be found again later */ 475 dev_set_drvdata(&op->dev, psc_dma); 476 477 /* Tell the ASoC OF helpers about it */ 478 return devm_snd_soc_register_component(&op->dev, 479 &mpc5200_audio_dma_component, NULL, 0); 480out_irq: 481 free_irq(psc_dma->irq, psc_dma); 482 free_irq(psc_dma->capture.irq, &psc_dma->capture); 483 free_irq(psc_dma->playback.irq, &psc_dma->playback); 484out_free: 485 kfree(psc_dma); 486out_unmap: 487 iounmap(regs); 488 return ret; 489} 490EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create); 491 492int mpc5200_audio_dma_destroy(struct platform_device *op) 493{ 494 struct psc_dma *psc_dma = dev_get_drvdata(&op->dev); 495 496 dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n"); 497 498 bcom_gen_bd_rx_release(psc_dma->capture.bcom_task); 499 bcom_gen_bd_tx_release(psc_dma->playback.bcom_task); 500 501 /* Release irqs */ 502 free_irq(psc_dma->irq, psc_dma); 503 free_irq(psc_dma->capture.irq, &psc_dma->capture); 504 free_irq(psc_dma->playback.irq, &psc_dma->playback); 505 506 iounmap(psc_dma->psc_regs); 507 kfree(psc_dma); 508 dev_set_drvdata(&op->dev, NULL); 509 510 return 0; 511} 512EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy); 513 514MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>"); 515MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver"); 516MODULE_LICENSE("GPL"); 517