1/* SPDX-License-Identifier: GPL-2.0 */
2
3#ifndef _WCD_CLSH_V2_H_
4#define _WCD_CLSH_V2_H_
5#include <sound/soc.h>
6
7enum wcd_clsh_event {
8	WCD_CLSH_EVENT_PRE_DAC = 1,
9	WCD_CLSH_EVENT_POST_PA,
10};
11
12/*
13 * Basic states for Class H state machine.
14 * represented as a bit mask within a u8 data type
15 * bit 0: EAR mode
16 * bit 1: HPH Left mode
17 * bit 2: HPH Right mode
18 * bit 3: Lineout mode
19 */
20#define	WCD_CLSH_STATE_IDLE	0
21#define	WCD_CLSH_STATE_EAR	BIT(0)
22#define	WCD_CLSH_STATE_HPHL	BIT(1)
23#define	WCD_CLSH_STATE_HPHR	BIT(2)
24#define	WCD_CLSH_STATE_LO	BIT(3)
25#define WCD_CLSH_STATE_MAX	4
26#define NUM_CLSH_STATES_V2	BIT(WCD_CLSH_STATE_MAX)
27
28enum wcd_clsh_mode {
29	CLS_H_NORMAL = 0, /* Class-H Default */
30	CLS_H_HIFI, /* Class-H HiFi */
31	CLS_H_LP, /* Class-H Low Power */
32	CLS_AB, /* Class-AB */
33	CLS_H_LOHIFI, /* LoHIFI */
34	CLS_NONE, /* None of the above modes */
35};
36
37struct wcd_clsh_ctrl;
38
39extern struct wcd_clsh_ctrl *wcd_clsh_ctrl_alloc(
40				struct snd_soc_component *component,
41				int version);
42extern void wcd_clsh_ctrl_free(struct wcd_clsh_ctrl *ctrl);
43extern int wcd_clsh_ctrl_get_state(struct wcd_clsh_ctrl *ctrl);
44extern int wcd_clsh_ctrl_set_state(struct wcd_clsh_ctrl *ctrl,
45				   enum wcd_clsh_event event,
46				   int state,
47				   enum wcd_clsh_mode mode);
48
49#endif /* _WCD_CLSH_V2_H_ */
50