1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * ALSA SoC TWL4030 codec driver 4 * 5 * Author: Steve Sakoman, <steve@sakoman.com> 6 */ 7 8#include <linux/module.h> 9#include <linux/moduleparam.h> 10#include <linux/init.h> 11#include <linux/delay.h> 12#include <linux/pm.h> 13#include <linux/i2c.h> 14#include <linux/platform_device.h> 15#include <linux/of.h> 16#include <linux/of_gpio.h> 17#include <linux/mfd/twl.h> 18#include <linux/slab.h> 19#include <linux/gpio.h> 20#include <sound/core.h> 21#include <sound/pcm.h> 22#include <sound/pcm_params.h> 23#include <sound/soc.h> 24#include <sound/initval.h> 25#include <sound/tlv.h> 26 27/* Register descriptions are here */ 28#include <linux/mfd/twl4030-audio.h> 29 30/* TWL4030 PMBR1 Register */ 31#define TWL4030_PMBR1_REG 0x0D 32/* TWL4030 PMBR1 Register GPIO6 mux bits */ 33#define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2) 34 35#define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1) 36 37/* codec private data */ 38struct twl4030_priv { 39 unsigned int codec_powered; 40 41 /* reference counts of AIF/APLL users */ 42 unsigned int apll_enabled; 43 44 struct snd_pcm_substream *master_substream; 45 struct snd_pcm_substream *slave_substream; 46 47 unsigned int configured; 48 unsigned int rate; 49 unsigned int sample_bits; 50 unsigned int channels; 51 52 unsigned int sysclk; 53 54 /* Output (with associated amp) states */ 55 u8 hsl_enabled, hsr_enabled; 56 u8 earpiece_enabled; 57 u8 predrivel_enabled, predriver_enabled; 58 u8 carkitl_enabled, carkitr_enabled; 59 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1]; 60 61 struct twl4030_codec_data *pdata; 62}; 63 64static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030) 65{ 66 int i; 67 u8 byte; 68 69 for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) { 70 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i); 71 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte; 72 } 73} 74 75static unsigned int twl4030_read(struct snd_soc_component *component, unsigned int reg) 76{ 77 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 78 u8 value = 0; 79 80 if (reg >= TWL4030_CACHEREGNUM) 81 return -EIO; 82 83 switch (reg) { 84 case TWL4030_REG_EAR_CTL: 85 case TWL4030_REG_PREDL_CTL: 86 case TWL4030_REG_PREDR_CTL: 87 case TWL4030_REG_PRECKL_CTL: 88 case TWL4030_REG_PRECKR_CTL: 89 case TWL4030_REG_HS_GAIN_SET: 90 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL]; 91 break; 92 default: 93 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg); 94 break; 95 } 96 97 return value; 98} 99 100static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030, 101 unsigned int reg) 102{ 103 bool write_to_reg = false; 104 105 /* Decide if the given register can be written */ 106 switch (reg) { 107 case TWL4030_REG_EAR_CTL: 108 if (twl4030->earpiece_enabled) 109 write_to_reg = true; 110 break; 111 case TWL4030_REG_PREDL_CTL: 112 if (twl4030->predrivel_enabled) 113 write_to_reg = true; 114 break; 115 case TWL4030_REG_PREDR_CTL: 116 if (twl4030->predriver_enabled) 117 write_to_reg = true; 118 break; 119 case TWL4030_REG_PRECKL_CTL: 120 if (twl4030->carkitl_enabled) 121 write_to_reg = true; 122 break; 123 case TWL4030_REG_PRECKR_CTL: 124 if (twl4030->carkitr_enabled) 125 write_to_reg = true; 126 break; 127 case TWL4030_REG_HS_GAIN_SET: 128 if (twl4030->hsl_enabled || twl4030->hsr_enabled) 129 write_to_reg = true; 130 break; 131 default: 132 /* All other register can be written */ 133 write_to_reg = true; 134 break; 135 } 136 137 return write_to_reg; 138} 139 140static int twl4030_write(struct snd_soc_component *component, unsigned int reg, 141 unsigned int value) 142{ 143 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 144 145 /* Update the ctl cache */ 146 switch (reg) { 147 case TWL4030_REG_EAR_CTL: 148 case TWL4030_REG_PREDL_CTL: 149 case TWL4030_REG_PREDR_CTL: 150 case TWL4030_REG_PRECKL_CTL: 151 case TWL4030_REG_PRECKR_CTL: 152 case TWL4030_REG_HS_GAIN_SET: 153 twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value; 154 break; 155 default: 156 break; 157 } 158 159 if (twl4030_can_write_to_chip(twl4030, reg)) 160 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg); 161 162 return 0; 163} 164 165static inline void twl4030_wait_ms(int time) 166{ 167 if (time < 60) { 168 time *= 1000; 169 usleep_range(time, time + 500); 170 } else { 171 msleep(time); 172 } 173} 174 175static void twl4030_codec_enable(struct snd_soc_component *component, int enable) 176{ 177 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 178 int mode; 179 180 if (enable == twl4030->codec_powered) 181 return; 182 183 if (enable) 184 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER); 185 else 186 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER); 187 188 if (mode >= 0) 189 twl4030->codec_powered = enable; 190 191 /* REVISIT: this delay is present in TI sample drivers */ 192 /* but there seems to be no TRM requirement for it */ 193 udelay(10); 194} 195 196static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata, 197 struct device_node *node) 198{ 199 int value; 200 201 of_property_read_u32(node, "ti,digimic_delay", 202 &pdata->digimic_delay); 203 of_property_read_u32(node, "ti,ramp_delay_value", 204 &pdata->ramp_delay_value); 205 of_property_read_u32(node, "ti,offset_cncl_path", 206 &pdata->offset_cncl_path); 207 if (!of_property_read_u32(node, "ti,hs_extmute", &value)) 208 pdata->hs_extmute = value; 209 210 pdata->hs_extmute_gpio = of_get_named_gpio(node, 211 "ti,hs_extmute_gpio", 0); 212 if (gpio_is_valid(pdata->hs_extmute_gpio)) 213 pdata->hs_extmute = 1; 214} 215 216static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_component *component) 217{ 218 struct twl4030_codec_data *pdata = dev_get_platdata(component->dev); 219 struct device_node *twl4030_codec_node = NULL; 220 221 twl4030_codec_node = of_get_child_by_name(component->dev->parent->of_node, 222 "codec"); 223 224 if (!pdata && twl4030_codec_node) { 225 pdata = devm_kzalloc(component->dev, 226 sizeof(struct twl4030_codec_data), 227 GFP_KERNEL); 228 if (!pdata) { 229 of_node_put(twl4030_codec_node); 230 return NULL; 231 } 232 twl4030_setup_pdata_of(pdata, twl4030_codec_node); 233 of_node_put(twl4030_codec_node); 234 } 235 236 return pdata; 237} 238 239static void twl4030_init_chip(struct snd_soc_component *component) 240{ 241 struct twl4030_codec_data *pdata; 242 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 243 u8 reg, byte; 244 int i = 0; 245 246 pdata = twl4030_get_pdata(component); 247 248 if (pdata && pdata->hs_extmute) { 249 if (gpio_is_valid(pdata->hs_extmute_gpio)) { 250 int ret; 251 252 if (!pdata->hs_extmute_gpio) 253 dev_warn(component->dev, 254 "Extmute GPIO is 0 is this correct?\n"); 255 256 ret = gpio_request_one(pdata->hs_extmute_gpio, 257 GPIOF_OUT_INIT_LOW, 258 "hs_extmute"); 259 if (ret) { 260 dev_err(component->dev, 261 "Failed to get hs_extmute GPIO\n"); 262 pdata->hs_extmute_gpio = -1; 263 } 264 } else { 265 u8 pin_mux; 266 267 /* Set TWL4030 GPIO6 as EXTMUTE signal */ 268 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux, 269 TWL4030_PMBR1_REG); 270 pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03); 271 pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02); 272 twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux, 273 TWL4030_PMBR1_REG); 274 } 275 } 276 277 /* Initialize the local ctl register cache */ 278 tw4030_init_ctl_cache(twl4030); 279 280 /* anti-pop when changing analog gain */ 281 reg = twl4030_read(component, TWL4030_REG_MISC_SET_1); 282 twl4030_write(component, TWL4030_REG_MISC_SET_1, 283 reg | TWL4030_SMOOTH_ANAVOL_EN); 284 285 twl4030_write(component, TWL4030_REG_OPTION, 286 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN | 287 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN); 288 289 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */ 290 twl4030_write(component, TWL4030_REG_ARXR2_APGA_CTL, 0x32); 291 292 /* Machine dependent setup */ 293 if (!pdata) 294 return; 295 296 twl4030->pdata = pdata; 297 298 reg = twl4030_read(component, TWL4030_REG_HS_POPN_SET); 299 reg &= ~TWL4030_RAMP_DELAY; 300 reg |= (pdata->ramp_delay_value << 2); 301 twl4030_write(component, TWL4030_REG_HS_POPN_SET, reg); 302 303 /* initiate offset cancellation */ 304 twl4030_codec_enable(component, 1); 305 306 reg = twl4030_read(component, TWL4030_REG_ANAMICL); 307 reg &= ~TWL4030_OFFSET_CNCL_SEL; 308 reg |= pdata->offset_cncl_path; 309 twl4030_write(component, TWL4030_REG_ANAMICL, 310 reg | TWL4030_CNCL_OFFSET_START); 311 312 /* 313 * Wait for offset cancellation to complete. 314 * Since this takes a while, do not slam the i2c. 315 * Start polling the status after ~20ms. 316 */ 317 msleep(20); 318 do { 319 usleep_range(1000, 2000); 320 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true); 321 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, 322 TWL4030_REG_ANAMICL); 323 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false); 324 } while ((i++ < 100) && 325 ((byte & TWL4030_CNCL_OFFSET_START) == 326 TWL4030_CNCL_OFFSET_START)); 327 328 twl4030_codec_enable(component, 0); 329} 330 331static void twl4030_apll_enable(struct snd_soc_component *component, int enable) 332{ 333 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 334 335 if (enable) { 336 twl4030->apll_enabled++; 337 if (twl4030->apll_enabled == 1) 338 twl4030_audio_enable_resource( 339 TWL4030_AUDIO_RES_APLL); 340 } else { 341 twl4030->apll_enabled--; 342 if (!twl4030->apll_enabled) 343 twl4030_audio_disable_resource( 344 TWL4030_AUDIO_RES_APLL); 345 } 346} 347 348/* Earpiece */ 349static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = { 350 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0), 351 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0), 352 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0), 353 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0), 354}; 355 356/* PreDrive Left */ 357static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = { 358 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0), 359 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0), 360 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0), 361 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0), 362}; 363 364/* PreDrive Right */ 365static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = { 366 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0), 367 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0), 368 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0), 369 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0), 370}; 371 372/* Headset Left */ 373static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = { 374 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0), 375 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0), 376 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0), 377}; 378 379/* Headset Right */ 380static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = { 381 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0), 382 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0), 383 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0), 384}; 385 386/* Carkit Left */ 387static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = { 388 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0), 389 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0), 390 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0), 391}; 392 393/* Carkit Right */ 394static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = { 395 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0), 396 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0), 397 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0), 398}; 399 400/* Handsfree Left */ 401static const char *twl4030_handsfreel_texts[] = 402 {"Voice", "AudioL1", "AudioL2", "AudioR2"}; 403 404static SOC_ENUM_SINGLE_DECL(twl4030_handsfreel_enum, 405 TWL4030_REG_HFL_CTL, 0, 406 twl4030_handsfreel_texts); 407 408static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control = 409SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum); 410 411/* Handsfree Left virtual mute */ 412static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control = 413 SOC_DAPM_SINGLE_VIRT("Switch", 1); 414 415/* Handsfree Right */ 416static const char *twl4030_handsfreer_texts[] = 417 {"Voice", "AudioR1", "AudioR2", "AudioL2"}; 418 419static SOC_ENUM_SINGLE_DECL(twl4030_handsfreer_enum, 420 TWL4030_REG_HFR_CTL, 0, 421 twl4030_handsfreer_texts); 422 423static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control = 424SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum); 425 426/* Handsfree Right virtual mute */ 427static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control = 428 SOC_DAPM_SINGLE_VIRT("Switch", 1); 429 430/* Vibra */ 431/* Vibra audio path selection */ 432static const char *twl4030_vibra_texts[] = 433 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"}; 434 435static SOC_ENUM_SINGLE_DECL(twl4030_vibra_enum, 436 TWL4030_REG_VIBRA_CTL, 2, 437 twl4030_vibra_texts); 438 439static const struct snd_kcontrol_new twl4030_dapm_vibra_control = 440SOC_DAPM_ENUM("Route", twl4030_vibra_enum); 441 442/* Vibra path selection: local vibrator (PWM) or audio driven */ 443static const char *twl4030_vibrapath_texts[] = 444 {"Local vibrator", "Audio"}; 445 446static SOC_ENUM_SINGLE_DECL(twl4030_vibrapath_enum, 447 TWL4030_REG_VIBRA_CTL, 4, 448 twl4030_vibrapath_texts); 449 450static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control = 451SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum); 452 453/* Left analog microphone selection */ 454static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = { 455 SOC_DAPM_SINGLE("Main Mic Capture Switch", 456 TWL4030_REG_ANAMICL, 0, 1, 0), 457 SOC_DAPM_SINGLE("Headset Mic Capture Switch", 458 TWL4030_REG_ANAMICL, 1, 1, 0), 459 SOC_DAPM_SINGLE("AUXL Capture Switch", 460 TWL4030_REG_ANAMICL, 2, 1, 0), 461 SOC_DAPM_SINGLE("Carkit Mic Capture Switch", 462 TWL4030_REG_ANAMICL, 3, 1, 0), 463}; 464 465/* Right analog microphone selection */ 466static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = { 467 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0), 468 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0), 469}; 470 471/* TX1 L/R Analog/Digital microphone selection */ 472static const char *twl4030_micpathtx1_texts[] = 473 {"Analog", "Digimic0"}; 474 475static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx1_enum, 476 TWL4030_REG_ADCMICSEL, 0, 477 twl4030_micpathtx1_texts); 478 479static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control = 480SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum); 481 482/* TX2 L/R Analog/Digital microphone selection */ 483static const char *twl4030_micpathtx2_texts[] = 484 {"Analog", "Digimic1"}; 485 486static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx2_enum, 487 TWL4030_REG_ADCMICSEL, 2, 488 twl4030_micpathtx2_texts); 489 490static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control = 491SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum); 492 493/* Analog bypass for AudioR1 */ 494static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control = 495 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0); 496 497/* Analog bypass for AudioL1 */ 498static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control = 499 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0); 500 501/* Analog bypass for AudioR2 */ 502static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control = 503 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0); 504 505/* Analog bypass for AudioL2 */ 506static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control = 507 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0); 508 509/* Analog bypass for Voice */ 510static const struct snd_kcontrol_new twl4030_dapm_abypassv_control = 511 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0); 512 513/* Digital bypass gain, mute instead of -30dB */ 514static const DECLARE_TLV_DB_RANGE(twl4030_dapm_dbypass_tlv, 515 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1), 516 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0), 517 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0) 518); 519 520/* Digital bypass left (TX1L -> RX2L) */ 521static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control = 522 SOC_DAPM_SINGLE_TLV("Volume", 523 TWL4030_REG_ATX2ARXPGA, 3, 7, 0, 524 twl4030_dapm_dbypass_tlv); 525 526/* Digital bypass right (TX1R -> RX2R) */ 527static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control = 528 SOC_DAPM_SINGLE_TLV("Volume", 529 TWL4030_REG_ATX2ARXPGA, 0, 7, 0, 530 twl4030_dapm_dbypass_tlv); 531 532/* 533 * Voice Sidetone GAIN volume control: 534 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB) 535 */ 536static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1); 537 538/* Digital bypass voice: sidetone (VUL -> VDL)*/ 539static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control = 540 SOC_DAPM_SINGLE_TLV("Volume", 541 TWL4030_REG_VSTPGA, 0, 0x29, 0, 542 twl4030_dapm_dbypassv_tlv); 543 544/* 545 * Output PGA builder: 546 * Handle the muting and unmuting of the given output (turning off the 547 * amplifier associated with the output pin) 548 * On mute bypass the reg_cache and write 0 to the register 549 * On unmute: restore the register content from the reg_cache 550 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R 551 */ 552#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \ 553static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \ 554 struct snd_kcontrol *kcontrol, int event) \ 555{ \ 556 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); \ 557 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); \ 558 \ 559 switch (event) { \ 560 case SND_SOC_DAPM_POST_PMU: \ 561 twl4030->pin_name##_enabled = 1; \ 562 twl4030_write(component, reg, twl4030_read(component, reg)); \ 563 break; \ 564 case SND_SOC_DAPM_POST_PMD: \ 565 twl4030->pin_name##_enabled = 0; \ 566 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \ 567 break; \ 568 } \ 569 return 0; \ 570} 571 572TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN); 573TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN); 574TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN); 575TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN); 576TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN); 577 578static void handsfree_ramp(struct snd_soc_component *component, int reg, int ramp) 579{ 580 unsigned char hs_ctl; 581 582 hs_ctl = twl4030_read(component, reg); 583 584 if (ramp) { 585 /* HF ramp-up */ 586 hs_ctl |= TWL4030_HF_CTL_REF_EN; 587 twl4030_write(component, reg, hs_ctl); 588 udelay(10); 589 hs_ctl |= TWL4030_HF_CTL_RAMP_EN; 590 twl4030_write(component, reg, hs_ctl); 591 udelay(40); 592 hs_ctl |= TWL4030_HF_CTL_LOOP_EN; 593 hs_ctl |= TWL4030_HF_CTL_HB_EN; 594 twl4030_write(component, reg, hs_ctl); 595 } else { 596 /* HF ramp-down */ 597 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN; 598 hs_ctl &= ~TWL4030_HF_CTL_HB_EN; 599 twl4030_write(component, reg, hs_ctl); 600 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN; 601 twl4030_write(component, reg, hs_ctl); 602 udelay(40); 603 hs_ctl &= ~TWL4030_HF_CTL_REF_EN; 604 twl4030_write(component, reg, hs_ctl); 605 } 606} 607 608static int handsfreelpga_event(struct snd_soc_dapm_widget *w, 609 struct snd_kcontrol *kcontrol, int event) 610{ 611 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 612 613 switch (event) { 614 case SND_SOC_DAPM_POST_PMU: 615 handsfree_ramp(component, TWL4030_REG_HFL_CTL, 1); 616 break; 617 case SND_SOC_DAPM_POST_PMD: 618 handsfree_ramp(component, TWL4030_REG_HFL_CTL, 0); 619 break; 620 } 621 return 0; 622} 623 624static int handsfreerpga_event(struct snd_soc_dapm_widget *w, 625 struct snd_kcontrol *kcontrol, int event) 626{ 627 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 628 629 switch (event) { 630 case SND_SOC_DAPM_POST_PMU: 631 handsfree_ramp(component, TWL4030_REG_HFR_CTL, 1); 632 break; 633 case SND_SOC_DAPM_POST_PMD: 634 handsfree_ramp(component, TWL4030_REG_HFR_CTL, 0); 635 break; 636 } 637 return 0; 638} 639 640static int vibramux_event(struct snd_soc_dapm_widget *w, 641 struct snd_kcontrol *kcontrol, int event) 642{ 643 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 644 645 twl4030_write(component, TWL4030_REG_VIBRA_SET, 0xff); 646 return 0; 647} 648 649static int apll_event(struct snd_soc_dapm_widget *w, 650 struct snd_kcontrol *kcontrol, int event) 651{ 652 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 653 654 switch (event) { 655 case SND_SOC_DAPM_PRE_PMU: 656 twl4030_apll_enable(component, 1); 657 break; 658 case SND_SOC_DAPM_POST_PMD: 659 twl4030_apll_enable(component, 0); 660 break; 661 } 662 return 0; 663} 664 665static int aif_event(struct snd_soc_dapm_widget *w, 666 struct snd_kcontrol *kcontrol, int event) 667{ 668 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 669 u8 audio_if; 670 671 audio_if = twl4030_read(component, TWL4030_REG_AUDIO_IF); 672 switch (event) { 673 case SND_SOC_DAPM_PRE_PMU: 674 /* Enable AIF */ 675 /* enable the PLL before we use it to clock the DAI */ 676 twl4030_apll_enable(component, 1); 677 678 twl4030_write(component, TWL4030_REG_AUDIO_IF, 679 audio_if | TWL4030_AIF_EN); 680 break; 681 case SND_SOC_DAPM_POST_PMD: 682 /* disable the DAI before we stop it's source PLL */ 683 twl4030_write(component, TWL4030_REG_AUDIO_IF, 684 audio_if & ~TWL4030_AIF_EN); 685 twl4030_apll_enable(component, 0); 686 break; 687 } 688 return 0; 689} 690 691static void headset_ramp(struct snd_soc_component *component, int ramp) 692{ 693 unsigned char hs_gain, hs_pop; 694 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 695 struct twl4030_codec_data *pdata = twl4030->pdata; 696 /* Base values for ramp delay calculation: 2^19 - 2^26 */ 697 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304, 698 8388608, 16777216, 33554432, 67108864}; 699 unsigned int delay; 700 701 hs_gain = twl4030_read(component, TWL4030_REG_HS_GAIN_SET); 702 hs_pop = twl4030_read(component, TWL4030_REG_HS_POPN_SET); 703 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] / 704 twl4030->sysclk) + 1; 705 706 /* Enable external mute control, this dramatically reduces 707 * the pop-noise */ 708 if (pdata && pdata->hs_extmute) { 709 if (gpio_is_valid(pdata->hs_extmute_gpio)) { 710 gpio_set_value(pdata->hs_extmute_gpio, 1); 711 } else { 712 hs_pop |= TWL4030_EXTMUTE; 713 twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop); 714 } 715 } 716 717 if (ramp) { 718 /* Headset ramp-up according to the TRM */ 719 hs_pop |= TWL4030_VMID_EN; 720 twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop); 721 /* Actually write to the register */ 722 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain, 723 TWL4030_REG_HS_GAIN_SET); 724 hs_pop |= TWL4030_RAMP_EN; 725 twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop); 726 /* Wait ramp delay time + 1, so the VMID can settle */ 727 twl4030_wait_ms(delay); 728 } else { 729 /* Headset ramp-down _not_ according to 730 * the TRM, but in a way that it is working */ 731 hs_pop &= ~TWL4030_RAMP_EN; 732 twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop); 733 /* Wait ramp delay time + 1, so the VMID can settle */ 734 twl4030_wait_ms(delay); 735 /* Bypass the reg_cache to mute the headset */ 736 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f), 737 TWL4030_REG_HS_GAIN_SET); 738 739 hs_pop &= ~TWL4030_VMID_EN; 740 twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop); 741 } 742 743 /* Disable external mute */ 744 if (pdata && pdata->hs_extmute) { 745 if (gpio_is_valid(pdata->hs_extmute_gpio)) { 746 gpio_set_value(pdata->hs_extmute_gpio, 0); 747 } else { 748 hs_pop &= ~TWL4030_EXTMUTE; 749 twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop); 750 } 751 } 752} 753 754static int headsetlpga_event(struct snd_soc_dapm_widget *w, 755 struct snd_kcontrol *kcontrol, int event) 756{ 757 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 758 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 759 760 switch (event) { 761 case SND_SOC_DAPM_POST_PMU: 762 /* Do the ramp-up only once */ 763 if (!twl4030->hsr_enabled) 764 headset_ramp(component, 1); 765 766 twl4030->hsl_enabled = 1; 767 break; 768 case SND_SOC_DAPM_POST_PMD: 769 /* Do the ramp-down only if both headsetL/R is disabled */ 770 if (!twl4030->hsr_enabled) 771 headset_ramp(component, 0); 772 773 twl4030->hsl_enabled = 0; 774 break; 775 } 776 return 0; 777} 778 779static int headsetrpga_event(struct snd_soc_dapm_widget *w, 780 struct snd_kcontrol *kcontrol, int event) 781{ 782 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 783 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 784 785 switch (event) { 786 case SND_SOC_DAPM_POST_PMU: 787 /* Do the ramp-up only once */ 788 if (!twl4030->hsl_enabled) 789 headset_ramp(component, 1); 790 791 twl4030->hsr_enabled = 1; 792 break; 793 case SND_SOC_DAPM_POST_PMD: 794 /* Do the ramp-down only if both headsetL/R is disabled */ 795 if (!twl4030->hsl_enabled) 796 headset_ramp(component, 0); 797 798 twl4030->hsr_enabled = 0; 799 break; 800 } 801 return 0; 802} 803 804static int digimic_event(struct snd_soc_dapm_widget *w, 805 struct snd_kcontrol *kcontrol, int event) 806{ 807 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); 808 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 809 struct twl4030_codec_data *pdata = twl4030->pdata; 810 811 if (pdata && pdata->digimic_delay) 812 twl4030_wait_ms(pdata->digimic_delay); 813 return 0; 814} 815 816/* 817 * Some of the gain controls in TWL (mostly those which are associated with 818 * the outputs) are implemented in an interesting way: 819 * 0x0 : Power down (mute) 820 * 0x1 : 6dB 821 * 0x2 : 0 dB 822 * 0x3 : -6 dB 823 * Inverting not going to help with these. 824 * Custom volsw and volsw_2r get/put functions to handle these gain bits. 825 */ 826static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol, 827 struct snd_ctl_elem_value *ucontrol) 828{ 829 struct soc_mixer_control *mc = 830 (struct soc_mixer_control *)kcontrol->private_value; 831 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 832 unsigned int reg = mc->reg; 833 unsigned int shift = mc->shift; 834 unsigned int rshift = mc->rshift; 835 int max = mc->max; 836 int mask = (1 << fls(max)) - 1; 837 838 ucontrol->value.integer.value[0] = 839 (twl4030_read(component, reg) >> shift) & mask; 840 if (ucontrol->value.integer.value[0]) 841 ucontrol->value.integer.value[0] = 842 max + 1 - ucontrol->value.integer.value[0]; 843 844 if (shift != rshift) { 845 ucontrol->value.integer.value[1] = 846 (twl4030_read(component, reg) >> rshift) & mask; 847 if (ucontrol->value.integer.value[1]) 848 ucontrol->value.integer.value[1] = 849 max + 1 - ucontrol->value.integer.value[1]; 850 } 851 852 return 0; 853} 854 855static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol, 856 struct snd_ctl_elem_value *ucontrol) 857{ 858 struct soc_mixer_control *mc = 859 (struct soc_mixer_control *)kcontrol->private_value; 860 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 861 unsigned int reg = mc->reg; 862 unsigned int shift = mc->shift; 863 unsigned int rshift = mc->rshift; 864 int max = mc->max; 865 int mask = (1 << fls(max)) - 1; 866 unsigned short val, val2, val_mask; 867 868 val = (ucontrol->value.integer.value[0] & mask); 869 870 val_mask = mask << shift; 871 if (val) 872 val = max + 1 - val; 873 val = val << shift; 874 if (shift != rshift) { 875 val2 = (ucontrol->value.integer.value[1] & mask); 876 val_mask |= mask << rshift; 877 if (val2) 878 val2 = max + 1 - val2; 879 val |= val2 << rshift; 880 } 881 return snd_soc_component_update_bits(component, reg, val_mask, val); 882} 883 884static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, 885 struct snd_ctl_elem_value *ucontrol) 886{ 887 struct soc_mixer_control *mc = 888 (struct soc_mixer_control *)kcontrol->private_value; 889 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 890 unsigned int reg = mc->reg; 891 unsigned int reg2 = mc->rreg; 892 unsigned int shift = mc->shift; 893 int max = mc->max; 894 int mask = (1<<fls(max))-1; 895 896 ucontrol->value.integer.value[0] = 897 (twl4030_read(component, reg) >> shift) & mask; 898 ucontrol->value.integer.value[1] = 899 (twl4030_read(component, reg2) >> shift) & mask; 900 901 if (ucontrol->value.integer.value[0]) 902 ucontrol->value.integer.value[0] = 903 max + 1 - ucontrol->value.integer.value[0]; 904 if (ucontrol->value.integer.value[1]) 905 ucontrol->value.integer.value[1] = 906 max + 1 - ucontrol->value.integer.value[1]; 907 908 return 0; 909} 910 911static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol, 912 struct snd_ctl_elem_value *ucontrol) 913{ 914 struct soc_mixer_control *mc = 915 (struct soc_mixer_control *)kcontrol->private_value; 916 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 917 unsigned int reg = mc->reg; 918 unsigned int reg2 = mc->rreg; 919 unsigned int shift = mc->shift; 920 int max = mc->max; 921 int mask = (1 << fls(max)) - 1; 922 int err; 923 unsigned short val, val2, val_mask; 924 925 val_mask = mask << shift; 926 val = (ucontrol->value.integer.value[0] & mask); 927 val2 = (ucontrol->value.integer.value[1] & mask); 928 929 if (val) 930 val = max + 1 - val; 931 if (val2) 932 val2 = max + 1 - val2; 933 934 val = val << shift; 935 val2 = val2 << shift; 936 937 err = snd_soc_component_update_bits(component, reg, val_mask, val); 938 if (err < 0) 939 return err; 940 941 err = snd_soc_component_update_bits(component, reg2, val_mask, val2); 942 return err; 943} 944 945/* Codec operation modes */ 946static const char *twl4030_op_modes_texts[] = { 947 "Option 2 (voice/audio)", "Option 1 (audio)" 948}; 949 950static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum, 951 TWL4030_REG_CODEC_MODE, 0, 952 twl4030_op_modes_texts); 953 954static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol, 955 struct snd_ctl_elem_value *ucontrol) 956{ 957 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 958 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 959 960 if (twl4030->configured) { 961 dev_err(component->dev, 962 "operation mode cannot be changed on-the-fly\n"); 963 return -EBUSY; 964 } 965 966 return snd_soc_put_enum_double(kcontrol, ucontrol); 967} 968 969/* 970 * FGAIN volume control: 971 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB) 972 */ 973static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1); 974 975/* 976 * CGAIN volume control: 977 * 0 dB to 12 dB in 6 dB steps 978 * value 2 and 3 means 12 dB 979 */ 980static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0); 981 982/* 983 * Voice Downlink GAIN volume control: 984 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB) 985 */ 986static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1); 987 988/* 989 * Analog playback gain 990 * -24 dB to 12 dB in 2 dB steps 991 */ 992static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0); 993 994/* 995 * Gain controls tied to outputs 996 * -6 dB to 6 dB in 6 dB steps (mute instead of -12) 997 */ 998static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1); 999 1000/* 1001 * Gain control for earpiece amplifier 1002 * 0 dB to 12 dB in 6 dB steps (mute instead of -6) 1003 */ 1004static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1); 1005 1006/* 1007 * Capture gain after the ADCs 1008 * from 0 dB to 31 dB in 1 dB steps 1009 */ 1010static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0); 1011 1012/* 1013 * Gain control for input amplifiers 1014 * 0 dB to 30 dB in 6 dB steps 1015 */ 1016static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0); 1017 1018/* AVADC clock priority */ 1019static const char *twl4030_avadc_clk_priority_texts[] = { 1020 "Voice high priority", "HiFi high priority" 1021}; 1022 1023static SOC_ENUM_SINGLE_DECL(twl4030_avadc_clk_priority_enum, 1024 TWL4030_REG_AVADC_CTL, 2, 1025 twl4030_avadc_clk_priority_texts); 1026 1027static const char *twl4030_rampdelay_texts[] = { 1028 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms", 1029 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms", 1030 "3495/2581/1748 ms" 1031}; 1032 1033static SOC_ENUM_SINGLE_DECL(twl4030_rampdelay_enum, 1034 TWL4030_REG_HS_POPN_SET, 2, 1035 twl4030_rampdelay_texts); 1036 1037/* Vibra H-bridge direction mode */ 1038static const char *twl4030_vibradirmode_texts[] = { 1039 "Vibra H-bridge direction", "Audio data MSB", 1040}; 1041 1042static SOC_ENUM_SINGLE_DECL(twl4030_vibradirmode_enum, 1043 TWL4030_REG_VIBRA_CTL, 5, 1044 twl4030_vibradirmode_texts); 1045 1046/* Vibra H-bridge direction */ 1047static const char *twl4030_vibradir_texts[] = { 1048 "Positive polarity", "Negative polarity", 1049}; 1050 1051static SOC_ENUM_SINGLE_DECL(twl4030_vibradir_enum, 1052 TWL4030_REG_VIBRA_CTL, 1, 1053 twl4030_vibradir_texts); 1054 1055/* Digimic Left and right swapping */ 1056static const char *twl4030_digimicswap_texts[] = { 1057 "Not swapped", "Swapped", 1058}; 1059 1060static SOC_ENUM_SINGLE_DECL(twl4030_digimicswap_enum, 1061 TWL4030_REG_MISC_SET_1, 0, 1062 twl4030_digimicswap_texts); 1063 1064static const struct snd_kcontrol_new twl4030_snd_controls[] = { 1065 /* Codec operation mode control */ 1066 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum, 1067 snd_soc_get_enum_double, 1068 snd_soc_put_twl4030_opmode_enum_double), 1069 1070 /* Common playback gain controls */ 1071 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume", 1072 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA, 1073 0, 0x3f, 0, digital_fine_tlv), 1074 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume", 1075 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA, 1076 0, 0x3f, 0, digital_fine_tlv), 1077 1078 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume", 1079 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA, 1080 6, 0x2, 0, digital_coarse_tlv), 1081 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume", 1082 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA, 1083 6, 0x2, 0, digital_coarse_tlv), 1084 1085 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume", 1086 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL, 1087 3, 0x12, 1, analog_tlv), 1088 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume", 1089 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, 1090 3, 0x12, 1, analog_tlv), 1091 SOC_DOUBLE_R("DAC1 Analog Playback Switch", 1092 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL, 1093 1, 1, 0), 1094 SOC_DOUBLE_R("DAC2 Analog Playback Switch", 1095 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, 1096 1, 1, 0), 1097 1098 /* Common voice downlink gain controls */ 1099 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume", 1100 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv), 1101 1102 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume", 1103 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv), 1104 1105 SOC_SINGLE("DAC Voice Analog Downlink Switch", 1106 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0), 1107 1108 /* Separate output gain controls */ 1109 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume", 1110 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL, 1111 4, 3, 0, snd_soc_get_volsw_r2_twl4030, 1112 snd_soc_put_volsw_r2_twl4030, output_tvl), 1113 1114 SOC_DOUBLE_EXT_TLV("Headset Playback Volume", 1115 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030, 1116 snd_soc_put_volsw_twl4030, output_tvl), 1117 1118 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume", 1119 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL, 1120 4, 3, 0, snd_soc_get_volsw_r2_twl4030, 1121 snd_soc_put_volsw_r2_twl4030, output_tvl), 1122 1123 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume", 1124 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030, 1125 snd_soc_put_volsw_twl4030, output_ear_tvl), 1126 1127 /* Common capture gain controls */ 1128 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume", 1129 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA, 1130 0, 0x1f, 0, digital_capture_tlv), 1131 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume", 1132 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA, 1133 0, 0x1f, 0, digital_capture_tlv), 1134 1135 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN, 1136 0, 3, 5, 0, input_gain_tlv), 1137 1138 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum), 1139 1140 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum), 1141 1142 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum), 1143 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum), 1144 1145 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum), 1146}; 1147 1148static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = { 1149 /* Left channel inputs */ 1150 SND_SOC_DAPM_INPUT("MAINMIC"), 1151 SND_SOC_DAPM_INPUT("HSMIC"), 1152 SND_SOC_DAPM_INPUT("AUXL"), 1153 SND_SOC_DAPM_INPUT("CARKITMIC"), 1154 /* Right channel inputs */ 1155 SND_SOC_DAPM_INPUT("SUBMIC"), 1156 SND_SOC_DAPM_INPUT("AUXR"), 1157 /* Digital microphones (Stereo) */ 1158 SND_SOC_DAPM_INPUT("DIGIMIC0"), 1159 SND_SOC_DAPM_INPUT("DIGIMIC1"), 1160 1161 /* Outputs */ 1162 SND_SOC_DAPM_OUTPUT("EARPIECE"), 1163 SND_SOC_DAPM_OUTPUT("PREDRIVEL"), 1164 SND_SOC_DAPM_OUTPUT("PREDRIVER"), 1165 SND_SOC_DAPM_OUTPUT("HSOL"), 1166 SND_SOC_DAPM_OUTPUT("HSOR"), 1167 SND_SOC_DAPM_OUTPUT("CARKITL"), 1168 SND_SOC_DAPM_OUTPUT("CARKITR"), 1169 SND_SOC_DAPM_OUTPUT("HFL"), 1170 SND_SOC_DAPM_OUTPUT("HFR"), 1171 SND_SOC_DAPM_OUTPUT("VIBRA"), 1172 1173 /* AIF and APLL clocks for running DAIs (including loopback) */ 1174 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"), 1175 SND_SOC_DAPM_INPUT("Virtual HiFi IN"), 1176 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"), 1177 1178 /* DACs */ 1179 SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0), 1180 SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0), 1181 SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0), 1182 SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0), 1183 SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0), 1184 1185 SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0, 1186 TWL4030_REG_VOICE_IF, 6, 0), 1187 1188 /* Analog bypasses */ 1189 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0, 1190 &twl4030_dapm_abypassr1_control), 1191 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0, 1192 &twl4030_dapm_abypassl1_control), 1193 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0, 1194 &twl4030_dapm_abypassr2_control), 1195 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0, 1196 &twl4030_dapm_abypassl2_control), 1197 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0, 1198 &twl4030_dapm_abypassv_control), 1199 1200 /* Master analog loopback switch */ 1201 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0, 1202 NULL, 0), 1203 1204 /* Digital bypasses */ 1205 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0, 1206 &twl4030_dapm_dbypassl_control), 1207 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0, 1208 &twl4030_dapm_dbypassr_control), 1209 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0, 1210 &twl4030_dapm_dbypassv_control), 1211 1212 /* Digital mixers, power control for the physical DACs */ 1213 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer", 1214 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0), 1215 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer", 1216 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0), 1217 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer", 1218 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0), 1219 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer", 1220 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0), 1221 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer", 1222 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0), 1223 1224 /* Analog mixers, power control for the physical PGAs */ 1225 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer", 1226 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0), 1227 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer", 1228 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0), 1229 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer", 1230 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0), 1231 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer", 1232 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0), 1233 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer", 1234 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0), 1235 1236 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event, 1237 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD), 1238 1239 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event, 1240 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD), 1241 1242 /* Output MIXER controls */ 1243 /* Earpiece */ 1244 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0, 1245 &twl4030_dapm_earpiece_controls[0], 1246 ARRAY_SIZE(twl4030_dapm_earpiece_controls)), 1247 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM, 1248 0, 0, NULL, 0, earpiecepga_event, 1249 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1250 /* PreDrivL/R */ 1251 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0, 1252 &twl4030_dapm_predrivel_controls[0], 1253 ARRAY_SIZE(twl4030_dapm_predrivel_controls)), 1254 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM, 1255 0, 0, NULL, 0, predrivelpga_event, 1256 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1257 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0, 1258 &twl4030_dapm_predriver_controls[0], 1259 ARRAY_SIZE(twl4030_dapm_predriver_controls)), 1260 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM, 1261 0, 0, NULL, 0, predriverpga_event, 1262 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1263 /* HeadsetL/R */ 1264 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0, 1265 &twl4030_dapm_hsol_controls[0], 1266 ARRAY_SIZE(twl4030_dapm_hsol_controls)), 1267 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM, 1268 0, 0, NULL, 0, headsetlpga_event, 1269 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1270 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0, 1271 &twl4030_dapm_hsor_controls[0], 1272 ARRAY_SIZE(twl4030_dapm_hsor_controls)), 1273 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM, 1274 0, 0, NULL, 0, headsetrpga_event, 1275 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1276 /* CarkitL/R */ 1277 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0, 1278 &twl4030_dapm_carkitl_controls[0], 1279 ARRAY_SIZE(twl4030_dapm_carkitl_controls)), 1280 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM, 1281 0, 0, NULL, 0, carkitlpga_event, 1282 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1283 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0, 1284 &twl4030_dapm_carkitr_controls[0], 1285 ARRAY_SIZE(twl4030_dapm_carkitr_controls)), 1286 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM, 1287 0, 0, NULL, 0, carkitrpga_event, 1288 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1289 1290 /* Output MUX controls */ 1291 /* HandsfreeL/R */ 1292 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0, 1293 &twl4030_dapm_handsfreel_control), 1294 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0, 1295 &twl4030_dapm_handsfreelmute_control), 1296 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM, 1297 0, 0, NULL, 0, handsfreelpga_event, 1298 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1299 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0, 1300 &twl4030_dapm_handsfreer_control), 1301 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0, 1302 &twl4030_dapm_handsfreermute_control), 1303 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM, 1304 0, 0, NULL, 0, handsfreerpga_event, 1305 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD), 1306 /* Vibra */ 1307 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0, 1308 &twl4030_dapm_vibra_control, vibramux_event, 1309 SND_SOC_DAPM_PRE_PMU), 1310 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0, 1311 &twl4030_dapm_vibrapath_control), 1312 1313 /* Introducing four virtual ADC, since TWL4030 have four channel for 1314 capture */ 1315 SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0), 1316 SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0), 1317 SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0), 1318 SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0), 1319 1320 SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0, 1321 TWL4030_REG_VOICE_IF, 5, 0), 1322 1323 /* Analog/Digital mic path selection. 1324 TX1 Left/Right: either analog Left/Right or Digimic0 1325 TX2 Left/Right: either analog Left/Right or Digimic1 */ 1326 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0, 1327 &twl4030_dapm_micpathtx1_control), 1328 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0, 1329 &twl4030_dapm_micpathtx2_control), 1330 1331 /* Analog input mixers for the capture amplifiers */ 1332 SND_SOC_DAPM_MIXER("Analog Left", 1333 TWL4030_REG_ANAMICL, 4, 0, 1334 &twl4030_dapm_analoglmic_controls[0], 1335 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)), 1336 SND_SOC_DAPM_MIXER("Analog Right", 1337 TWL4030_REG_ANAMICR, 4, 0, 1338 &twl4030_dapm_analogrmic_controls[0], 1339 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)), 1340 1341 SND_SOC_DAPM_PGA("ADC Physical Left", 1342 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0), 1343 SND_SOC_DAPM_PGA("ADC Physical Right", 1344 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0), 1345 1346 SND_SOC_DAPM_PGA_E("Digimic0 Enable", 1347 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0, 1348 digimic_event, SND_SOC_DAPM_POST_PMU), 1349 SND_SOC_DAPM_PGA_E("Digimic1 Enable", 1350 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0, 1351 digimic_event, SND_SOC_DAPM_POST_PMU), 1352 1353 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0, 1354 NULL, 0), 1355 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0, 1356 NULL, 0), 1357 1358 /* Microphone bias */ 1359 SND_SOC_DAPM_SUPPLY("Mic Bias 1", 1360 TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0), 1361 SND_SOC_DAPM_SUPPLY("Mic Bias 2", 1362 TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0), 1363 SND_SOC_DAPM_SUPPLY("Headset Mic Bias", 1364 TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0), 1365 1366 SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0), 1367}; 1368 1369static const struct snd_soc_dapm_route intercon[] = { 1370 /* Stream -> DAC mapping */ 1371 {"DAC Right1", NULL, "HiFi Playback"}, 1372 {"DAC Left1", NULL, "HiFi Playback"}, 1373 {"DAC Right2", NULL, "HiFi Playback"}, 1374 {"DAC Left2", NULL, "HiFi Playback"}, 1375 {"DAC Voice", NULL, "VAIFIN"}, 1376 1377 /* ADC -> Stream mapping */ 1378 {"HiFi Capture", NULL, "ADC Virtual Left1"}, 1379 {"HiFi Capture", NULL, "ADC Virtual Right1"}, 1380 {"HiFi Capture", NULL, "ADC Virtual Left2"}, 1381 {"HiFi Capture", NULL, "ADC Virtual Right2"}, 1382 {"VAIFOUT", NULL, "ADC Virtual Left2"}, 1383 {"VAIFOUT", NULL, "ADC Virtual Right2"}, 1384 {"VAIFOUT", NULL, "VIF Enable"}, 1385 1386 {"Digital L1 Playback Mixer", NULL, "DAC Left1"}, 1387 {"Digital R1 Playback Mixer", NULL, "DAC Right1"}, 1388 {"Digital L2 Playback Mixer", NULL, "DAC Left2"}, 1389 {"Digital R2 Playback Mixer", NULL, "DAC Right2"}, 1390 {"Digital Voice Playback Mixer", NULL, "DAC Voice"}, 1391 1392 /* Supply for the digital part (APLL) */ 1393 {"Digital Voice Playback Mixer", NULL, "APLL Enable"}, 1394 1395 {"DAC Left1", NULL, "AIF Enable"}, 1396 {"DAC Right1", NULL, "AIF Enable"}, 1397 {"DAC Left2", NULL, "AIF Enable"}, 1398 {"DAC Right1", NULL, "AIF Enable"}, 1399 {"DAC Voice", NULL, "VIF Enable"}, 1400 1401 {"Digital R2 Playback Mixer", NULL, "AIF Enable"}, 1402 {"Digital L2 Playback Mixer", NULL, "AIF Enable"}, 1403 1404 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"}, 1405 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"}, 1406 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"}, 1407 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"}, 1408 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"}, 1409 1410 /* Internal playback routings */ 1411 /* Earpiece */ 1412 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"}, 1413 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1414 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1415 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1416 {"Earpiece PGA", NULL, "Earpiece Mixer"}, 1417 /* PreDrivL */ 1418 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"}, 1419 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1420 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1421 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1422 {"PredriveL PGA", NULL, "PredriveL Mixer"}, 1423 /* PreDrivR */ 1424 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"}, 1425 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1426 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1427 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1428 {"PredriveR PGA", NULL, "PredriveR Mixer"}, 1429 /* HeadsetL */ 1430 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"}, 1431 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1432 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1433 {"HeadsetL PGA", NULL, "HeadsetL Mixer"}, 1434 /* HeadsetR */ 1435 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"}, 1436 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1437 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1438 {"HeadsetR PGA", NULL, "HeadsetR Mixer"}, 1439 /* CarkitL */ 1440 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"}, 1441 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"}, 1442 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"}, 1443 {"CarkitL PGA", NULL, "CarkitL Mixer"}, 1444 /* CarkitR */ 1445 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"}, 1446 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"}, 1447 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"}, 1448 {"CarkitR PGA", NULL, "CarkitR Mixer"}, 1449 /* HandsfreeL */ 1450 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"}, 1451 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"}, 1452 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"}, 1453 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"}, 1454 {"HandsfreeL", "Switch", "HandsfreeL Mux"}, 1455 {"HandsfreeL PGA", NULL, "HandsfreeL"}, 1456 /* HandsfreeR */ 1457 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"}, 1458 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"}, 1459 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"}, 1460 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"}, 1461 {"HandsfreeR", "Switch", "HandsfreeR Mux"}, 1462 {"HandsfreeR PGA", NULL, "HandsfreeR"}, 1463 /* Vibra */ 1464 {"Vibra Mux", "AudioL1", "DAC Left1"}, 1465 {"Vibra Mux", "AudioR1", "DAC Right1"}, 1466 {"Vibra Mux", "AudioL2", "DAC Left2"}, 1467 {"Vibra Mux", "AudioR2", "DAC Right2"}, 1468 1469 /* outputs */ 1470 /* Must be always connected (for AIF and APLL) */ 1471 {"Virtual HiFi OUT", NULL, "DAC Left1"}, 1472 {"Virtual HiFi OUT", NULL, "DAC Right1"}, 1473 {"Virtual HiFi OUT", NULL, "DAC Left2"}, 1474 {"Virtual HiFi OUT", NULL, "DAC Right2"}, 1475 /* Must be always connected (for APLL) */ 1476 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"}, 1477 /* Physical outputs */ 1478 {"EARPIECE", NULL, "Earpiece PGA"}, 1479 {"PREDRIVEL", NULL, "PredriveL PGA"}, 1480 {"PREDRIVER", NULL, "PredriveR PGA"}, 1481 {"HSOL", NULL, "HeadsetL PGA"}, 1482 {"HSOR", NULL, "HeadsetR PGA"}, 1483 {"CARKITL", NULL, "CarkitL PGA"}, 1484 {"CARKITR", NULL, "CarkitR PGA"}, 1485 {"HFL", NULL, "HandsfreeL PGA"}, 1486 {"HFR", NULL, "HandsfreeR PGA"}, 1487 {"Vibra Route", "Audio", "Vibra Mux"}, 1488 {"VIBRA", NULL, "Vibra Route"}, 1489 1490 /* Capture path */ 1491 /* Must be always connected (for AIF and APLL) */ 1492 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"}, 1493 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"}, 1494 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"}, 1495 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"}, 1496 /* Physical inputs */ 1497 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"}, 1498 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"}, 1499 {"Analog Left", "AUXL Capture Switch", "AUXL"}, 1500 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"}, 1501 1502 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"}, 1503 {"Analog Right", "AUXR Capture Switch", "AUXR"}, 1504 1505 {"ADC Physical Left", NULL, "Analog Left"}, 1506 {"ADC Physical Right", NULL, "Analog Right"}, 1507 1508 {"Digimic0 Enable", NULL, "DIGIMIC0"}, 1509 {"Digimic1 Enable", NULL, "DIGIMIC1"}, 1510 1511 {"DIGIMIC0", NULL, "micbias1 select"}, 1512 {"DIGIMIC1", NULL, "micbias2 select"}, 1513 1514 /* TX1 Left capture path */ 1515 {"TX1 Capture Route", "Analog", "ADC Physical Left"}, 1516 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"}, 1517 /* TX1 Right capture path */ 1518 {"TX1 Capture Route", "Analog", "ADC Physical Right"}, 1519 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"}, 1520 /* TX2 Left capture path */ 1521 {"TX2 Capture Route", "Analog", "ADC Physical Left"}, 1522 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"}, 1523 /* TX2 Right capture path */ 1524 {"TX2 Capture Route", "Analog", "ADC Physical Right"}, 1525 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"}, 1526 1527 {"ADC Virtual Left1", NULL, "TX1 Capture Route"}, 1528 {"ADC Virtual Right1", NULL, "TX1 Capture Route"}, 1529 {"ADC Virtual Left2", NULL, "TX2 Capture Route"}, 1530 {"ADC Virtual Right2", NULL, "TX2 Capture Route"}, 1531 1532 {"ADC Virtual Left1", NULL, "AIF Enable"}, 1533 {"ADC Virtual Right1", NULL, "AIF Enable"}, 1534 {"ADC Virtual Left2", NULL, "AIF Enable"}, 1535 {"ADC Virtual Right2", NULL, "AIF Enable"}, 1536 1537 /* Analog bypass routes */ 1538 {"Right1 Analog Loopback", "Switch", "Analog Right"}, 1539 {"Left1 Analog Loopback", "Switch", "Analog Left"}, 1540 {"Right2 Analog Loopback", "Switch", "Analog Right"}, 1541 {"Left2 Analog Loopback", "Switch", "Analog Left"}, 1542 {"Voice Analog Loopback", "Switch", "Analog Left"}, 1543 1544 /* Supply for the Analog loopbacks */ 1545 {"Right1 Analog Loopback", NULL, "FM Loop Enable"}, 1546 {"Left1 Analog Loopback", NULL, "FM Loop Enable"}, 1547 {"Right2 Analog Loopback", NULL, "FM Loop Enable"}, 1548 {"Left2 Analog Loopback", NULL, "FM Loop Enable"}, 1549 {"Voice Analog Loopback", NULL, "FM Loop Enable"}, 1550 1551 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"}, 1552 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"}, 1553 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"}, 1554 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"}, 1555 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"}, 1556 1557 /* Digital bypass routes */ 1558 {"Right Digital Loopback", "Volume", "TX1 Capture Route"}, 1559 {"Left Digital Loopback", "Volume", "TX1 Capture Route"}, 1560 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"}, 1561 1562 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"}, 1563 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"}, 1564 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"}, 1565 1566}; 1567 1568static int twl4030_set_bias_level(struct snd_soc_component *component, 1569 enum snd_soc_bias_level level) 1570{ 1571 switch (level) { 1572 case SND_SOC_BIAS_ON: 1573 break; 1574 case SND_SOC_BIAS_PREPARE: 1575 break; 1576 case SND_SOC_BIAS_STANDBY: 1577 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) 1578 twl4030_codec_enable(component, 1); 1579 break; 1580 case SND_SOC_BIAS_OFF: 1581 twl4030_codec_enable(component, 0); 1582 break; 1583 } 1584 1585 return 0; 1586} 1587 1588static void twl4030_constraints(struct twl4030_priv *twl4030, 1589 struct snd_pcm_substream *mst_substream) 1590{ 1591 struct snd_pcm_substream *slv_substream; 1592 1593 /* Pick the stream, which need to be constrained */ 1594 if (mst_substream == twl4030->master_substream) 1595 slv_substream = twl4030->slave_substream; 1596 else if (mst_substream == twl4030->slave_substream) 1597 slv_substream = twl4030->master_substream; 1598 else /* This should not happen.. */ 1599 return; 1600 1601 /* Set the constraints according to the already configured stream */ 1602 snd_pcm_hw_constraint_single(slv_substream->runtime, 1603 SNDRV_PCM_HW_PARAM_RATE, 1604 twl4030->rate); 1605 1606 snd_pcm_hw_constraint_single(slv_substream->runtime, 1607 SNDRV_PCM_HW_PARAM_SAMPLE_BITS, 1608 twl4030->sample_bits); 1609 1610 snd_pcm_hw_constraint_single(slv_substream->runtime, 1611 SNDRV_PCM_HW_PARAM_CHANNELS, 1612 twl4030->channels); 1613} 1614 1615/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for 1616 * capture has to be enabled/disabled. */ 1617static void twl4030_tdm_enable(struct snd_soc_component *component, int direction, 1618 int enable) 1619{ 1620 u8 reg, mask; 1621 1622 reg = twl4030_read(component, TWL4030_REG_OPTION); 1623 1624 if (direction == SNDRV_PCM_STREAM_PLAYBACK) 1625 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN; 1626 else 1627 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN; 1628 1629 if (enable) 1630 reg |= mask; 1631 else 1632 reg &= ~mask; 1633 1634 twl4030_write(component, TWL4030_REG_OPTION, reg); 1635} 1636 1637static int twl4030_startup(struct snd_pcm_substream *substream, 1638 struct snd_soc_dai *dai) 1639{ 1640 struct snd_soc_component *component = dai->component; 1641 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 1642 1643 if (twl4030->master_substream) { 1644 twl4030->slave_substream = substream; 1645 /* The DAI has one configuration for playback and capture, so 1646 * if the DAI has been already configured then constrain this 1647 * substream to match it. */ 1648 if (twl4030->configured) 1649 twl4030_constraints(twl4030, twl4030->master_substream); 1650 } else { 1651 if (!(twl4030_read(component, TWL4030_REG_CODEC_MODE) & 1652 TWL4030_OPTION_1)) { 1653 /* In option2 4 channel is not supported, set the 1654 * constraint for the first stream for channels, the 1655 * second stream will 'inherit' this cosntraint */ 1656 snd_pcm_hw_constraint_single(substream->runtime, 1657 SNDRV_PCM_HW_PARAM_CHANNELS, 1658 2); 1659 } 1660 twl4030->master_substream = substream; 1661 } 1662 1663 return 0; 1664} 1665 1666static void twl4030_shutdown(struct snd_pcm_substream *substream, 1667 struct snd_soc_dai *dai) 1668{ 1669 struct snd_soc_component *component = dai->component; 1670 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 1671 1672 if (twl4030->master_substream == substream) 1673 twl4030->master_substream = twl4030->slave_substream; 1674 1675 twl4030->slave_substream = NULL; 1676 1677 /* If all streams are closed, or the remaining stream has not yet 1678 * been configured than set the DAI as not configured. */ 1679 if (!twl4030->master_substream) 1680 twl4030->configured = 0; 1681 else if (!twl4030->master_substream->runtime->channels) 1682 twl4030->configured = 0; 1683 1684 /* If the closing substream had 4 channel, do the necessary cleanup */ 1685 if (substream->runtime->channels == 4) 1686 twl4030_tdm_enable(component, substream->stream, 0); 1687} 1688 1689static int twl4030_hw_params(struct snd_pcm_substream *substream, 1690 struct snd_pcm_hw_params *params, 1691 struct snd_soc_dai *dai) 1692{ 1693 struct snd_soc_component *component = dai->component; 1694 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 1695 u8 mode, old_mode, format, old_format; 1696 1697 /* If the substream has 4 channel, do the necessary setup */ 1698 if (params_channels(params) == 4) { 1699 format = twl4030_read(component, TWL4030_REG_AUDIO_IF); 1700 mode = twl4030_read(component, TWL4030_REG_CODEC_MODE); 1701 1702 /* Safety check: are we in the correct operating mode and 1703 * the interface is in TDM mode? */ 1704 if ((mode & TWL4030_OPTION_1) && 1705 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM)) 1706 twl4030_tdm_enable(component, substream->stream, 1); 1707 else 1708 return -EINVAL; 1709 } 1710 1711 if (twl4030->configured) 1712 /* Ignoring hw_params for already configured DAI */ 1713 return 0; 1714 1715 /* bit rate */ 1716 old_mode = twl4030_read(component, 1717 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; 1718 mode = old_mode & ~TWL4030_APLL_RATE; 1719 1720 switch (params_rate(params)) { 1721 case 8000: 1722 mode |= TWL4030_APLL_RATE_8000; 1723 break; 1724 case 11025: 1725 mode |= TWL4030_APLL_RATE_11025; 1726 break; 1727 case 12000: 1728 mode |= TWL4030_APLL_RATE_12000; 1729 break; 1730 case 16000: 1731 mode |= TWL4030_APLL_RATE_16000; 1732 break; 1733 case 22050: 1734 mode |= TWL4030_APLL_RATE_22050; 1735 break; 1736 case 24000: 1737 mode |= TWL4030_APLL_RATE_24000; 1738 break; 1739 case 32000: 1740 mode |= TWL4030_APLL_RATE_32000; 1741 break; 1742 case 44100: 1743 mode |= TWL4030_APLL_RATE_44100; 1744 break; 1745 case 48000: 1746 mode |= TWL4030_APLL_RATE_48000; 1747 break; 1748 case 96000: 1749 mode |= TWL4030_APLL_RATE_96000; 1750 break; 1751 default: 1752 dev_err(component->dev, "%s: unknown rate %d\n", __func__, 1753 params_rate(params)); 1754 return -EINVAL; 1755 } 1756 1757 /* sample size */ 1758 old_format = twl4030_read(component, TWL4030_REG_AUDIO_IF); 1759 format = old_format; 1760 format &= ~TWL4030_DATA_WIDTH; 1761 switch (params_width(params)) { 1762 case 16: 1763 format |= TWL4030_DATA_WIDTH_16S_16W; 1764 break; 1765 case 32: 1766 format |= TWL4030_DATA_WIDTH_32S_24W; 1767 break; 1768 default: 1769 dev_err(component->dev, "%s: unsupported bits/sample %d\n", 1770 __func__, params_width(params)); 1771 return -EINVAL; 1772 } 1773 1774 if (format != old_format || mode != old_mode) { 1775 if (twl4030->codec_powered) { 1776 /* 1777 * If the codec is powered, than we need to toggle the 1778 * codec power. 1779 */ 1780 twl4030_codec_enable(component, 0); 1781 twl4030_write(component, TWL4030_REG_CODEC_MODE, mode); 1782 twl4030_write(component, TWL4030_REG_AUDIO_IF, format); 1783 twl4030_codec_enable(component, 1); 1784 } else { 1785 twl4030_write(component, TWL4030_REG_CODEC_MODE, mode); 1786 twl4030_write(component, TWL4030_REG_AUDIO_IF, format); 1787 } 1788 } 1789 1790 /* Store the important parameters for the DAI configuration and set 1791 * the DAI as configured */ 1792 twl4030->configured = 1; 1793 twl4030->rate = params_rate(params); 1794 twl4030->sample_bits = hw_param_interval(params, 1795 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min; 1796 twl4030->channels = params_channels(params); 1797 1798 /* If both playback and capture streams are open, and one of them 1799 * is setting the hw parameters right now (since we are here), set 1800 * constraints to the other stream to match the current one. */ 1801 if (twl4030->slave_substream) 1802 twl4030_constraints(twl4030, substream); 1803 1804 return 0; 1805} 1806 1807static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id, 1808 unsigned int freq, int dir) 1809{ 1810 struct snd_soc_component *component = codec_dai->component; 1811 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 1812 1813 switch (freq) { 1814 case 19200000: 1815 case 26000000: 1816 case 38400000: 1817 break; 1818 default: 1819 dev_err(component->dev, "Unsupported HFCLKIN: %u\n", freq); 1820 return -EINVAL; 1821 } 1822 1823 if ((freq / 1000) != twl4030->sysclk) { 1824 dev_err(component->dev, 1825 "Mismatch in HFCLKIN: %u (configured: %u)\n", 1826 freq, twl4030->sysclk * 1000); 1827 return -EINVAL; 1828 } 1829 1830 return 0; 1831} 1832 1833static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) 1834{ 1835 struct snd_soc_component *component = codec_dai->component; 1836 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 1837 u8 old_format, format; 1838 1839 /* get format */ 1840 old_format = twl4030_read(component, TWL4030_REG_AUDIO_IF); 1841 format = old_format; 1842 1843 /* set master/slave audio interface */ 1844 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1845 case SND_SOC_DAIFMT_CBM_CFM: 1846 format &= ~(TWL4030_AIF_SLAVE_EN); 1847 format &= ~(TWL4030_CLK256FS_EN); 1848 break; 1849 case SND_SOC_DAIFMT_CBS_CFS: 1850 format |= TWL4030_AIF_SLAVE_EN; 1851 format |= TWL4030_CLK256FS_EN; 1852 break; 1853 default: 1854 return -EINVAL; 1855 } 1856 1857 /* interface format */ 1858 format &= ~TWL4030_AIF_FORMAT; 1859 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1860 case SND_SOC_DAIFMT_I2S: 1861 format |= TWL4030_AIF_FORMAT_CODEC; 1862 break; 1863 case SND_SOC_DAIFMT_DSP_A: 1864 format |= TWL4030_AIF_FORMAT_TDM; 1865 break; 1866 default: 1867 return -EINVAL; 1868 } 1869 1870 if (format != old_format) { 1871 if (twl4030->codec_powered) { 1872 /* 1873 * If the codec is powered, than we need to toggle the 1874 * codec power. 1875 */ 1876 twl4030_codec_enable(component, 0); 1877 twl4030_write(component, TWL4030_REG_AUDIO_IF, format); 1878 twl4030_codec_enable(component, 1); 1879 } else { 1880 twl4030_write(component, TWL4030_REG_AUDIO_IF, format); 1881 } 1882 } 1883 1884 return 0; 1885} 1886 1887static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate) 1888{ 1889 struct snd_soc_component *component = dai->component; 1890 u8 reg = twl4030_read(component, TWL4030_REG_AUDIO_IF); 1891 1892 if (tristate) 1893 reg |= TWL4030_AIF_TRI_EN; 1894 else 1895 reg &= ~TWL4030_AIF_TRI_EN; 1896 1897 return twl4030_write(component, TWL4030_REG_AUDIO_IF, reg); 1898} 1899 1900/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R 1901 * (VTXL, VTXR) for uplink has to be enabled/disabled. */ 1902static void twl4030_voice_enable(struct snd_soc_component *component, int direction, 1903 int enable) 1904{ 1905 u8 reg, mask; 1906 1907 reg = twl4030_read(component, TWL4030_REG_OPTION); 1908 1909 if (direction == SNDRV_PCM_STREAM_PLAYBACK) 1910 mask = TWL4030_ARXL1_VRX_EN; 1911 else 1912 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN; 1913 1914 if (enable) 1915 reg |= mask; 1916 else 1917 reg &= ~mask; 1918 1919 twl4030_write(component, TWL4030_REG_OPTION, reg); 1920} 1921 1922static int twl4030_voice_startup(struct snd_pcm_substream *substream, 1923 struct snd_soc_dai *dai) 1924{ 1925 struct snd_soc_component *component = dai->component; 1926 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 1927 u8 mode; 1928 1929 /* If the system master clock is not 26MHz, the voice PCM interface is 1930 * not available. 1931 */ 1932 if (twl4030->sysclk != 26000) { 1933 dev_err(component->dev, 1934 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n", 1935 __func__, twl4030->sysclk); 1936 return -EINVAL; 1937 } 1938 1939 /* If the codec mode is not option2, the voice PCM interface is not 1940 * available. 1941 */ 1942 mode = twl4030_read(component, TWL4030_REG_CODEC_MODE) 1943 & TWL4030_OPT_MODE; 1944 1945 if (mode != TWL4030_OPTION_2) { 1946 dev_err(component->dev, "%s: the codec mode is not option2\n", 1947 __func__); 1948 return -EINVAL; 1949 } 1950 1951 return 0; 1952} 1953 1954static void twl4030_voice_shutdown(struct snd_pcm_substream *substream, 1955 struct snd_soc_dai *dai) 1956{ 1957 struct snd_soc_component *component = dai->component; 1958 1959 /* Enable voice digital filters */ 1960 twl4030_voice_enable(component, substream->stream, 0); 1961} 1962 1963static int twl4030_voice_hw_params(struct snd_pcm_substream *substream, 1964 struct snd_pcm_hw_params *params, 1965 struct snd_soc_dai *dai) 1966{ 1967 struct snd_soc_component *component = dai->component; 1968 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 1969 u8 old_mode, mode; 1970 1971 /* Enable voice digital filters */ 1972 twl4030_voice_enable(component, substream->stream, 1); 1973 1974 /* bit rate */ 1975 old_mode = twl4030_read(component, 1976 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ; 1977 mode = old_mode; 1978 1979 switch (params_rate(params)) { 1980 case 8000: 1981 mode &= ~(TWL4030_SEL_16K); 1982 break; 1983 case 16000: 1984 mode |= TWL4030_SEL_16K; 1985 break; 1986 default: 1987 dev_err(component->dev, "%s: unknown rate %d\n", __func__, 1988 params_rate(params)); 1989 return -EINVAL; 1990 } 1991 1992 if (mode != old_mode) { 1993 if (twl4030->codec_powered) { 1994 /* 1995 * If the codec is powered, than we need to toggle the 1996 * codec power. 1997 */ 1998 twl4030_codec_enable(component, 0); 1999 twl4030_write(component, TWL4030_REG_CODEC_MODE, mode); 2000 twl4030_codec_enable(component, 1); 2001 } else { 2002 twl4030_write(component, TWL4030_REG_CODEC_MODE, mode); 2003 } 2004 } 2005 2006 return 0; 2007} 2008 2009static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai, 2010 int clk_id, unsigned int freq, int dir) 2011{ 2012 struct snd_soc_component *component = codec_dai->component; 2013 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 2014 2015 if (freq != 26000000) { 2016 dev_err(component->dev, 2017 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n", 2018 __func__, freq / 1000); 2019 return -EINVAL; 2020 } 2021 if ((freq / 1000) != twl4030->sysclk) { 2022 dev_err(component->dev, 2023 "Mismatch in HFCLKIN: %u (configured: %u)\n", 2024 freq, twl4030->sysclk * 1000); 2025 return -EINVAL; 2026 } 2027 return 0; 2028} 2029 2030static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai, 2031 unsigned int fmt) 2032{ 2033 struct snd_soc_component *component = codec_dai->component; 2034 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 2035 u8 old_format, format; 2036 2037 /* get format */ 2038 old_format = twl4030_read(component, TWL4030_REG_VOICE_IF); 2039 format = old_format; 2040 2041 /* set master/slave audio interface */ 2042 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 2043 case SND_SOC_DAIFMT_CBM_CFM: 2044 format &= ~(TWL4030_VIF_SLAVE_EN); 2045 break; 2046 case SND_SOC_DAIFMT_CBS_CFS: 2047 format |= TWL4030_VIF_SLAVE_EN; 2048 break; 2049 default: 2050 return -EINVAL; 2051 } 2052 2053 /* clock inversion */ 2054 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 2055 case SND_SOC_DAIFMT_IB_NF: 2056 format &= ~(TWL4030_VIF_FORMAT); 2057 break; 2058 case SND_SOC_DAIFMT_NB_IF: 2059 format |= TWL4030_VIF_FORMAT; 2060 break; 2061 default: 2062 return -EINVAL; 2063 } 2064 2065 if (format != old_format) { 2066 if (twl4030->codec_powered) { 2067 /* 2068 * If the codec is powered, than we need to toggle the 2069 * codec power. 2070 */ 2071 twl4030_codec_enable(component, 0); 2072 twl4030_write(component, TWL4030_REG_VOICE_IF, format); 2073 twl4030_codec_enable(component, 1); 2074 } else { 2075 twl4030_write(component, TWL4030_REG_VOICE_IF, format); 2076 } 2077 } 2078 2079 return 0; 2080} 2081 2082static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate) 2083{ 2084 struct snd_soc_component *component = dai->component; 2085 u8 reg = twl4030_read(component, TWL4030_REG_VOICE_IF); 2086 2087 if (tristate) 2088 reg |= TWL4030_VIF_TRI_EN; 2089 else 2090 reg &= ~TWL4030_VIF_TRI_EN; 2091 2092 return twl4030_write(component, TWL4030_REG_VOICE_IF, reg); 2093} 2094 2095#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000) 2096#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) 2097 2098static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = { 2099 .startup = twl4030_startup, 2100 .shutdown = twl4030_shutdown, 2101 .hw_params = twl4030_hw_params, 2102 .set_sysclk = twl4030_set_dai_sysclk, 2103 .set_fmt = twl4030_set_dai_fmt, 2104 .set_tristate = twl4030_set_tristate, 2105}; 2106 2107static const struct snd_soc_dai_ops twl4030_dai_voice_ops = { 2108 .startup = twl4030_voice_startup, 2109 .shutdown = twl4030_voice_shutdown, 2110 .hw_params = twl4030_voice_hw_params, 2111 .set_sysclk = twl4030_voice_set_dai_sysclk, 2112 .set_fmt = twl4030_voice_set_dai_fmt, 2113 .set_tristate = twl4030_voice_set_tristate, 2114}; 2115 2116static struct snd_soc_dai_driver twl4030_dai[] = { 2117{ 2118 .name = "twl4030-hifi", 2119 .playback = { 2120 .stream_name = "HiFi Playback", 2121 .channels_min = 2, 2122 .channels_max = 4, 2123 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000, 2124 .formats = TWL4030_FORMATS, 2125 .sig_bits = 24,}, 2126 .capture = { 2127 .stream_name = "HiFi Capture", 2128 .channels_min = 2, 2129 .channels_max = 4, 2130 .rates = TWL4030_RATES, 2131 .formats = TWL4030_FORMATS, 2132 .sig_bits = 24,}, 2133 .ops = &twl4030_dai_hifi_ops, 2134}, 2135{ 2136 .name = "twl4030-voice", 2137 .playback = { 2138 .stream_name = "Voice Playback", 2139 .channels_min = 1, 2140 .channels_max = 1, 2141 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, 2142 .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 2143 .capture = { 2144 .stream_name = "Voice Capture", 2145 .channels_min = 1, 2146 .channels_max = 2, 2147 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000, 2148 .formats = SNDRV_PCM_FMTBIT_S16_LE,}, 2149 .ops = &twl4030_dai_voice_ops, 2150}, 2151}; 2152 2153static int twl4030_soc_probe(struct snd_soc_component *component) 2154{ 2155 struct twl4030_priv *twl4030; 2156 2157 twl4030 = devm_kzalloc(component->dev, sizeof(struct twl4030_priv), 2158 GFP_KERNEL); 2159 if (!twl4030) 2160 return -ENOMEM; 2161 snd_soc_component_set_drvdata(component, twl4030); 2162 /* Set the defaults, and power up the codec */ 2163 twl4030->sysclk = twl4030_audio_get_mclk() / 1000; 2164 2165 twl4030_init_chip(component); 2166 2167 return 0; 2168} 2169 2170static void twl4030_soc_remove(struct snd_soc_component *component) 2171{ 2172 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); 2173 struct twl4030_codec_data *pdata = twl4030->pdata; 2174 2175 if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio)) 2176 gpio_free(pdata->hs_extmute_gpio); 2177} 2178 2179static const struct snd_soc_component_driver soc_component_dev_twl4030 = { 2180 .probe = twl4030_soc_probe, 2181 .remove = twl4030_soc_remove, 2182 .read = twl4030_read, 2183 .write = twl4030_write, 2184 .set_bias_level = twl4030_set_bias_level, 2185 .controls = twl4030_snd_controls, 2186 .num_controls = ARRAY_SIZE(twl4030_snd_controls), 2187 .dapm_widgets = twl4030_dapm_widgets, 2188 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets), 2189 .dapm_routes = intercon, 2190 .num_dapm_routes = ARRAY_SIZE(intercon), 2191 .use_pmdown_time = 1, 2192 .endianness = 1, 2193 .non_legacy_dai_naming = 1, 2194}; 2195 2196static int twl4030_codec_probe(struct platform_device *pdev) 2197{ 2198 return devm_snd_soc_register_component(&pdev->dev, 2199 &soc_component_dev_twl4030, 2200 twl4030_dai, ARRAY_SIZE(twl4030_dai)); 2201} 2202 2203MODULE_ALIAS("platform:twl4030-codec"); 2204 2205static struct platform_driver twl4030_codec_driver = { 2206 .probe = twl4030_codec_probe, 2207 .driver = { 2208 .name = "twl4030-codec", 2209 }, 2210}; 2211 2212module_platform_driver(twl4030_codec_driver); 2213 2214MODULE_DESCRIPTION("ASoC TWL4030 codec driver"); 2215MODULE_AUTHOR("Steve Sakoman"); 2216MODULE_LICENSE("GPL"); 2217