1// SPDX-License-Identifier: GPL-2.0 2// 3// rt700-sdw.c -- rt700 ALSA SoC audio driver 4// 5// Copyright(c) 2019 Realtek Semiconductor Corp. 6// 7// 8 9#include <linux/delay.h> 10#include <linux/device.h> 11#include <linux/mod_devicetable.h> 12#include <linux/soundwire/sdw.h> 13#include <linux/soundwire/sdw_type.h> 14#include <linux/soundwire/sdw_registers.h> 15#include <linux/module.h> 16#include <linux/regmap.h> 17#include <sound/soc.h> 18#include "rt700.h" 19#include "rt700-sdw.h" 20 21static bool rt700_readable_register(struct device *dev, unsigned int reg) 22{ 23 switch (reg) { 24 case 0x00e0: 25 case 0x00f0: 26 case 0x2000 ... 0x200e: 27 case 0x2012 ... 0x2016: 28 case 0x201a ... 0x2027: 29 case 0x2029 ... 0x202a: 30 case 0x202d ... 0x2034: 31 case 0x2200 ... 0x2204: 32 case 0x2206 ... 0x2212: 33 case 0x2220 ... 0x2223: 34 case 0x2230 ... 0x2231: 35 case 0x3000 ... 0x3fff: 36 case 0x7000 ... 0x7fff: 37 case 0x8300 ... 0x83ff: 38 case 0x9c00 ... 0x9cff: 39 case 0xb900 ... 0xb9ff: 40 case 0x75201a: 41 case 0x752045: 42 case 0x752046: 43 case 0x752048: 44 case 0x75204a: 45 case 0x75206b: 46 case 0x752080: 47 case 0x752081: 48 return true; 49 default: 50 return false; 51 } 52} 53 54static bool rt700_volatile_register(struct device *dev, unsigned int reg) 55{ 56 switch (reg) { 57 case 0x2009: 58 case 0x2016: 59 case 0x201b: 60 case 0x201c: 61 case 0x201d: 62 case 0x201f: 63 case 0x2021: 64 case 0x2023: 65 case 0x2230: 66 case 0x200b ... 0x200e: /* i2c read */ 67 case 0x2012 ... 0x2015: /* HD-A read */ 68 case 0x202d ... 0x202f: /* BRA */ 69 case 0x2201 ... 0x2212: /* i2c debug */ 70 case 0x2220 ... 0x2223: /* decoded HD-A */ 71 case 0x9c00 ... 0x9cff: 72 case 0xb900 ... 0xb9ff: 73 case 0xff01: 74 case 0x75201a: 75 case 0x752046: 76 case 0x752080: 77 case 0x752081: 78 return true; 79 default: 80 return false; 81 } 82} 83 84static int rt700_sdw_read(void *context, unsigned int reg, unsigned int *val) 85{ 86 struct device *dev = context; 87 struct rt700_priv *rt700 = dev_get_drvdata(dev); 88 unsigned int sdw_data_3, sdw_data_2, sdw_data_1, sdw_data_0; 89 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; 90 unsigned int is_hda_reg = 1, is_index_reg = 0; 91 int ret; 92 93 if (reg > 0xffff) 94 is_index_reg = 1; 95 96 mask = reg & 0xf000; 97 98 if (is_index_reg) { /* index registers */ 99 val2 = reg & 0xff; 100 reg = reg >> 8; 101 nid = reg & 0xff; 102 ret = regmap_write(rt700->sdw_regmap, reg, 0); 103 if (ret < 0) 104 return ret; 105 reg2 = reg + 0x1000; 106 reg2 |= 0x80; 107 ret = regmap_write(rt700->sdw_regmap, reg2, val2); 108 if (ret < 0) 109 return ret; 110 111 reg3 = RT700_PRIV_DATA_R_H | nid; 112 ret = regmap_write(rt700->sdw_regmap, 113 reg3, ((*val >> 8) & 0xff)); 114 if (ret < 0) 115 return ret; 116 reg4 = reg3 + 0x1000; 117 reg4 |= 0x80; 118 ret = regmap_write(rt700->sdw_regmap, reg4, (*val & 0xff)); 119 if (ret < 0) 120 return ret; 121 } else if (mask == 0x3000) { 122 reg += 0x8000; 123 ret = regmap_write(rt700->sdw_regmap, reg, *val); 124 if (ret < 0) 125 return ret; 126 } else if (mask == 0x7000) { 127 reg += 0x2000; 128 reg |= 0x800; 129 ret = regmap_write(rt700->sdw_regmap, 130 reg, ((*val >> 8) & 0xff)); 131 if (ret < 0) 132 return ret; 133 reg2 = reg + 0x1000; 134 reg2 |= 0x80; 135 ret = regmap_write(rt700->sdw_regmap, reg2, (*val & 0xff)); 136 if (ret < 0) 137 return ret; 138 } else if ((reg & 0xff00) == 0x8300) { /* for R channel */ 139 reg2 = reg - 0x1000; 140 reg2 &= ~0x80; 141 ret = regmap_write(rt700->sdw_regmap, 142 reg2, ((*val >> 8) & 0xff)); 143 if (ret < 0) 144 return ret; 145 ret = regmap_write(rt700->sdw_regmap, reg, (*val & 0xff)); 146 if (ret < 0) 147 return ret; 148 } else if (mask == 0x9000) { 149 ret = regmap_write(rt700->sdw_regmap, 150 reg, ((*val >> 8) & 0xff)); 151 if (ret < 0) 152 return ret; 153 reg2 = reg + 0x1000; 154 reg2 |= 0x80; 155 ret = regmap_write(rt700->sdw_regmap, reg2, (*val & 0xff)); 156 if (ret < 0) 157 return ret; 158 } else if (mask == 0xb000) { 159 ret = regmap_write(rt700->sdw_regmap, reg, *val); 160 if (ret < 0) 161 return ret; 162 } else { 163 ret = regmap_read(rt700->sdw_regmap, reg, val); 164 if (ret < 0) 165 return ret; 166 is_hda_reg = 0; 167 } 168 169 if (is_hda_reg || is_index_reg) { 170 sdw_data_3 = 0; 171 sdw_data_2 = 0; 172 sdw_data_1 = 0; 173 sdw_data_0 = 0; 174 ret = regmap_read(rt700->sdw_regmap, 175 RT700_READ_HDA_3, &sdw_data_3); 176 if (ret < 0) 177 return ret; 178 ret = regmap_read(rt700->sdw_regmap, 179 RT700_READ_HDA_2, &sdw_data_2); 180 if (ret < 0) 181 return ret; 182 ret = regmap_read(rt700->sdw_regmap, 183 RT700_READ_HDA_1, &sdw_data_1); 184 if (ret < 0) 185 return ret; 186 ret = regmap_read(rt700->sdw_regmap, 187 RT700_READ_HDA_0, &sdw_data_0); 188 if (ret < 0) 189 return ret; 190 *val = ((sdw_data_3 & 0xff) << 24) | 191 ((sdw_data_2 & 0xff) << 16) | 192 ((sdw_data_1 & 0xff) << 8) | (sdw_data_0 & 0xff); 193 } 194 195 if (is_hda_reg == 0) 196 dev_dbg(dev, "[%s] %04x => %08x\n", __func__, reg, *val); 197 else if (is_index_reg) 198 dev_dbg(dev, "[%s] %04x %04x %04x %04x => %08x\n", 199 __func__, reg, reg2, reg3, reg4, *val); 200 else 201 dev_dbg(dev, "[%s] %04x %04x => %08x\n", 202 __func__, reg, reg2, *val); 203 204 return 0; 205} 206 207static int rt700_sdw_write(void *context, unsigned int reg, unsigned int val) 208{ 209 struct device *dev = context; 210 struct rt700_priv *rt700 = dev_get_drvdata(dev); 211 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2; 212 unsigned int is_index_reg = 0; 213 int ret; 214 215 if (reg > 0xffff) 216 is_index_reg = 1; 217 218 mask = reg & 0xf000; 219 220 if (is_index_reg) { /* index registers */ 221 val2 = reg & 0xff; 222 reg = reg >> 8; 223 nid = reg & 0xff; 224 ret = regmap_write(rt700->sdw_regmap, reg, 0); 225 if (ret < 0) 226 return ret; 227 reg2 = reg + 0x1000; 228 reg2 |= 0x80; 229 ret = regmap_write(rt700->sdw_regmap, reg2, val2); 230 if (ret < 0) 231 return ret; 232 233 reg3 = RT700_PRIV_DATA_W_H | nid; 234 ret = regmap_write(rt700->sdw_regmap, 235 reg3, ((val >> 8) & 0xff)); 236 if (ret < 0) 237 return ret; 238 reg4 = reg3 + 0x1000; 239 reg4 |= 0x80; 240 ret = regmap_write(rt700->sdw_regmap, reg4, (val & 0xff)); 241 if (ret < 0) 242 return ret; 243 is_index_reg = 1; 244 } else if (reg < 0x4fff) { 245 ret = regmap_write(rt700->sdw_regmap, reg, val); 246 if (ret < 0) 247 return ret; 248 } else if (reg == 0xff01) { 249 ret = regmap_write(rt700->sdw_regmap, reg, val); 250 if (ret < 0) 251 return ret; 252 } else if (mask == 0x7000) { 253 ret = regmap_write(rt700->sdw_regmap, 254 reg, ((val >> 8) & 0xff)); 255 if (ret < 0) 256 return ret; 257 reg2 = reg + 0x1000; 258 reg2 |= 0x80; 259 ret = regmap_write(rt700->sdw_regmap, reg2, (val & 0xff)); 260 if (ret < 0) 261 return ret; 262 } else if ((reg & 0xff00) == 0x8300) { /* for R channel */ 263 reg2 = reg - 0x1000; 264 reg2 &= ~0x80; 265 ret = regmap_write(rt700->sdw_regmap, 266 reg2, ((val >> 8) & 0xff)); 267 if (ret < 0) 268 return ret; 269 ret = regmap_write(rt700->sdw_regmap, reg, (val & 0xff)); 270 if (ret < 0) 271 return ret; 272 } 273 274 if (reg2 == 0) 275 dev_dbg(dev, "[%s] %04x <= %04x\n", __func__, reg, val); 276 else if (is_index_reg) 277 dev_dbg(dev, "[%s] %04x %04x %04x %04x <= %04x %04x\n", 278 __func__, reg, reg2, reg3, reg4, val2, val); 279 else 280 dev_dbg(dev, "[%s] %04x %04x <= %04x\n", 281 __func__, reg, reg2, val); 282 283 return 0; 284} 285 286static const struct regmap_config rt700_regmap = { 287 .reg_bits = 24, 288 .val_bits = 32, 289 .readable_reg = rt700_readable_register, 290 .volatile_reg = rt700_volatile_register, 291 .max_register = 0x755800, 292 .reg_defaults = rt700_reg_defaults, 293 .num_reg_defaults = ARRAY_SIZE(rt700_reg_defaults), 294 .cache_type = REGCACHE_RBTREE, 295 .use_single_read = true, 296 .use_single_write = true, 297 .reg_read = rt700_sdw_read, 298 .reg_write = rt700_sdw_write, 299}; 300 301static const struct regmap_config rt700_sdw_regmap = { 302 .name = "sdw", 303 .reg_bits = 32, 304 .val_bits = 8, 305 .readable_reg = rt700_readable_register, 306 .max_register = 0xff01, 307 .cache_type = REGCACHE_NONE, 308 .use_single_read = true, 309 .use_single_write = true, 310}; 311 312static int rt700_update_status(struct sdw_slave *slave, 313 enum sdw_slave_status status) 314{ 315 struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev); 316 317 /* Update the status */ 318 rt700->status = status; 319 320 if (status == SDW_SLAVE_UNATTACHED) 321 rt700->hw_init = false; 322 323 /* 324 * Perform initialization only if slave status is present and 325 * hw_init flag is false 326 */ 327 if (rt700->hw_init || rt700->status != SDW_SLAVE_ATTACHED) 328 return 0; 329 330 /* perform I/O transfers required for Slave initialization */ 331 return rt700_io_init(&slave->dev, slave); 332} 333 334static int rt700_read_prop(struct sdw_slave *slave) 335{ 336 struct sdw_slave_prop *prop = &slave->prop; 337 int nval, i; 338 u32 bit; 339 unsigned long addr; 340 struct sdw_dpn_prop *dpn; 341 342 prop->scp_int1_mask = SDW_SCP_INT1_IMPL_DEF | SDW_SCP_INT1_BUS_CLASH | 343 SDW_SCP_INT1_PARITY; 344 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY; 345 346 prop->paging_support = false; 347 348 /* first we need to allocate memory for set bits in port lists */ 349 prop->source_ports = 0x14; /* BITMAP: 00010100 */ 350 prop->sink_ports = 0xA; /* BITMAP: 00001010 */ 351 352 nval = hweight32(prop->source_ports); 353 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval, 354 sizeof(*prop->src_dpn_prop), 355 GFP_KERNEL); 356 if (!prop->src_dpn_prop) 357 return -ENOMEM; 358 359 i = 0; 360 dpn = prop->src_dpn_prop; 361 addr = prop->source_ports; 362 for_each_set_bit(bit, &addr, 32) { 363 dpn[i].num = bit; 364 dpn[i].type = SDW_DPN_FULL; 365 dpn[i].simple_ch_prep_sm = true; 366 dpn[i].ch_prep_timeout = 10; 367 i++; 368 } 369 370 /* do this again for sink now */ 371 nval = hweight32(prop->sink_ports); 372 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval, 373 sizeof(*prop->sink_dpn_prop), 374 GFP_KERNEL); 375 if (!prop->sink_dpn_prop) 376 return -ENOMEM; 377 378 i = 0; 379 dpn = prop->sink_dpn_prop; 380 addr = prop->sink_ports; 381 for_each_set_bit(bit, &addr, 32) { 382 dpn[i].num = bit; 383 dpn[i].type = SDW_DPN_FULL; 384 dpn[i].simple_ch_prep_sm = true; 385 dpn[i].ch_prep_timeout = 10; 386 i++; 387 } 388 389 /* set the timeout values */ 390 prop->clk_stop_timeout = 20; 391 392 /* wake-up event */ 393 prop->wake_capable = 1; 394 395 return 0; 396} 397 398static int rt700_bus_config(struct sdw_slave *slave, 399 struct sdw_bus_params *params) 400{ 401 struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev); 402 int ret; 403 404 memcpy(&rt700->params, params, sizeof(*params)); 405 406 ret = rt700_clock_config(&slave->dev); 407 if (ret < 0) 408 dev_err(&slave->dev, "Invalid clk config"); 409 410 return ret; 411} 412 413static int rt700_interrupt_callback(struct sdw_slave *slave, 414 struct sdw_slave_intr_status *status) 415{ 416 struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev); 417 418 dev_dbg(&slave->dev, 419 "%s control_port_stat=%x", __func__, status->control_port); 420 421 if (status->control_port & 0x4) { 422 mod_delayed_work(system_power_efficient_wq, 423 &rt700->jack_detect_work, msecs_to_jiffies(250)); 424 } 425 426 return 0; 427} 428 429/* 430 * slave_ops: callbacks for get_clock_stop_mode, clock_stop and 431 * port_prep are not defined for now 432 */ 433static struct sdw_slave_ops rt700_slave_ops = { 434 .read_prop = rt700_read_prop, 435 .interrupt_callback = rt700_interrupt_callback, 436 .update_status = rt700_update_status, 437 .bus_config = rt700_bus_config, 438}; 439 440static int rt700_sdw_probe(struct sdw_slave *slave, 441 const struct sdw_device_id *id) 442{ 443 struct regmap *sdw_regmap, *regmap; 444 445 /* Regmap Initialization */ 446 sdw_regmap = devm_regmap_init_sdw(slave, &rt700_sdw_regmap); 447 if (IS_ERR(sdw_regmap)) 448 return PTR_ERR(sdw_regmap); 449 450 regmap = devm_regmap_init(&slave->dev, NULL, 451 &slave->dev, &rt700_regmap); 452 if (IS_ERR(regmap)) 453 return PTR_ERR(regmap); 454 455 rt700_init(&slave->dev, sdw_regmap, regmap, slave); 456 457 return 0; 458} 459 460static int rt700_sdw_remove(struct sdw_slave *slave) 461{ 462 struct rt700_priv *rt700 = dev_get_drvdata(&slave->dev); 463 464 if (rt700 && rt700->hw_init) { 465 cancel_delayed_work(&rt700->jack_detect_work); 466 cancel_delayed_work(&rt700->jack_btn_check_work); 467 } 468 469 return 0; 470} 471 472static const struct sdw_device_id rt700_id[] = { 473 SDW_SLAVE_ENTRY_EXT(0x025d, 0x700, 0x1, 0, 0), 474 {}, 475}; 476MODULE_DEVICE_TABLE(sdw, rt700_id); 477 478static int __maybe_unused rt700_dev_suspend(struct device *dev) 479{ 480 struct rt700_priv *rt700 = dev_get_drvdata(dev); 481 482 if (!rt700->hw_init) 483 return 0; 484 485 cancel_delayed_work_sync(&rt700->jack_detect_work); 486 cancel_delayed_work_sync(&rt700->jack_btn_check_work); 487 488 regcache_cache_only(rt700->regmap, true); 489 490 return 0; 491} 492 493#define RT700_PROBE_TIMEOUT 2000 494 495static int __maybe_unused rt700_dev_resume(struct device *dev) 496{ 497 struct sdw_slave *slave = dev_to_sdw_dev(dev); 498 struct rt700_priv *rt700 = dev_get_drvdata(dev); 499 unsigned long time; 500 501 if (!rt700->first_hw_init) 502 return 0; 503 504 if (!slave->unattach_request) 505 goto regmap_sync; 506 507 time = wait_for_completion_timeout(&slave->initialization_complete, 508 msecs_to_jiffies(RT700_PROBE_TIMEOUT)); 509 if (!time) { 510 dev_err(&slave->dev, "Initialization not complete, timed out\n"); 511 return -ETIMEDOUT; 512 } 513 514regmap_sync: 515 slave->unattach_request = 0; 516 regcache_cache_only(rt700->regmap, false); 517 regcache_sync_region(rt700->regmap, 0x3000, 0x8fff); 518 regcache_sync_region(rt700->regmap, 0x752010, 0x75206b); 519 520 return 0; 521} 522 523static const struct dev_pm_ops rt700_pm = { 524 SET_SYSTEM_SLEEP_PM_OPS(rt700_dev_suspend, rt700_dev_resume) 525 SET_RUNTIME_PM_OPS(rt700_dev_suspend, rt700_dev_resume, NULL) 526}; 527 528static struct sdw_driver rt700_sdw_driver = { 529 .driver = { 530 .name = "rt700", 531 .owner = THIS_MODULE, 532 .pm = &rt700_pm, 533 }, 534 .probe = rt700_sdw_probe, 535 .remove = rt700_sdw_remove, 536 .ops = &rt700_slave_ops, 537 .id_table = rt700_id, 538}; 539module_sdw_driver(rt700_sdw_driver); 540 541MODULE_DESCRIPTION("ASoC RT700 driver SDW"); 542MODULE_AUTHOR("Shuming Fan <shumingf@realtek.com>"); 543MODULE_LICENSE("GPL v2"); 544