18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * atmel_ssc_dai.h - ALSA SSC interface for the Atmel SoC 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2005 SAN People 68c2ecf20Sopenharmony_ci * Copyright (C) 2008 Atmel 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci * Author: Sedji Gaouaou <sedji.gaouaou@atmel.com> 98c2ecf20Sopenharmony_ci * ATMEL CORP. 108c2ecf20Sopenharmony_ci * 118c2ecf20Sopenharmony_ci * Based on at91-ssc.c by 128c2ecf20Sopenharmony_ci * Frank Mandarino <fmandarino@endrelia.com> 138c2ecf20Sopenharmony_ci * Based on pxa2xx Platform drivers by 148c2ecf20Sopenharmony_ci * Liam Girdwood <lrg@slimlogic.co.uk> 158c2ecf20Sopenharmony_ci */ 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci#ifndef _ATMEL_SSC_DAI_H 188c2ecf20Sopenharmony_ci#define _ATMEL_SSC_DAI_H 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci#include <linux/types.h> 218c2ecf20Sopenharmony_ci#include <linux/atmel-ssc.h> 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci#include "atmel-pcm.h" 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci/* SSC system clock ids */ 268c2ecf20Sopenharmony_ci#define ATMEL_SYSCLK_MCK 0 /* SSC uses AT91 MCK as system clock */ 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci/* SSC divider ids */ 298c2ecf20Sopenharmony_ci#define ATMEL_SSC_CMR_DIV 0 /* MCK divider for BCLK */ 308c2ecf20Sopenharmony_ci#define ATMEL_SSC_TCMR_PERIOD 1 /* BCLK divider for transmit FS */ 318c2ecf20Sopenharmony_ci#define ATMEL_SSC_RCMR_PERIOD 2 /* BCLK divider for receive FS */ 328c2ecf20Sopenharmony_ci/* 338c2ecf20Sopenharmony_ci * SSC direction masks 348c2ecf20Sopenharmony_ci */ 358c2ecf20Sopenharmony_ci#define SSC_DIR_MASK_UNUSED 0 368c2ecf20Sopenharmony_ci#define SSC_DIR_MASK_PLAYBACK 1 378c2ecf20Sopenharmony_ci#define SSC_DIR_MASK_CAPTURE 2 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci/* 408c2ecf20Sopenharmony_ci * SSC register values that Atmel left out of <linux/atmel-ssc.h>. These 418c2ecf20Sopenharmony_ci * are expected to be used with SSC_BF 428c2ecf20Sopenharmony_ci */ 438c2ecf20Sopenharmony_ci/* START bit field values */ 448c2ecf20Sopenharmony_ci#define SSC_START_CONTINUOUS 0 458c2ecf20Sopenharmony_ci#define SSC_START_TX_RX 1 468c2ecf20Sopenharmony_ci#define SSC_START_LOW_RF 2 478c2ecf20Sopenharmony_ci#define SSC_START_HIGH_RF 3 488c2ecf20Sopenharmony_ci#define SSC_START_FALLING_RF 4 498c2ecf20Sopenharmony_ci#define SSC_START_RISING_RF 5 508c2ecf20Sopenharmony_ci#define SSC_START_LEVEL_RF 6 518c2ecf20Sopenharmony_ci#define SSC_START_EDGE_RF 7 528c2ecf20Sopenharmony_ci#define SSS_START_COMPARE_0 8 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci/* CKI bit field values */ 558c2ecf20Sopenharmony_ci#define SSC_CKI_FALLING 0 568c2ecf20Sopenharmony_ci#define SSC_CKI_RISING 1 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci/* CKO bit field values */ 598c2ecf20Sopenharmony_ci#define SSC_CKO_NONE 0 608c2ecf20Sopenharmony_ci#define SSC_CKO_CONTINUOUS 1 618c2ecf20Sopenharmony_ci#define SSC_CKO_TRANSFER 2 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci/* CKS bit field values */ 648c2ecf20Sopenharmony_ci#define SSC_CKS_DIV 0 658c2ecf20Sopenharmony_ci#define SSC_CKS_CLOCK 1 668c2ecf20Sopenharmony_ci#define SSC_CKS_PIN 2 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ci/* FSEDGE bit field values */ 698c2ecf20Sopenharmony_ci#define SSC_FSEDGE_POSITIVE 0 708c2ecf20Sopenharmony_ci#define SSC_FSEDGE_NEGATIVE 1 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ci/* FSOS bit field values */ 738c2ecf20Sopenharmony_ci#define SSC_FSOS_NONE 0 748c2ecf20Sopenharmony_ci#define SSC_FSOS_NEGATIVE 1 758c2ecf20Sopenharmony_ci#define SSC_FSOS_POSITIVE 2 768c2ecf20Sopenharmony_ci#define SSC_FSOS_LOW 3 778c2ecf20Sopenharmony_ci#define SSC_FSOS_HIGH 4 788c2ecf20Sopenharmony_ci#define SSC_FSOS_TOGGLE 5 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_ci#define START_DELAY 1 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_cistruct atmel_ssc_state { 838c2ecf20Sopenharmony_ci u32 ssc_cmr; 848c2ecf20Sopenharmony_ci u32 ssc_rcmr; 858c2ecf20Sopenharmony_ci u32 ssc_rfmr; 868c2ecf20Sopenharmony_ci u32 ssc_tcmr; 878c2ecf20Sopenharmony_ci u32 ssc_tfmr; 888c2ecf20Sopenharmony_ci u32 ssc_sr; 898c2ecf20Sopenharmony_ci u32 ssc_imr; 908c2ecf20Sopenharmony_ci}; 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci 938c2ecf20Sopenharmony_cistruct atmel_ssc_info { 948c2ecf20Sopenharmony_ci char *name; 958c2ecf20Sopenharmony_ci struct ssc_device *ssc; 968c2ecf20Sopenharmony_ci unsigned short dir_mask; /* 0=unused, 1=playback, 2=capture */ 978c2ecf20Sopenharmony_ci unsigned short initialized; /* true if SSC has been initialized */ 988c2ecf20Sopenharmony_ci unsigned short daifmt; 998c2ecf20Sopenharmony_ci unsigned short cmr_div; 1008c2ecf20Sopenharmony_ci unsigned short tcmr_period; 1018c2ecf20Sopenharmony_ci unsigned short rcmr_period; 1028c2ecf20Sopenharmony_ci unsigned int forced_divider; 1038c2ecf20Sopenharmony_ci struct atmel_pcm_dma_params *dma_params[2]; 1048c2ecf20Sopenharmony_ci struct atmel_ssc_state ssc_state; 1058c2ecf20Sopenharmony_ci unsigned long mck_rate; 1068c2ecf20Sopenharmony_ci}; 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_ciint atmel_ssc_set_audio(int ssc_id); 1098c2ecf20Sopenharmony_civoid atmel_ssc_put_audio(int ssc_id); 1108c2ecf20Sopenharmony_ci 1118c2ecf20Sopenharmony_ci#endif /* _AT91_SSC_DAI_H */ 112