18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * at91-pcm.h - ALSA PCM interface for the Atmel AT91 SoC.
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci *  Copyright (C) 2005 SAN People
68c2ecf20Sopenharmony_ci *  Copyright (C) 2008 Atmel
78c2ecf20Sopenharmony_ci *
88c2ecf20Sopenharmony_ci * Authors: Sedji Gaouaou <sedji.gaouaou@atmel.com>
98c2ecf20Sopenharmony_ci *
108c2ecf20Sopenharmony_ci * Based on at91-pcm. by:
118c2ecf20Sopenharmony_ci * Frank Mandarino <fmandarino@endrelia.com>
128c2ecf20Sopenharmony_ci * Copyright 2006 Endrelia Technologies Inc.
138c2ecf20Sopenharmony_ci *
148c2ecf20Sopenharmony_ci * Based on pxa2xx-pcm.c by:
158c2ecf20Sopenharmony_ci *
168c2ecf20Sopenharmony_ci * Author:	Nicolas Pitre
178c2ecf20Sopenharmony_ci * Created:	Nov 30, 2004
188c2ecf20Sopenharmony_ci * Copyright:	(C) 2004 MontaVista Software, Inc.
198c2ecf20Sopenharmony_ci */
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci#ifndef _ATMEL_PCM_H
228c2ecf20Sopenharmony_ci#define _ATMEL_PCM_H
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_ci#include <linux/atmel-ssc.h>
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci#define ATMEL_SSC_DMABUF_SIZE	(64 * 1024)
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ci/*
298c2ecf20Sopenharmony_ci * Registers and status bits that are required by the PCM driver.
308c2ecf20Sopenharmony_ci */
318c2ecf20Sopenharmony_cistruct atmel_pdc_regs {
328c2ecf20Sopenharmony_ci	unsigned int	xpr;		/* PDC recv/trans pointer */
338c2ecf20Sopenharmony_ci	unsigned int	xcr;		/* PDC recv/trans counter */
348c2ecf20Sopenharmony_ci	unsigned int	xnpr;		/* PDC next recv/trans pointer */
358c2ecf20Sopenharmony_ci	unsigned int	xncr;		/* PDC next recv/trans counter */
368c2ecf20Sopenharmony_ci	unsigned int	ptcr;		/* PDC transfer control */
378c2ecf20Sopenharmony_ci};
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_cistruct atmel_ssc_mask {
408c2ecf20Sopenharmony_ci	u32	ssc_enable;		/* SSC recv/trans enable */
418c2ecf20Sopenharmony_ci	u32	ssc_disable;		/* SSC recv/trans disable */
428c2ecf20Sopenharmony_ci	u32	ssc_error;		/* SSC error conditions */
438c2ecf20Sopenharmony_ci	u32	ssc_endx;		/* SSC ENDTX or ENDRX */
448c2ecf20Sopenharmony_ci	u32	ssc_endbuf;		/* SSC TXBUFE or RXBUFF */
458c2ecf20Sopenharmony_ci	u32	pdc_enable;		/* PDC recv/trans enable */
468c2ecf20Sopenharmony_ci	u32	pdc_disable;		/* PDC recv/trans disable */
478c2ecf20Sopenharmony_ci};
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci/*
508c2ecf20Sopenharmony_ci * This structure, shared between the PCM driver and the interface,
518c2ecf20Sopenharmony_ci * contains all information required by the PCM driver to perform the
528c2ecf20Sopenharmony_ci * PDC DMA operation.  All fields except dma_intr_handler() are initialized
538c2ecf20Sopenharmony_ci * by the interface.  The dma_intr_handler() pointer is set by the PCM
548c2ecf20Sopenharmony_ci * driver and called by the interface SSC interrupt handler if it is
558c2ecf20Sopenharmony_ci * non-NULL.
568c2ecf20Sopenharmony_ci */
578c2ecf20Sopenharmony_cistruct atmel_pcm_dma_params {
588c2ecf20Sopenharmony_ci	char *name;			/* stream identifier */
598c2ecf20Sopenharmony_ci	int pdc_xfer_size;		/* PDC counter increment in bytes */
608c2ecf20Sopenharmony_ci	struct ssc_device *ssc;		/* SSC device for stream */
618c2ecf20Sopenharmony_ci	struct atmel_pdc_regs *pdc;	/* PDC receive or transmit registers */
628c2ecf20Sopenharmony_ci	struct atmel_ssc_mask *mask;	/* SSC & PDC status bits */
638c2ecf20Sopenharmony_ci	struct snd_pcm_substream *substream;
648c2ecf20Sopenharmony_ci	void (*dma_intr_handler)(u32, struct snd_pcm_substream *);
658c2ecf20Sopenharmony_ci};
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_ci/*
688c2ecf20Sopenharmony_ci * SSC register access (since ssc_writel() / ssc_readl() require literal name)
698c2ecf20Sopenharmony_ci */
708c2ecf20Sopenharmony_ci#define ssc_readx(base, reg)            (__raw_readl((base) + (reg)))
718c2ecf20Sopenharmony_ci#define ssc_writex(base, reg, value)    __raw_writel((value), (base) + (reg))
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_SND_ATMEL_SOC_PDC)
748c2ecf20Sopenharmony_ciint atmel_pcm_pdc_platform_register(struct device *dev);
758c2ecf20Sopenharmony_ci#else
768c2ecf20Sopenharmony_cistatic inline int atmel_pcm_pdc_platform_register(struct device *dev)
778c2ecf20Sopenharmony_ci{
788c2ecf20Sopenharmony_ci	return 0;
798c2ecf20Sopenharmony_ci}
808c2ecf20Sopenharmony_ci#endif
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_SND_ATMEL_SOC_DMA)
838c2ecf20Sopenharmony_ciint atmel_pcm_dma_platform_register(struct device *dev);
848c2ecf20Sopenharmony_ci#else
858c2ecf20Sopenharmony_cistatic inline int atmel_pcm_dma_platform_register(struct device *dev)
868c2ecf20Sopenharmony_ci{
878c2ecf20Sopenharmony_ci	return 0;
888c2ecf20Sopenharmony_ci}
898c2ecf20Sopenharmony_ci#endif
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_ci#endif /* _ATMEL_PCM_H */
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