18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Driver for Sound Cors PDAudioCF soundcard
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (c) 2003 by Jaroslav Kysela <perex@perex.cz>
68c2ecf20Sopenharmony_ci */
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci#ifndef __PDAUDIOCF_H
98c2ecf20Sopenharmony_ci#define __PDAUDIOCF_H
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#include <sound/pcm.h>
128c2ecf20Sopenharmony_ci#include <linux/io.h>
138c2ecf20Sopenharmony_ci#include <linux/interrupt.h>
148c2ecf20Sopenharmony_ci#include <pcmcia/cistpl.h>
158c2ecf20Sopenharmony_ci#include <pcmcia/ds.h>
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ci#include <sound/ak4117.h>
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci/* PDAUDIOCF registers */
208c2ecf20Sopenharmony_ci#define PDAUDIOCF_REG_MD	0x00	/* music data, R/O */
218c2ecf20Sopenharmony_ci#define PDAUDIOCF_REG_WDP	0x02	/* write data pointer / 2, R/O */
228c2ecf20Sopenharmony_ci#define PDAUDIOCF_REG_RDP	0x04	/* read data pointer / 2, R/O */
238c2ecf20Sopenharmony_ci#define PDAUDIOCF_REG_TCR	0x06	/* test control register W/O */
248c2ecf20Sopenharmony_ci#define PDAUDIOCF_REG_SCR	0x08	/* status and control, R/W (see bit description) */
258c2ecf20Sopenharmony_ci#define PDAUDIOCF_REG_ISR	0x0a	/* interrupt status, R/O */
268c2ecf20Sopenharmony_ci#define PDAUDIOCF_REG_IER	0x0c	/* interrupt enable, R/W */
278c2ecf20Sopenharmony_ci#define PDAUDIOCF_REG_AK_IFR	0x0e	/* AK interface register, R/W */
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci/* PDAUDIOCF_REG_TCR */
308c2ecf20Sopenharmony_ci#define PDAUDIOCF_ELIMAKMBIT	(1<<0)	/* simulate AKM music data */
318c2ecf20Sopenharmony_ci#define PDAUDIOCF_TESTDATASEL	(1<<1)	/* test data selection, 0 = 0x55, 1 = pseudo-random */
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci/* PDAUDIOCF_REG_SCR */
348c2ecf20Sopenharmony_ci#define PDAUDIOCF_AK_SBP	(1<<0)	/* serial port busy flag */
358c2ecf20Sopenharmony_ci#define PDAUDIOCF_RST		(1<<2)	/* FPGA, AKM + SRAM buffer reset */
368c2ecf20Sopenharmony_ci#define PDAUDIOCF_PDN		(1<<3)	/* power down bit */
378c2ecf20Sopenharmony_ci#define PDAUDIOCF_CLKDIV0	(1<<4)	/* choose 24.576Mhz clock divided by 1,2,3 or 4 */
388c2ecf20Sopenharmony_ci#define PDAUDIOCF_CLKDIV1	(1<<5)
398c2ecf20Sopenharmony_ci#define PDAUDIOCF_RECORD	(1<<6)	/* start capturing to SRAM */
408c2ecf20Sopenharmony_ci#define PDAUDIOCF_AK_SDD	(1<<7)	/* music data detected */
418c2ecf20Sopenharmony_ci#define PDAUDIOCF_RED_LED_OFF	(1<<8)	/* red LED off override */
428c2ecf20Sopenharmony_ci#define PDAUDIOCF_BLUE_LED_OFF	(1<<9)	/* blue LED off override */
438c2ecf20Sopenharmony_ci#define PDAUDIOCF_DATAFMT0	(1<<10)	/* data format bits: 00 = 16-bit, 01 = 18-bit */
448c2ecf20Sopenharmony_ci#define PDAUDIOCF_DATAFMT1	(1<<11)	/* 10 = 20-bit, 11 = 24-bit, all right justified */
458c2ecf20Sopenharmony_ci#define PDAUDIOCF_FPGAREV(x)	((x>>12)&0x0f) /* FPGA revision */
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_ci/* PDAUDIOCF_REG_ISR */
488c2ecf20Sopenharmony_ci#define PDAUDIOCF_IRQLVL	(1<<0)	/* Buffer level IRQ */
498c2ecf20Sopenharmony_ci#define PDAUDIOCF_IRQOVR	(1<<1)	/* Overrun IRQ */
508c2ecf20Sopenharmony_ci#define PDAUDIOCF_IRQAKM	(1<<2)	/* AKM IRQ */
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci/* PDAUDIOCF_REG_IER */
538c2ecf20Sopenharmony_ci#define PDAUDIOCF_IRQLVLEN0	(1<<0)	/* fill threshold levels; 00 = none, 01 = 1/8th of buffer */
548c2ecf20Sopenharmony_ci#define PDAUDIOCF_IRQLVLEN1	(1<<1)	/* 10 = 1/4th of buffer, 11 = 1/2th of buffer */
558c2ecf20Sopenharmony_ci#define PDAUDIOCF_IRQOVREN	(1<<2)	/* enable overrun IRQ */
568c2ecf20Sopenharmony_ci#define PDAUDIOCF_IRQAKMEN	(1<<3)	/* enable AKM IRQ */
578c2ecf20Sopenharmony_ci#define PDAUDIOCF_BLUEDUTY0	(1<<8)	/* blue LED duty cycle; 00 = 100%, 01 = 50% */
588c2ecf20Sopenharmony_ci#define PDAUDIOCF_BLUEDUTY1	(1<<9)	/* 02 = 25%, 11 = 12% */
598c2ecf20Sopenharmony_ci#define PDAUDIOCF_REDDUTY0	(1<<10)	/* red LED duty cycle; 00 = 100%, 01 = 50% */
608c2ecf20Sopenharmony_ci#define PDAUDIOCF_REDDUTY1	(1<<11)	/* 02 = 25%, 11 = 12% */
618c2ecf20Sopenharmony_ci#define PDAUDIOCF_BLUESDD	(1<<12)	/* blue LED against SDD bit */
628c2ecf20Sopenharmony_ci#define PDAUDIOCF_BLUEMODULATE	(1<<13)	/* save power when 100% duty cycle selected */
638c2ecf20Sopenharmony_ci#define PDAUDIOCF_REDMODULATE	(1<<14)	/* save power when 100% duty cycle selected */
648c2ecf20Sopenharmony_ci#define PDAUDIOCF_HALFRATE	(1<<15)	/* slow both LED blinks by half (also spdif detect rate) */
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_ci/* chip status */
678c2ecf20Sopenharmony_ci#define PDAUDIOCF_STAT_IS_STALE	(1<<0)
688c2ecf20Sopenharmony_ci#define PDAUDIOCF_STAT_IS_CONFIGURED (1<<1)
698c2ecf20Sopenharmony_ci#define PDAUDIOCF_STAT_IS_SUSPENDED (1<<2)
708c2ecf20Sopenharmony_ci
718c2ecf20Sopenharmony_cistruct snd_pdacf {
728c2ecf20Sopenharmony_ci	struct snd_card *card;
738c2ecf20Sopenharmony_ci	int index;
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ci	unsigned long port;
768c2ecf20Sopenharmony_ci	int irq;
778c2ecf20Sopenharmony_ci
788c2ecf20Sopenharmony_ci	struct mutex reg_lock;
798c2ecf20Sopenharmony_ci	unsigned short regmap[8];
808c2ecf20Sopenharmony_ci	unsigned short suspend_reg_scr;
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_ci	spinlock_t ak4117_lock;
838c2ecf20Sopenharmony_ci	struct ak4117 *ak4117;
848c2ecf20Sopenharmony_ci
858c2ecf20Sopenharmony_ci	unsigned int chip_status;
868c2ecf20Sopenharmony_ci
878c2ecf20Sopenharmony_ci	struct snd_pcm *pcm;
888c2ecf20Sopenharmony_ci	struct snd_pcm_substream *pcm_substream;
898c2ecf20Sopenharmony_ci	unsigned int pcm_running: 1;
908c2ecf20Sopenharmony_ci	unsigned int pcm_channels;
918c2ecf20Sopenharmony_ci	unsigned int pcm_swab;
928c2ecf20Sopenharmony_ci	unsigned int pcm_little;
938c2ecf20Sopenharmony_ci	unsigned int pcm_frame;
948c2ecf20Sopenharmony_ci	unsigned int pcm_sample;
958c2ecf20Sopenharmony_ci	unsigned int pcm_xor;
968c2ecf20Sopenharmony_ci	unsigned int pcm_size;
978c2ecf20Sopenharmony_ci	unsigned int pcm_period;
988c2ecf20Sopenharmony_ci	unsigned int pcm_tdone;
998c2ecf20Sopenharmony_ci	unsigned int pcm_hwptr;
1008c2ecf20Sopenharmony_ci	void *pcm_area;
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ci	/* pcmcia stuff */
1038c2ecf20Sopenharmony_ci	struct pcmcia_device	*p_dev;
1048c2ecf20Sopenharmony_ci};
1058c2ecf20Sopenharmony_ci
1068c2ecf20Sopenharmony_cistatic inline void pdacf_reg_write(struct snd_pdacf *chip, unsigned char reg, unsigned short val)
1078c2ecf20Sopenharmony_ci{
1088c2ecf20Sopenharmony_ci	outw(chip->regmap[reg>>1] = val, chip->port + reg);
1098c2ecf20Sopenharmony_ci}
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_cistatic inline unsigned short pdacf_reg_read(struct snd_pdacf *chip, unsigned char reg)
1128c2ecf20Sopenharmony_ci{
1138c2ecf20Sopenharmony_ci	return inw(chip->port + reg);
1148c2ecf20Sopenharmony_ci}
1158c2ecf20Sopenharmony_ci
1168c2ecf20Sopenharmony_cistruct snd_pdacf *snd_pdacf_create(struct snd_card *card);
1178c2ecf20Sopenharmony_ciint snd_pdacf_ak4117_create(struct snd_pdacf *pdacf);
1188c2ecf20Sopenharmony_civoid snd_pdacf_powerdown(struct snd_pdacf *chip);
1198c2ecf20Sopenharmony_ci#ifdef CONFIG_PM
1208c2ecf20Sopenharmony_ciint snd_pdacf_suspend(struct snd_pdacf *chip);
1218c2ecf20Sopenharmony_ciint snd_pdacf_resume(struct snd_pdacf *chip);
1228c2ecf20Sopenharmony_ci#endif
1238c2ecf20Sopenharmony_ciint snd_pdacf_pcm_new(struct snd_pdacf *chip);
1248c2ecf20Sopenharmony_ciirqreturn_t pdacf_interrupt(int irq, void *dev);
1258c2ecf20Sopenharmony_ciirqreturn_t pdacf_threaded_irq(int irq, void *dev);
1268c2ecf20Sopenharmony_civoid pdacf_reinit(struct snd_pdacf *chip, int resume);
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_ci#endif /* __PDAUDIOCF_H */
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