1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 4 * Routines for control of YMF724/740/744/754 chips 5 */ 6 7#include <linux/delay.h> 8#include <linux/firmware.h> 9#include <linux/init.h> 10#include <linux/interrupt.h> 11#include <linux/pci.h> 12#include <linux/sched.h> 13#include <linux/slab.h> 14#include <linux/mutex.h> 15#include <linux/module.h> 16#include <linux/io.h> 17 18#include <sound/core.h> 19#include <sound/control.h> 20#include <sound/info.h> 21#include <sound/tlv.h> 22#include "ymfpci.h" 23#include <sound/asoundef.h> 24#include <sound/mpu401.h> 25 26#include <asm/byteorder.h> 27 28/* 29 * common I/O routines 30 */ 31 32static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip); 33 34static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset) 35{ 36 return readb(chip->reg_area_virt + offset); 37} 38 39static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val) 40{ 41 writeb(val, chip->reg_area_virt + offset); 42} 43 44static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset) 45{ 46 return readw(chip->reg_area_virt + offset); 47} 48 49static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val) 50{ 51 writew(val, chip->reg_area_virt + offset); 52} 53 54static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset) 55{ 56 return readl(chip->reg_area_virt + offset); 57} 58 59static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val) 60{ 61 writel(val, chip->reg_area_virt + offset); 62} 63 64static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary) 65{ 66 unsigned long end_time; 67 u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR; 68 69 end_time = jiffies + msecs_to_jiffies(750); 70 do { 71 if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0) 72 return 0; 73 schedule_timeout_uninterruptible(1); 74 } while (time_before(jiffies, end_time)); 75 dev_err(chip->card->dev, 76 "codec_ready: codec %i is not ready [0x%x]\n", 77 secondary, snd_ymfpci_readw(chip, reg)); 78 return -EBUSY; 79} 80 81static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val) 82{ 83 struct snd_ymfpci *chip = ac97->private_data; 84 u32 cmd; 85 86 snd_ymfpci_codec_ready(chip, 0); 87 cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val; 88 snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd); 89} 90 91static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg) 92{ 93 struct snd_ymfpci *chip = ac97->private_data; 94 95 if (snd_ymfpci_codec_ready(chip, 0)) 96 return ~0; 97 snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg); 98 if (snd_ymfpci_codec_ready(chip, 0)) 99 return ~0; 100 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) { 101 int i; 102 for (i = 0; i < 600; i++) 103 snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 104 } 105 return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA); 106} 107 108/* 109 * Misc routines 110 */ 111 112static u32 snd_ymfpci_calc_delta(u32 rate) 113{ 114 switch (rate) { 115 case 8000: return 0x02aaab00; 116 case 11025: return 0x03accd00; 117 case 16000: return 0x05555500; 118 case 22050: return 0x07599a00; 119 case 32000: return 0x0aaaab00; 120 case 44100: return 0x0eb33300; 121 default: return ((rate << 16) / 375) << 5; 122 } 123} 124 125static const u32 def_rate[8] = { 126 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000 127}; 128 129static u32 snd_ymfpci_calc_lpfK(u32 rate) 130{ 131 u32 i; 132 static const u32 val[8] = { 133 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000, 134 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000 135 }; 136 137 if (rate == 44100) 138 return 0x40000000; /* FIXME: What's the right value? */ 139 for (i = 0; i < 8; i++) 140 if (rate <= def_rate[i]) 141 return val[i]; 142 return val[0]; 143} 144 145static u32 snd_ymfpci_calc_lpfQ(u32 rate) 146{ 147 u32 i; 148 static const u32 val[8] = { 149 0x35280000, 0x34A70000, 0x32020000, 0x31770000, 150 0x31390000, 0x31C90000, 0x33D00000, 0x40000000 151 }; 152 153 if (rate == 44100) 154 return 0x370A0000; 155 for (i = 0; i < 8; i++) 156 if (rate <= def_rate[i]) 157 return val[i]; 158 return val[0]; 159} 160 161/* 162 * Hardware start management 163 */ 164 165static void snd_ymfpci_hw_start(struct snd_ymfpci *chip) 166{ 167 unsigned long flags; 168 169 spin_lock_irqsave(&chip->reg_lock, flags); 170 if (chip->start_count++ > 0) 171 goto __end; 172 snd_ymfpci_writel(chip, YDSXGR_MODE, 173 snd_ymfpci_readl(chip, YDSXGR_MODE) | 3); 174 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 175 __end: 176 spin_unlock_irqrestore(&chip->reg_lock, flags); 177} 178 179static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip) 180{ 181 unsigned long flags; 182 long timeout = 1000; 183 184 spin_lock_irqsave(&chip->reg_lock, flags); 185 if (--chip->start_count > 0) 186 goto __end; 187 snd_ymfpci_writel(chip, YDSXGR_MODE, 188 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3); 189 while (timeout-- > 0) { 190 if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0) 191 break; 192 } 193 if (atomic_read(&chip->interrupt_sleep_count)) { 194 atomic_set(&chip->interrupt_sleep_count, 0); 195 wake_up(&chip->interrupt_sleep); 196 } 197 __end: 198 spin_unlock_irqrestore(&chip->reg_lock, flags); 199} 200 201/* 202 * Playback voice management 203 */ 204 205static int voice_alloc(struct snd_ymfpci *chip, 206 enum snd_ymfpci_voice_type type, int pair, 207 struct snd_ymfpci_voice **rvoice) 208{ 209 struct snd_ymfpci_voice *voice, *voice2; 210 int idx; 211 212 *rvoice = NULL; 213 for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) { 214 voice = &chip->voices[idx]; 215 voice2 = pair ? &chip->voices[idx+1] : NULL; 216 if (voice->use || (voice2 && voice2->use)) 217 continue; 218 voice->use = 1; 219 if (voice2) 220 voice2->use = 1; 221 switch (type) { 222 case YMFPCI_PCM: 223 voice->pcm = 1; 224 if (voice2) 225 voice2->pcm = 1; 226 break; 227 case YMFPCI_SYNTH: 228 voice->synth = 1; 229 break; 230 case YMFPCI_MIDI: 231 voice->midi = 1; 232 break; 233 } 234 snd_ymfpci_hw_start(chip); 235 if (voice2) 236 snd_ymfpci_hw_start(chip); 237 *rvoice = voice; 238 return 0; 239 } 240 return -ENOMEM; 241} 242 243static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip, 244 enum snd_ymfpci_voice_type type, int pair, 245 struct snd_ymfpci_voice **rvoice) 246{ 247 unsigned long flags; 248 int result; 249 250 if (snd_BUG_ON(!rvoice)) 251 return -EINVAL; 252 if (snd_BUG_ON(pair && type != YMFPCI_PCM)) 253 return -EINVAL; 254 255 spin_lock_irqsave(&chip->voice_lock, flags); 256 for (;;) { 257 result = voice_alloc(chip, type, pair, rvoice); 258 if (result == 0 || type != YMFPCI_PCM) 259 break; 260 /* TODO: synth/midi voice deallocation */ 261 break; 262 } 263 spin_unlock_irqrestore(&chip->voice_lock, flags); 264 return result; 265} 266 267static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice) 268{ 269 unsigned long flags; 270 271 if (snd_BUG_ON(!pvoice)) 272 return -EINVAL; 273 snd_ymfpci_hw_stop(chip); 274 spin_lock_irqsave(&chip->voice_lock, flags); 275 if (pvoice->number == chip->src441_used) { 276 chip->src441_used = -1; 277 pvoice->ypcm->use_441_slot = 0; 278 } 279 pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0; 280 pvoice->ypcm = NULL; 281 pvoice->interrupt = NULL; 282 spin_unlock_irqrestore(&chip->voice_lock, flags); 283 return 0; 284} 285 286/* 287 * PCM part 288 */ 289 290static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice) 291{ 292 struct snd_ymfpci_pcm *ypcm; 293 u32 pos, delta; 294 295 ypcm = voice->ypcm; 296 if (!ypcm) 297 return; 298 if (ypcm->substream == NULL) 299 return; 300 spin_lock(&chip->reg_lock); 301 if (ypcm->running) { 302 pos = le32_to_cpu(voice->bank[chip->active_bank].start); 303 if (pos < ypcm->last_pos) 304 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 305 else 306 delta = pos - ypcm->last_pos; 307 ypcm->period_pos += delta; 308 ypcm->last_pos = pos; 309 if (ypcm->period_pos >= ypcm->period_size) { 310 /* 311 dev_dbg(chip->card->dev, 312 "done - active_bank = 0x%x, start = 0x%x\n", 313 chip->active_bank, 314 voice->bank[chip->active_bank].start); 315 */ 316 ypcm->period_pos %= ypcm->period_size; 317 spin_unlock(&chip->reg_lock); 318 snd_pcm_period_elapsed(ypcm->substream); 319 spin_lock(&chip->reg_lock); 320 } 321 322 if (unlikely(ypcm->update_pcm_vol)) { 323 unsigned int subs = ypcm->substream->number; 324 unsigned int next_bank = 1 - chip->active_bank; 325 struct snd_ymfpci_playback_bank *bank; 326 __le32 volume; 327 328 bank = &voice->bank[next_bank]; 329 volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15); 330 bank->left_gain_end = volume; 331 if (ypcm->output_rear) 332 bank->eff2_gain_end = volume; 333 if (ypcm->voices[1]) 334 bank = &ypcm->voices[1]->bank[next_bank]; 335 volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15); 336 bank->right_gain_end = volume; 337 if (ypcm->output_rear) 338 bank->eff3_gain_end = volume; 339 ypcm->update_pcm_vol--; 340 } 341 } 342 spin_unlock(&chip->reg_lock); 343} 344 345static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream) 346{ 347 struct snd_pcm_runtime *runtime = substream->runtime; 348 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 349 struct snd_ymfpci *chip = ypcm->chip; 350 u32 pos, delta; 351 352 spin_lock(&chip->reg_lock); 353 if (ypcm->running) { 354 pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 355 if (pos < ypcm->last_pos) 356 delta = pos + (ypcm->buffer_size - ypcm->last_pos); 357 else 358 delta = pos - ypcm->last_pos; 359 ypcm->period_pos += delta; 360 ypcm->last_pos = pos; 361 if (ypcm->period_pos >= ypcm->period_size) { 362 ypcm->period_pos %= ypcm->period_size; 363 /* 364 dev_dbg(chip->card->dev, 365 "done - active_bank = 0x%x, start = 0x%x\n", 366 chip->active_bank, 367 voice->bank[chip->active_bank].start); 368 */ 369 spin_unlock(&chip->reg_lock); 370 snd_pcm_period_elapsed(substream); 371 spin_lock(&chip->reg_lock); 372 } 373 } 374 spin_unlock(&chip->reg_lock); 375} 376 377static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream, 378 int cmd) 379{ 380 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 381 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 382 struct snd_kcontrol *kctl = NULL; 383 int result = 0; 384 385 spin_lock(&chip->reg_lock); 386 if (ypcm->voices[0] == NULL) { 387 result = -EINVAL; 388 goto __unlock; 389 } 390 switch (cmd) { 391 case SNDRV_PCM_TRIGGER_START: 392 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 393 case SNDRV_PCM_TRIGGER_RESUME: 394 chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr); 395 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot) 396 chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr); 397 ypcm->running = 1; 398 break; 399 case SNDRV_PCM_TRIGGER_STOP: 400 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { 401 kctl = chip->pcm_mixer[substream->number].ctl; 402 kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 403 } 404 fallthrough; 405 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 406 case SNDRV_PCM_TRIGGER_SUSPEND: 407 chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0; 408 if (ypcm->voices[1] != NULL && !ypcm->use_441_slot) 409 chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0; 410 ypcm->running = 0; 411 break; 412 default: 413 result = -EINVAL; 414 break; 415 } 416 __unlock: 417 spin_unlock(&chip->reg_lock); 418 if (kctl) 419 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 420 return result; 421} 422static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream, 423 int cmd) 424{ 425 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 426 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 427 int result = 0; 428 u32 tmp; 429 430 spin_lock(&chip->reg_lock); 431 switch (cmd) { 432 case SNDRV_PCM_TRIGGER_START: 433 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 434 case SNDRV_PCM_TRIGGER_RESUME: 435 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number); 436 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 437 ypcm->running = 1; 438 break; 439 case SNDRV_PCM_TRIGGER_STOP: 440 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 441 case SNDRV_PCM_TRIGGER_SUSPEND: 442 tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number); 443 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp); 444 ypcm->running = 0; 445 break; 446 default: 447 result = -EINVAL; 448 break; 449 } 450 spin_unlock(&chip->reg_lock); 451 return result; 452} 453 454static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices) 455{ 456 int err; 457 458 if (ypcm->voices[1] != NULL && voices < 2) { 459 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]); 460 ypcm->voices[1] = NULL; 461 } 462 if (voices == 1 && ypcm->voices[0] != NULL) 463 return 0; /* already allocated */ 464 if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL) 465 return 0; /* already allocated */ 466 if (voices > 1) { 467 if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) { 468 snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]); 469 ypcm->voices[0] = NULL; 470 } 471 } 472 err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]); 473 if (err < 0) 474 return err; 475 ypcm->voices[0]->ypcm = ypcm; 476 ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt; 477 if (voices > 1) { 478 ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1]; 479 ypcm->voices[1]->ypcm = ypcm; 480 } 481 return 0; 482} 483 484static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx, 485 struct snd_pcm_runtime *runtime, 486 int has_pcm_volume) 487{ 488 struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx]; 489 u32 format; 490 u32 delta = snd_ymfpci_calc_delta(runtime->rate); 491 u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate); 492 u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate); 493 struct snd_ymfpci_playback_bank *bank; 494 unsigned int nbank; 495 __le32 vol_left, vol_right; 496 u8 use_left, use_right; 497 unsigned long flags; 498 499 if (snd_BUG_ON(!voice)) 500 return; 501 if (runtime->channels == 1) { 502 use_left = 1; 503 use_right = 1; 504 } else { 505 use_left = (voiceidx & 1) == 0; 506 use_right = !use_left; 507 } 508 if (has_pcm_volume) { 509 vol_left = cpu_to_le32(ypcm->chip->pcm_mixer 510 [ypcm->substream->number].left << 15); 511 vol_right = cpu_to_le32(ypcm->chip->pcm_mixer 512 [ypcm->substream->number].right << 15); 513 } else { 514 vol_left = cpu_to_le32(0x40000000); 515 vol_right = cpu_to_le32(0x40000000); 516 } 517 spin_lock_irqsave(&ypcm->chip->voice_lock, flags); 518 format = runtime->channels == 2 ? 0x00010000 : 0; 519 if (snd_pcm_format_width(runtime->format) == 8) 520 format |= 0x80000000; 521 else if (ypcm->chip->device_id == PCI_DEVICE_ID_YAMAHA_754 && 522 runtime->rate == 44100 && runtime->channels == 2 && 523 voiceidx == 0 && (ypcm->chip->src441_used == -1 || 524 ypcm->chip->src441_used == voice->number)) { 525 ypcm->chip->src441_used = voice->number; 526 ypcm->use_441_slot = 1; 527 format |= 0x10000000; 528 } 529 if (ypcm->chip->src441_used == voice->number && 530 (format & 0x10000000) == 0) { 531 ypcm->chip->src441_used = -1; 532 ypcm->use_441_slot = 0; 533 } 534 if (runtime->channels == 2 && (voiceidx & 1) != 0) 535 format |= 1; 536 spin_unlock_irqrestore(&ypcm->chip->voice_lock, flags); 537 for (nbank = 0; nbank < 2; nbank++) { 538 bank = &voice->bank[nbank]; 539 memset(bank, 0, sizeof(*bank)); 540 bank->format = cpu_to_le32(format); 541 bank->base = cpu_to_le32(runtime->dma_addr); 542 bank->loop_end = cpu_to_le32(ypcm->buffer_size); 543 bank->lpfQ = cpu_to_le32(lpfQ); 544 bank->delta = 545 bank->delta_end = cpu_to_le32(delta); 546 bank->lpfK = 547 bank->lpfK_end = cpu_to_le32(lpfK); 548 bank->eg_gain = 549 bank->eg_gain_end = cpu_to_le32(0x40000000); 550 551 if (ypcm->output_front) { 552 if (use_left) { 553 bank->left_gain = 554 bank->left_gain_end = vol_left; 555 } 556 if (use_right) { 557 bank->right_gain = 558 bank->right_gain_end = vol_right; 559 } 560 } 561 if (ypcm->output_rear) { 562 if (!ypcm->swap_rear) { 563 if (use_left) { 564 bank->eff2_gain = 565 bank->eff2_gain_end = vol_left; 566 } 567 if (use_right) { 568 bank->eff3_gain = 569 bank->eff3_gain_end = vol_right; 570 } 571 } else { 572 /* The SPDIF out channels seem to be swapped, so we have 573 * to swap them here, too. The rear analog out channels 574 * will be wrong, but otherwise AC3 would not work. 575 */ 576 if (use_left) { 577 bank->eff3_gain = 578 bank->eff3_gain_end = vol_left; 579 } 580 if (use_right) { 581 bank->eff2_gain = 582 bank->eff2_gain_end = vol_right; 583 } 584 } 585 } 586 } 587} 588 589static int snd_ymfpci_ac3_init(struct snd_ymfpci *chip) 590{ 591 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev, 592 4096, &chip->ac3_tmp_base) < 0) 593 return -ENOMEM; 594 595 chip->bank_effect[3][0]->base = 596 chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr); 597 chip->bank_effect[3][0]->loop_end = 598 chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024); 599 chip->bank_effect[4][0]->base = 600 chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048); 601 chip->bank_effect[4][0]->loop_end = 602 chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024); 603 604 spin_lock_irq(&chip->reg_lock); 605 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 606 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3); 607 spin_unlock_irq(&chip->reg_lock); 608 return 0; 609} 610 611static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip) 612{ 613 spin_lock_irq(&chip->reg_lock); 614 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 615 snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3)); 616 spin_unlock_irq(&chip->reg_lock); 617 // snd_ymfpci_irq_wait(chip); 618 if (chip->ac3_tmp_base.area) { 619 snd_dma_free_pages(&chip->ac3_tmp_base); 620 chip->ac3_tmp_base.area = NULL; 621 } 622 return 0; 623} 624 625static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream, 626 struct snd_pcm_hw_params *hw_params) 627{ 628 struct snd_pcm_runtime *runtime = substream->runtime; 629 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 630 int err; 631 632 err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params)); 633 if (err < 0) 634 return err; 635 return 0; 636} 637 638static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream) 639{ 640 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 641 struct snd_pcm_runtime *runtime = substream->runtime; 642 struct snd_ymfpci_pcm *ypcm; 643 644 if (runtime->private_data == NULL) 645 return 0; 646 ypcm = runtime->private_data; 647 648 /* wait, until the PCI operations are not finished */ 649 snd_ymfpci_irq_wait(chip); 650 if (ypcm->voices[1]) { 651 snd_ymfpci_voice_free(chip, ypcm->voices[1]); 652 ypcm->voices[1] = NULL; 653 } 654 if (ypcm->voices[0]) { 655 snd_ymfpci_voice_free(chip, ypcm->voices[0]); 656 ypcm->voices[0] = NULL; 657 } 658 return 0; 659} 660 661static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream) 662{ 663 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 664 struct snd_pcm_runtime *runtime = substream->runtime; 665 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 666 struct snd_kcontrol *kctl; 667 unsigned int nvoice; 668 669 ypcm->period_size = runtime->period_size; 670 ypcm->buffer_size = runtime->buffer_size; 671 ypcm->period_pos = 0; 672 ypcm->last_pos = 0; 673 for (nvoice = 0; nvoice < runtime->channels; nvoice++) 674 snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime, 675 substream->pcm == chip->pcm); 676 677 if (substream->pcm == chip->pcm && !ypcm->use_441_slot) { 678 kctl = chip->pcm_mixer[substream->number].ctl; 679 kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 680 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id); 681 } 682 return 0; 683} 684 685static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream) 686{ 687 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 688 689 /* wait, until the PCI operations are not finished */ 690 snd_ymfpci_irq_wait(chip); 691 return 0; 692} 693 694static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream) 695{ 696 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 697 struct snd_pcm_runtime *runtime = substream->runtime; 698 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 699 struct snd_ymfpci_capture_bank * bank; 700 int nbank; 701 u32 rate, format; 702 703 ypcm->period_size = runtime->period_size; 704 ypcm->buffer_size = runtime->buffer_size; 705 ypcm->period_pos = 0; 706 ypcm->last_pos = 0; 707 ypcm->shift = 0; 708 rate = ((48000 * 4096) / runtime->rate) - 1; 709 format = 0; 710 if (runtime->channels == 2) { 711 format |= 2; 712 ypcm->shift++; 713 } 714 if (snd_pcm_format_width(runtime->format) == 8) 715 format |= 1; 716 else 717 ypcm->shift++; 718 switch (ypcm->capture_bank_number) { 719 case 0: 720 snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format); 721 snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate); 722 break; 723 case 1: 724 snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format); 725 snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate); 726 break; 727 } 728 for (nbank = 0; nbank < 2; nbank++) { 729 bank = chip->bank_capture[ypcm->capture_bank_number][nbank]; 730 bank->base = cpu_to_le32(runtime->dma_addr); 731 bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift); 732 bank->start = 0; 733 bank->num_of_loops = 0; 734 } 735 return 0; 736} 737 738static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream) 739{ 740 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 741 struct snd_pcm_runtime *runtime = substream->runtime; 742 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 743 struct snd_ymfpci_voice *voice = ypcm->voices[0]; 744 745 if (!(ypcm->running && voice)) 746 return 0; 747 return le32_to_cpu(voice->bank[chip->active_bank].start); 748} 749 750static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream) 751{ 752 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 753 struct snd_pcm_runtime *runtime = substream->runtime; 754 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 755 756 if (!ypcm->running) 757 return 0; 758 return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift; 759} 760 761static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip) 762{ 763 wait_queue_entry_t wait; 764 int loops = 4; 765 766 while (loops-- > 0) { 767 if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0) 768 continue; 769 init_waitqueue_entry(&wait, current); 770 add_wait_queue(&chip->interrupt_sleep, &wait); 771 atomic_inc(&chip->interrupt_sleep_count); 772 schedule_timeout_uninterruptible(msecs_to_jiffies(50)); 773 remove_wait_queue(&chip->interrupt_sleep, &wait); 774 } 775} 776 777static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id) 778{ 779 struct snd_ymfpci *chip = dev_id; 780 u32 status, nvoice, mode; 781 struct snd_ymfpci_voice *voice; 782 783 status = snd_ymfpci_readl(chip, YDSXGR_STATUS); 784 if (status & 0x80000000) { 785 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1; 786 spin_lock(&chip->voice_lock); 787 for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) { 788 voice = &chip->voices[nvoice]; 789 if (voice->interrupt) 790 voice->interrupt(chip, voice); 791 } 792 for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) { 793 if (chip->capture_substream[nvoice]) 794 snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]); 795 } 796#if 0 797 for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) { 798 if (chip->effect_substream[nvoice]) 799 snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]); 800 } 801#endif 802 spin_unlock(&chip->voice_lock); 803 spin_lock(&chip->reg_lock); 804 snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000); 805 mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2; 806 snd_ymfpci_writel(chip, YDSXGR_MODE, mode); 807 spin_unlock(&chip->reg_lock); 808 809 if (atomic_read(&chip->interrupt_sleep_count)) { 810 atomic_set(&chip->interrupt_sleep_count, 0); 811 wake_up(&chip->interrupt_sleep); 812 } 813 } 814 815 status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG); 816 if (status & 1) { 817 if (chip->timer) 818 snd_timer_interrupt(chip->timer, chip->timer_ticks); 819 } 820 snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status); 821 822 if (chip->rawmidi) 823 snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data); 824 return IRQ_HANDLED; 825} 826 827static const struct snd_pcm_hardware snd_ymfpci_playback = 828{ 829 .info = (SNDRV_PCM_INFO_MMAP | 830 SNDRV_PCM_INFO_MMAP_VALID | 831 SNDRV_PCM_INFO_INTERLEAVED | 832 SNDRV_PCM_INFO_BLOCK_TRANSFER | 833 SNDRV_PCM_INFO_PAUSE | 834 SNDRV_PCM_INFO_RESUME), 835 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 836 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 837 .rate_min = 8000, 838 .rate_max = 48000, 839 .channels_min = 1, 840 .channels_max = 2, 841 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 842 .period_bytes_min = 64, 843 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 844 .periods_min = 3, 845 .periods_max = 1024, 846 .fifo_size = 0, 847}; 848 849static const struct snd_pcm_hardware snd_ymfpci_capture = 850{ 851 .info = (SNDRV_PCM_INFO_MMAP | 852 SNDRV_PCM_INFO_MMAP_VALID | 853 SNDRV_PCM_INFO_INTERLEAVED | 854 SNDRV_PCM_INFO_BLOCK_TRANSFER | 855 SNDRV_PCM_INFO_PAUSE | 856 SNDRV_PCM_INFO_RESUME), 857 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 858 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 859 .rate_min = 8000, 860 .rate_max = 48000, 861 .channels_min = 1, 862 .channels_max = 2, 863 .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */ 864 .period_bytes_min = 64, 865 .period_bytes_max = 256 * 1024, /* FIXME: enough? */ 866 .periods_min = 3, 867 .periods_max = 1024, 868 .fifo_size = 0, 869}; 870 871static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime) 872{ 873 kfree(runtime->private_data); 874} 875 876static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream) 877{ 878 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 879 struct snd_pcm_runtime *runtime = substream->runtime; 880 struct snd_ymfpci_pcm *ypcm; 881 int err; 882 883 runtime->hw = snd_ymfpci_playback; 884 /* FIXME? True value is 256/48 = 5.33333 ms */ 885 err = snd_pcm_hw_constraint_minmax(runtime, 886 SNDRV_PCM_HW_PARAM_PERIOD_TIME, 887 5334, UINT_MAX); 888 if (err < 0) 889 return err; 890 err = snd_pcm_hw_rule_noresample(runtime, 48000); 891 if (err < 0) 892 return err; 893 894 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); 895 if (ypcm == NULL) 896 return -ENOMEM; 897 ypcm->chip = chip; 898 ypcm->type = PLAYBACK_VOICE; 899 ypcm->substream = substream; 900 runtime->private_data = ypcm; 901 runtime->private_free = snd_ymfpci_pcm_free_substream; 902 return 0; 903} 904 905/* call with spinlock held */ 906static void ymfpci_open_extension(struct snd_ymfpci *chip) 907{ 908 if (! chip->rear_opened) { 909 if (! chip->spdif_opened) /* set AC3 */ 910 snd_ymfpci_writel(chip, YDSXGR_MODE, 911 snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30)); 912 /* enable second codec (4CHEN) */ 913 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 914 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010); 915 } 916} 917 918/* call with spinlock held */ 919static void ymfpci_close_extension(struct snd_ymfpci *chip) 920{ 921 if (! chip->rear_opened) { 922 if (! chip->spdif_opened) 923 snd_ymfpci_writel(chip, YDSXGR_MODE, 924 snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30)); 925 snd_ymfpci_writew(chip, YDSXGR_SECCONFIG, 926 (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010); 927 } 928} 929 930static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream) 931{ 932 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 933 struct snd_pcm_runtime *runtime = substream->runtime; 934 struct snd_ymfpci_pcm *ypcm; 935 int err; 936 937 err = snd_ymfpci_playback_open_1(substream); 938 if (err < 0) 939 return err; 940 ypcm = runtime->private_data; 941 ypcm->output_front = 1; 942 ypcm->output_rear = chip->mode_dup4ch ? 1 : 0; 943 ypcm->swap_rear = 0; 944 spin_lock_irq(&chip->reg_lock); 945 if (ypcm->output_rear) { 946 ymfpci_open_extension(chip); 947 chip->rear_opened++; 948 } 949 spin_unlock_irq(&chip->reg_lock); 950 return 0; 951} 952 953static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream) 954{ 955 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 956 struct snd_pcm_runtime *runtime = substream->runtime; 957 struct snd_ymfpci_pcm *ypcm; 958 int err; 959 960 err = snd_ymfpci_playback_open_1(substream); 961 if (err < 0) 962 return err; 963 ypcm = runtime->private_data; 964 ypcm->output_front = 0; 965 ypcm->output_rear = 1; 966 ypcm->swap_rear = 1; 967 spin_lock_irq(&chip->reg_lock); 968 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 969 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2); 970 ymfpci_open_extension(chip); 971 chip->spdif_pcm_bits = chip->spdif_bits; 972 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 973 chip->spdif_opened++; 974 spin_unlock_irq(&chip->reg_lock); 975 976 chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; 977 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 978 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 979 return 0; 980} 981 982static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream) 983{ 984 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 985 struct snd_pcm_runtime *runtime = substream->runtime; 986 struct snd_ymfpci_pcm *ypcm; 987 int err; 988 989 err = snd_ymfpci_playback_open_1(substream); 990 if (err < 0) 991 return err; 992 ypcm = runtime->private_data; 993 ypcm->output_front = 0; 994 ypcm->output_rear = 1; 995 ypcm->swap_rear = 0; 996 spin_lock_irq(&chip->reg_lock); 997 ymfpci_open_extension(chip); 998 chip->rear_opened++; 999 spin_unlock_irq(&chip->reg_lock); 1000 return 0; 1001} 1002 1003static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream, 1004 u32 capture_bank_number) 1005{ 1006 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1007 struct snd_pcm_runtime *runtime = substream->runtime; 1008 struct snd_ymfpci_pcm *ypcm; 1009 int err; 1010 1011 runtime->hw = snd_ymfpci_capture; 1012 /* FIXME? True value is 256/48 = 5.33333 ms */ 1013 err = snd_pcm_hw_constraint_minmax(runtime, 1014 SNDRV_PCM_HW_PARAM_PERIOD_TIME, 1015 5334, UINT_MAX); 1016 if (err < 0) 1017 return err; 1018 err = snd_pcm_hw_rule_noresample(runtime, 48000); 1019 if (err < 0) 1020 return err; 1021 1022 ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL); 1023 if (ypcm == NULL) 1024 return -ENOMEM; 1025 ypcm->chip = chip; 1026 ypcm->type = capture_bank_number + CAPTURE_REC; 1027 ypcm->substream = substream; 1028 ypcm->capture_bank_number = capture_bank_number; 1029 chip->capture_substream[capture_bank_number] = substream; 1030 runtime->private_data = ypcm; 1031 runtime->private_free = snd_ymfpci_pcm_free_substream; 1032 snd_ymfpci_hw_start(chip); 1033 return 0; 1034} 1035 1036static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream) 1037{ 1038 return snd_ymfpci_capture_open(substream, 0); 1039} 1040 1041static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream) 1042{ 1043 return snd_ymfpci_capture_open(substream, 1); 1044} 1045 1046static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream) 1047{ 1048 return 0; 1049} 1050 1051static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream) 1052{ 1053 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1054 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 1055 1056 spin_lock_irq(&chip->reg_lock); 1057 if (ypcm->output_rear && chip->rear_opened > 0) { 1058 chip->rear_opened--; 1059 ymfpci_close_extension(chip); 1060 } 1061 spin_unlock_irq(&chip->reg_lock); 1062 return snd_ymfpci_playback_close_1(substream); 1063} 1064 1065static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream) 1066{ 1067 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1068 1069 spin_lock_irq(&chip->reg_lock); 1070 chip->spdif_opened = 0; 1071 ymfpci_close_extension(chip); 1072 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 1073 snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2); 1074 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1075 spin_unlock_irq(&chip->reg_lock); 1076 chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; 1077 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE | 1078 SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id); 1079 return snd_ymfpci_playback_close_1(substream); 1080} 1081 1082static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream) 1083{ 1084 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1085 1086 spin_lock_irq(&chip->reg_lock); 1087 if (chip->rear_opened > 0) { 1088 chip->rear_opened--; 1089 ymfpci_close_extension(chip); 1090 } 1091 spin_unlock_irq(&chip->reg_lock); 1092 return snd_ymfpci_playback_close_1(substream); 1093} 1094 1095static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream) 1096{ 1097 struct snd_ymfpci *chip = snd_pcm_substream_chip(substream); 1098 struct snd_pcm_runtime *runtime = substream->runtime; 1099 struct snd_ymfpci_pcm *ypcm = runtime->private_data; 1100 1101 if (ypcm != NULL) { 1102 chip->capture_substream[ypcm->capture_bank_number] = NULL; 1103 snd_ymfpci_hw_stop(chip); 1104 } 1105 return 0; 1106} 1107 1108static const struct snd_pcm_ops snd_ymfpci_playback_ops = { 1109 .open = snd_ymfpci_playback_open, 1110 .close = snd_ymfpci_playback_close, 1111 .hw_params = snd_ymfpci_playback_hw_params, 1112 .hw_free = snd_ymfpci_playback_hw_free, 1113 .prepare = snd_ymfpci_playback_prepare, 1114 .trigger = snd_ymfpci_playback_trigger, 1115 .pointer = snd_ymfpci_playback_pointer, 1116}; 1117 1118static const struct snd_pcm_ops snd_ymfpci_capture_rec_ops = { 1119 .open = snd_ymfpci_capture_rec_open, 1120 .close = snd_ymfpci_capture_close, 1121 .hw_free = snd_ymfpci_capture_hw_free, 1122 .prepare = snd_ymfpci_capture_prepare, 1123 .trigger = snd_ymfpci_capture_trigger, 1124 .pointer = snd_ymfpci_capture_pointer, 1125}; 1126 1127int snd_ymfpci_pcm(struct snd_ymfpci *chip, int device) 1128{ 1129 struct snd_pcm *pcm; 1130 int err; 1131 1132 err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm); 1133 if (err < 0) 1134 return err; 1135 pcm->private_data = chip; 1136 1137 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops); 1138 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops); 1139 1140 /* global setup */ 1141 pcm->info_flags = 0; 1142 strcpy(pcm->name, "YMFPCI"); 1143 chip->pcm = pcm; 1144 1145 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1146 &chip->pci->dev, 64*1024, 256*1024); 1147 1148 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1149 snd_pcm_std_chmaps, 2, 0, NULL); 1150} 1151 1152static const struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = { 1153 .open = snd_ymfpci_capture_ac97_open, 1154 .close = snd_ymfpci_capture_close, 1155 .hw_free = snd_ymfpci_capture_hw_free, 1156 .prepare = snd_ymfpci_capture_prepare, 1157 .trigger = snd_ymfpci_capture_trigger, 1158 .pointer = snd_ymfpci_capture_pointer, 1159}; 1160 1161int snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device) 1162{ 1163 struct snd_pcm *pcm; 1164 int err; 1165 1166 err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm); 1167 if (err < 0) 1168 return err; 1169 pcm->private_data = chip; 1170 1171 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops); 1172 1173 /* global setup */ 1174 pcm->info_flags = 0; 1175 sprintf(pcm->name, "YMFPCI - %s", 1176 chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97"); 1177 chip->pcm2 = pcm; 1178 1179 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1180 &chip->pci->dev, 64*1024, 256*1024); 1181 1182 return 0; 1183} 1184 1185static const struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = { 1186 .open = snd_ymfpci_playback_spdif_open, 1187 .close = snd_ymfpci_playback_spdif_close, 1188 .hw_params = snd_ymfpci_playback_hw_params, 1189 .hw_free = snd_ymfpci_playback_hw_free, 1190 .prepare = snd_ymfpci_playback_prepare, 1191 .trigger = snd_ymfpci_playback_trigger, 1192 .pointer = snd_ymfpci_playback_pointer, 1193}; 1194 1195int snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device) 1196{ 1197 struct snd_pcm *pcm; 1198 int err; 1199 1200 err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm); 1201 if (err < 0) 1202 return err; 1203 pcm->private_data = chip; 1204 1205 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops); 1206 1207 /* global setup */ 1208 pcm->info_flags = 0; 1209 strcpy(pcm->name, "YMFPCI - IEC958"); 1210 chip->pcm_spdif = pcm; 1211 1212 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1213 &chip->pci->dev, 64*1024, 256*1024); 1214 1215 return 0; 1216} 1217 1218static const struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = { 1219 .open = snd_ymfpci_playback_4ch_open, 1220 .close = snd_ymfpci_playback_4ch_close, 1221 .hw_params = snd_ymfpci_playback_hw_params, 1222 .hw_free = snd_ymfpci_playback_hw_free, 1223 .prepare = snd_ymfpci_playback_prepare, 1224 .trigger = snd_ymfpci_playback_trigger, 1225 .pointer = snd_ymfpci_playback_pointer, 1226}; 1227 1228static const struct snd_pcm_chmap_elem surround_map[] = { 1229 { .channels = 1, 1230 .map = { SNDRV_CHMAP_MONO } }, 1231 { .channels = 2, 1232 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 1233 { } 1234}; 1235 1236int snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device) 1237{ 1238 struct snd_pcm *pcm; 1239 int err; 1240 1241 err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm); 1242 if (err < 0) 1243 return err; 1244 pcm->private_data = chip; 1245 1246 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops); 1247 1248 /* global setup */ 1249 pcm->info_flags = 0; 1250 strcpy(pcm->name, "YMFPCI - Rear PCM"); 1251 chip->pcm_4ch = pcm; 1252 1253 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1254 &chip->pci->dev, 64*1024, 256*1024); 1255 1256 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1257 surround_map, 2, 0, NULL); 1258} 1259 1260static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1261{ 1262 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1263 uinfo->count = 1; 1264 return 0; 1265} 1266 1267static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol, 1268 struct snd_ctl_elem_value *ucontrol) 1269{ 1270 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1271 1272 spin_lock_irq(&chip->reg_lock); 1273 ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff; 1274 ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff; 1275 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000; 1276 spin_unlock_irq(&chip->reg_lock); 1277 return 0; 1278} 1279 1280static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol, 1281 struct snd_ctl_elem_value *ucontrol) 1282{ 1283 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1284 unsigned int val; 1285 int change; 1286 1287 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1288 (ucontrol->value.iec958.status[1] << 8); 1289 spin_lock_irq(&chip->reg_lock); 1290 change = chip->spdif_bits != val; 1291 chip->spdif_bits = val; 1292 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL) 1293 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 1294 spin_unlock_irq(&chip->reg_lock); 1295 return change; 1296} 1297 1298static const struct snd_kcontrol_new snd_ymfpci_spdif_default = 1299{ 1300 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1301 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1302 .info = snd_ymfpci_spdif_default_info, 1303 .get = snd_ymfpci_spdif_default_get, 1304 .put = snd_ymfpci_spdif_default_put 1305}; 1306 1307static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1308{ 1309 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1310 uinfo->count = 1; 1311 return 0; 1312} 1313 1314static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol, 1315 struct snd_ctl_elem_value *ucontrol) 1316{ 1317 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1318 1319 spin_lock_irq(&chip->reg_lock); 1320 ucontrol->value.iec958.status[0] = 0x3e; 1321 ucontrol->value.iec958.status[1] = 0xff; 1322 spin_unlock_irq(&chip->reg_lock); 1323 return 0; 1324} 1325 1326static const struct snd_kcontrol_new snd_ymfpci_spdif_mask = 1327{ 1328 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1329 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1330 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1331 .info = snd_ymfpci_spdif_mask_info, 1332 .get = snd_ymfpci_spdif_mask_get, 1333}; 1334 1335static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1336{ 1337 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1338 uinfo->count = 1; 1339 return 0; 1340} 1341 1342static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol, 1343 struct snd_ctl_elem_value *ucontrol) 1344{ 1345 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1346 1347 spin_lock_irq(&chip->reg_lock); 1348 ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff; 1349 ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff; 1350 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000; 1351 spin_unlock_irq(&chip->reg_lock); 1352 return 0; 1353} 1354 1355static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol, 1356 struct snd_ctl_elem_value *ucontrol) 1357{ 1358 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1359 unsigned int val; 1360 int change; 1361 1362 val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) | 1363 (ucontrol->value.iec958.status[1] << 8); 1364 spin_lock_irq(&chip->reg_lock); 1365 change = chip->spdif_pcm_bits != val; 1366 chip->spdif_pcm_bits = val; 1367 if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2)) 1368 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits); 1369 spin_unlock_irq(&chip->reg_lock); 1370 return change; 1371} 1372 1373static const struct snd_kcontrol_new snd_ymfpci_spdif_stream = 1374{ 1375 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1376 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1377 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1378 .info = snd_ymfpci_spdif_stream_info, 1379 .get = snd_ymfpci_spdif_stream_get, 1380 .put = snd_ymfpci_spdif_stream_put 1381}; 1382 1383static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info) 1384{ 1385 static const char *const texts[3] = {"AC'97", "IEC958", "ZV Port"}; 1386 1387 return snd_ctl_enum_info(info, 1, 3, texts); 1388} 1389 1390static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value) 1391{ 1392 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1393 u16 reg; 1394 1395 spin_lock_irq(&chip->reg_lock); 1396 reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1397 spin_unlock_irq(&chip->reg_lock); 1398 if (!(reg & 0x100)) 1399 value->value.enumerated.item[0] = 0; 1400 else 1401 value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0); 1402 return 0; 1403} 1404 1405static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value) 1406{ 1407 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1408 u16 reg, old_reg; 1409 1410 spin_lock_irq(&chip->reg_lock); 1411 old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 1412 if (value->value.enumerated.item[0] == 0) 1413 reg = old_reg & ~0x100; 1414 else 1415 reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9); 1416 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg); 1417 spin_unlock_irq(&chip->reg_lock); 1418 return reg != old_reg; 1419} 1420 1421static const struct snd_kcontrol_new snd_ymfpci_drec_source = { 1422 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, 1423 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1424 .name = "Direct Recording Source", 1425 .info = snd_ymfpci_drec_source_info, 1426 .get = snd_ymfpci_drec_source_get, 1427 .put = snd_ymfpci_drec_source_put 1428}; 1429 1430/* 1431 * Mixer controls 1432 */ 1433 1434#define YMFPCI_SINGLE(xname, xindex, reg, shift) \ 1435{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1436 .info = snd_ymfpci_info_single, \ 1437 .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \ 1438 .private_value = ((reg) | ((shift) << 16)) } 1439 1440#define snd_ymfpci_info_single snd_ctl_boolean_mono_info 1441 1442static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol, 1443 struct snd_ctl_elem_value *ucontrol) 1444{ 1445 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1446 int reg = kcontrol->private_value & 0xffff; 1447 unsigned int shift = (kcontrol->private_value >> 16) & 0xff; 1448 unsigned int mask = 1; 1449 1450 switch (reg) { 1451 case YDSXGR_SPDIFOUTCTRL: break; 1452 case YDSXGR_SPDIFINCTRL: break; 1453 default: return -EINVAL; 1454 } 1455 ucontrol->value.integer.value[0] = 1456 (snd_ymfpci_readl(chip, reg) >> shift) & mask; 1457 return 0; 1458} 1459 1460static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol, 1461 struct snd_ctl_elem_value *ucontrol) 1462{ 1463 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1464 int reg = kcontrol->private_value & 0xffff; 1465 unsigned int shift = (kcontrol->private_value >> 16) & 0xff; 1466 unsigned int mask = 1; 1467 int change; 1468 unsigned int val, oval; 1469 1470 switch (reg) { 1471 case YDSXGR_SPDIFOUTCTRL: break; 1472 case YDSXGR_SPDIFINCTRL: break; 1473 default: return -EINVAL; 1474 } 1475 val = (ucontrol->value.integer.value[0] & mask); 1476 val <<= shift; 1477 spin_lock_irq(&chip->reg_lock); 1478 oval = snd_ymfpci_readl(chip, reg); 1479 val = (oval & ~(mask << shift)) | val; 1480 change = val != oval; 1481 snd_ymfpci_writel(chip, reg, val); 1482 spin_unlock_irq(&chip->reg_lock); 1483 return change; 1484} 1485 1486static const DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0); 1487 1488#define YMFPCI_DOUBLE(xname, xindex, reg) \ 1489{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1490 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ 1491 .info = snd_ymfpci_info_double, \ 1492 .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \ 1493 .private_value = reg, \ 1494 .tlv = { .p = db_scale_native } } 1495 1496static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1497{ 1498 unsigned int reg = kcontrol->private_value; 1499 1500 if (reg < 0x80 || reg >= 0xc0) 1501 return -EINVAL; 1502 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1503 uinfo->count = 2; 1504 uinfo->value.integer.min = 0; 1505 uinfo->value.integer.max = 16383; 1506 return 0; 1507} 1508 1509static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1510{ 1511 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1512 unsigned int reg = kcontrol->private_value; 1513 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1514 unsigned int val; 1515 1516 if (reg < 0x80 || reg >= 0xc0) 1517 return -EINVAL; 1518 spin_lock_irq(&chip->reg_lock); 1519 val = snd_ymfpci_readl(chip, reg); 1520 spin_unlock_irq(&chip->reg_lock); 1521 ucontrol->value.integer.value[0] = (val >> shift_left) & mask; 1522 ucontrol->value.integer.value[1] = (val >> shift_right) & mask; 1523 return 0; 1524} 1525 1526static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1527{ 1528 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1529 unsigned int reg = kcontrol->private_value; 1530 unsigned int shift_left = 0, shift_right = 16, mask = 16383; 1531 int change; 1532 unsigned int val1, val2, oval; 1533 1534 if (reg < 0x80 || reg >= 0xc0) 1535 return -EINVAL; 1536 val1 = ucontrol->value.integer.value[0] & mask; 1537 val2 = ucontrol->value.integer.value[1] & mask; 1538 val1 <<= shift_left; 1539 val2 <<= shift_right; 1540 spin_lock_irq(&chip->reg_lock); 1541 oval = snd_ymfpci_readl(chip, reg); 1542 val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2; 1543 change = val1 != oval; 1544 snd_ymfpci_writel(chip, reg, val1); 1545 spin_unlock_irq(&chip->reg_lock); 1546 return change; 1547} 1548 1549static int snd_ymfpci_put_nativedacvol(struct snd_kcontrol *kcontrol, 1550 struct snd_ctl_elem_value *ucontrol) 1551{ 1552 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1553 unsigned int reg = YDSXGR_NATIVEDACOUTVOL; 1554 unsigned int reg2 = YDSXGR_BUF441OUTVOL; 1555 int change; 1556 unsigned int value, oval; 1557 1558 value = ucontrol->value.integer.value[0] & 0x3fff; 1559 value |= (ucontrol->value.integer.value[1] & 0x3fff) << 16; 1560 spin_lock_irq(&chip->reg_lock); 1561 oval = snd_ymfpci_readl(chip, reg); 1562 change = value != oval; 1563 snd_ymfpci_writel(chip, reg, value); 1564 snd_ymfpci_writel(chip, reg2, value); 1565 spin_unlock_irq(&chip->reg_lock); 1566 return change; 1567} 1568 1569/* 1570 * 4ch duplication 1571 */ 1572#define snd_ymfpci_info_dup4ch snd_ctl_boolean_mono_info 1573 1574static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1575{ 1576 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1577 ucontrol->value.integer.value[0] = chip->mode_dup4ch; 1578 return 0; 1579} 1580 1581static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1582{ 1583 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1584 int change; 1585 change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch); 1586 if (change) 1587 chip->mode_dup4ch = !!ucontrol->value.integer.value[0]; 1588 return change; 1589} 1590 1591static const struct snd_kcontrol_new snd_ymfpci_dup4ch = { 1592 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1593 .name = "4ch Duplication", 1594 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, 1595 .info = snd_ymfpci_info_dup4ch, 1596 .get = snd_ymfpci_get_dup4ch, 1597 .put = snd_ymfpci_put_dup4ch, 1598}; 1599 1600static const struct snd_kcontrol_new snd_ymfpci_controls[] = { 1601{ 1602 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1603 .name = "Wave Playback Volume", 1604 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1605 SNDRV_CTL_ELEM_ACCESS_TLV_READ, 1606 .info = snd_ymfpci_info_double, 1607 .get = snd_ymfpci_get_double, 1608 .put = snd_ymfpci_put_nativedacvol, 1609 .private_value = YDSXGR_NATIVEDACOUTVOL, 1610 .tlv = { .p = db_scale_native }, 1611}, 1612YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL), 1613YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL), 1614YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL), 1615YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL), 1616YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL), 1617YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL), 1618YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL), 1619YMFPCI_DOUBLE("FM Legacy Playback Volume", 0, YDSXGR_LEGACYOUTVOL), 1620YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL), 1621YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL), 1622YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL), 1623YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL), 1624YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0), 1625YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0), 1626YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4), 1627}; 1628 1629 1630/* 1631 * GPIO 1632 */ 1633 1634static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin) 1635{ 1636 u16 reg, mode; 1637 unsigned long flags; 1638 1639 spin_lock_irqsave(&chip->reg_lock, flags); 1640 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1641 reg &= ~(1 << (pin + 8)); 1642 reg |= (1 << pin); 1643 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1644 /* set the level mode for input line */ 1645 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG); 1646 mode &= ~(3 << (pin * 2)); 1647 snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode); 1648 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1649 mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS); 1650 spin_unlock_irqrestore(&chip->reg_lock, flags); 1651 return (mode >> pin) & 1; 1652} 1653 1654static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable) 1655{ 1656 u16 reg; 1657 unsigned long flags; 1658 1659 spin_lock_irqsave(&chip->reg_lock, flags); 1660 reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE); 1661 reg &= ~(1 << pin); 1662 reg &= ~(1 << (pin + 8)); 1663 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg); 1664 snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin); 1665 snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8))); 1666 spin_unlock_irqrestore(&chip->reg_lock, flags); 1667 1668 return 0; 1669} 1670 1671#define snd_ymfpci_gpio_sw_info snd_ctl_boolean_mono_info 1672 1673static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1674{ 1675 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1676 int pin = (int)kcontrol->private_value; 1677 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1678 return 0; 1679} 1680 1681static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1682{ 1683 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1684 int pin = (int)kcontrol->private_value; 1685 1686 if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) { 1687 snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]); 1688 ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin); 1689 return 1; 1690 } 1691 return 0; 1692} 1693 1694static const struct snd_kcontrol_new snd_ymfpci_rear_shared = { 1695 .name = "Shared Rear/Line-In Switch", 1696 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1697 .info = snd_ymfpci_gpio_sw_info, 1698 .get = snd_ymfpci_gpio_sw_get, 1699 .put = snd_ymfpci_gpio_sw_put, 1700 .private_value = 2, 1701}; 1702 1703/* 1704 * PCM voice volume 1705 */ 1706 1707static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol, 1708 struct snd_ctl_elem_info *uinfo) 1709{ 1710 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1711 uinfo->count = 2; 1712 uinfo->value.integer.min = 0; 1713 uinfo->value.integer.max = 0x8000; 1714 return 0; 1715} 1716 1717static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol, 1718 struct snd_ctl_elem_value *ucontrol) 1719{ 1720 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1721 unsigned int subs = kcontrol->id.subdevice; 1722 1723 ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left; 1724 ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right; 1725 return 0; 1726} 1727 1728static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol, 1729 struct snd_ctl_elem_value *ucontrol) 1730{ 1731 struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol); 1732 unsigned int subs = kcontrol->id.subdevice; 1733 struct snd_pcm_substream *substream; 1734 unsigned long flags; 1735 1736 if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left || 1737 ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) { 1738 chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0]; 1739 chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1]; 1740 if (chip->pcm_mixer[subs].left > 0x8000) 1741 chip->pcm_mixer[subs].left = 0x8000; 1742 if (chip->pcm_mixer[subs].right > 0x8000) 1743 chip->pcm_mixer[subs].right = 0x8000; 1744 1745 substream = (struct snd_pcm_substream *)kcontrol->private_value; 1746 spin_lock_irqsave(&chip->voice_lock, flags); 1747 if (substream->runtime && substream->runtime->private_data) { 1748 struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data; 1749 if (!ypcm->use_441_slot) 1750 ypcm->update_pcm_vol = 2; 1751 } 1752 spin_unlock_irqrestore(&chip->voice_lock, flags); 1753 return 1; 1754 } 1755 return 0; 1756} 1757 1758static const struct snd_kcontrol_new snd_ymfpci_pcm_volume = { 1759 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1760 .name = "PCM Playback Volume", 1761 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | 1762 SNDRV_CTL_ELEM_ACCESS_INACTIVE, 1763 .info = snd_ymfpci_pcm_vol_info, 1764 .get = snd_ymfpci_pcm_vol_get, 1765 .put = snd_ymfpci_pcm_vol_put, 1766}; 1767 1768 1769/* 1770 * Mixer routines 1771 */ 1772 1773static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus) 1774{ 1775 struct snd_ymfpci *chip = bus->private_data; 1776 chip->ac97_bus = NULL; 1777} 1778 1779static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97) 1780{ 1781 struct snd_ymfpci *chip = ac97->private_data; 1782 chip->ac97 = NULL; 1783} 1784 1785int snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch) 1786{ 1787 struct snd_ac97_template ac97; 1788 struct snd_kcontrol *kctl; 1789 struct snd_pcm_substream *substream; 1790 unsigned int idx; 1791 int err; 1792 static const struct snd_ac97_bus_ops ops = { 1793 .write = snd_ymfpci_codec_write, 1794 .read = snd_ymfpci_codec_read, 1795 }; 1796 1797 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus); 1798 if (err < 0) 1799 return err; 1800 chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus; 1801 chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */ 1802 1803 memset(&ac97, 0, sizeof(ac97)); 1804 ac97.private_data = chip; 1805 ac97.private_free = snd_ymfpci_mixer_free_ac97; 1806 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97); 1807 if (err < 0) 1808 return err; 1809 1810 /* to be sure */ 1811 snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS, 1812 AC97_EA_VRA|AC97_EA_VRM, 0); 1813 1814 for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) { 1815 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip)); 1816 if (err < 0) 1817 return err; 1818 } 1819 if (chip->ac97->ext_id & AC97_EI_SDAC) { 1820 kctl = snd_ctl_new1(&snd_ymfpci_dup4ch, chip); 1821 err = snd_ctl_add(chip->card, kctl); 1822 if (err < 0) 1823 return err; 1824 } 1825 1826 /* add S/PDIF control */ 1827 if (snd_BUG_ON(!chip->pcm_spdif)) 1828 return -ENXIO; 1829 kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip); 1830 err = snd_ctl_add(chip->card, kctl); 1831 if (err < 0) 1832 return err; 1833 kctl->id.device = chip->pcm_spdif->device; 1834 kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip); 1835 err = snd_ctl_add(chip->card, kctl); 1836 if (err < 0) 1837 return err; 1838 kctl->id.device = chip->pcm_spdif->device; 1839 kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip); 1840 err = snd_ctl_add(chip->card, kctl); 1841 if (err < 0) 1842 return err; 1843 kctl->id.device = chip->pcm_spdif->device; 1844 chip->spdif_pcm_ctl = kctl; 1845 1846 /* direct recording source */ 1847 if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754) { 1848 kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip); 1849 err = snd_ctl_add(chip->card, kctl); 1850 if (err < 0) 1851 return err; 1852 } 1853 1854 /* 1855 * shared rear/line-in 1856 */ 1857 if (rear_switch) { 1858 err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip)); 1859 if (err < 0) 1860 return err; 1861 } 1862 1863 /* per-voice volume */ 1864 substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; 1865 for (idx = 0; idx < 32; ++idx) { 1866 kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip); 1867 if (!kctl) 1868 return -ENOMEM; 1869 kctl->id.device = chip->pcm->device; 1870 kctl->id.subdevice = idx; 1871 kctl->private_value = (unsigned long)substream; 1872 err = snd_ctl_add(chip->card, kctl); 1873 if (err < 0) 1874 return err; 1875 chip->pcm_mixer[idx].left = 0x8000; 1876 chip->pcm_mixer[idx].right = 0x8000; 1877 chip->pcm_mixer[idx].ctl = kctl; 1878 substream = substream->next; 1879 } 1880 1881 return 0; 1882} 1883 1884 1885/* 1886 * timer 1887 */ 1888 1889static int snd_ymfpci_timer_start(struct snd_timer *timer) 1890{ 1891 struct snd_ymfpci *chip; 1892 unsigned long flags; 1893 unsigned int count; 1894 1895 chip = snd_timer_chip(timer); 1896 spin_lock_irqsave(&chip->reg_lock, flags); 1897 if (timer->sticks > 1) { 1898 chip->timer_ticks = timer->sticks; 1899 count = timer->sticks - 1; 1900 } else { 1901 /* 1902 * Divisor 1 is not allowed; fake it by using divisor 2 and 1903 * counting two ticks for each interrupt. 1904 */ 1905 chip->timer_ticks = 2; 1906 count = 2 - 1; 1907 } 1908 snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count); 1909 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03); 1910 spin_unlock_irqrestore(&chip->reg_lock, flags); 1911 return 0; 1912} 1913 1914static int snd_ymfpci_timer_stop(struct snd_timer *timer) 1915{ 1916 struct snd_ymfpci *chip; 1917 unsigned long flags; 1918 1919 chip = snd_timer_chip(timer); 1920 spin_lock_irqsave(&chip->reg_lock, flags); 1921 snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00); 1922 spin_unlock_irqrestore(&chip->reg_lock, flags); 1923 return 0; 1924} 1925 1926static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer, 1927 unsigned long *num, unsigned long *den) 1928{ 1929 *num = 1; 1930 *den = 96000; 1931 return 0; 1932} 1933 1934static const struct snd_timer_hardware snd_ymfpci_timer_hw = { 1935 .flags = SNDRV_TIMER_HW_AUTO, 1936 .resolution = 10417, /* 1 / 96 kHz = 10.41666...us */ 1937 .ticks = 0x10000, 1938 .start = snd_ymfpci_timer_start, 1939 .stop = snd_ymfpci_timer_stop, 1940 .precise_resolution = snd_ymfpci_timer_precise_resolution, 1941}; 1942 1943int snd_ymfpci_timer(struct snd_ymfpci *chip, int device) 1944{ 1945 struct snd_timer *timer = NULL; 1946 struct snd_timer_id tid; 1947 int err; 1948 1949 tid.dev_class = SNDRV_TIMER_CLASS_CARD; 1950 tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; 1951 tid.card = chip->card->number; 1952 tid.device = device; 1953 tid.subdevice = 0; 1954 err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer); 1955 if (err >= 0) { 1956 strcpy(timer->name, "YMFPCI timer"); 1957 timer->private_data = chip; 1958 timer->hw = snd_ymfpci_timer_hw; 1959 } 1960 chip->timer = timer; 1961 return err; 1962} 1963 1964 1965/* 1966 * proc interface 1967 */ 1968 1969static void snd_ymfpci_proc_read(struct snd_info_entry *entry, 1970 struct snd_info_buffer *buffer) 1971{ 1972 struct snd_ymfpci *chip = entry->private_data; 1973 int i; 1974 1975 snd_iprintf(buffer, "YMFPCI\n\n"); 1976 for (i = 0; i <= YDSXGR_WORKBASE; i += 4) 1977 snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i)); 1978} 1979 1980static int snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip) 1981{ 1982 return snd_card_ro_proc_new(card, "ymfpci", chip, snd_ymfpci_proc_read); 1983} 1984 1985/* 1986 * initialization routines 1987 */ 1988 1989static void snd_ymfpci_aclink_reset(struct pci_dev * pci) 1990{ 1991 u8 cmd; 1992 1993 pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd); 1994#if 0 // force to reset 1995 if (cmd & 0x03) { 1996#endif 1997 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 1998 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03); 1999 pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc); 2000 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0); 2001 pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0); 2002#if 0 2003 } 2004#endif 2005} 2006 2007static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip) 2008{ 2009 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001); 2010} 2011 2012static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip) 2013{ 2014 u32 val; 2015 int timeout = 1000; 2016 2017 val = snd_ymfpci_readl(chip, YDSXGR_CONFIG); 2018 if (val) 2019 snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000); 2020 while (timeout-- > 0) { 2021 val = snd_ymfpci_readl(chip, YDSXGR_STATUS); 2022 if ((val & 0x00000002) == 0) 2023 break; 2024 } 2025} 2026 2027static int snd_ymfpci_request_firmware(struct snd_ymfpci *chip) 2028{ 2029 int err, is_1e; 2030 const char *name; 2031 2032 err = request_firmware(&chip->dsp_microcode, "yamaha/ds1_dsp.fw", 2033 &chip->pci->dev); 2034 if (err >= 0) { 2035 if (chip->dsp_microcode->size != YDSXG_DSPLENGTH) { 2036 dev_err(chip->card->dev, 2037 "DSP microcode has wrong size\n"); 2038 err = -EINVAL; 2039 } 2040 } 2041 if (err < 0) 2042 return err; 2043 is_1e = chip->device_id == PCI_DEVICE_ID_YAMAHA_724F || 2044 chip->device_id == PCI_DEVICE_ID_YAMAHA_740C || 2045 chip->device_id == PCI_DEVICE_ID_YAMAHA_744 || 2046 chip->device_id == PCI_DEVICE_ID_YAMAHA_754; 2047 name = is_1e ? "yamaha/ds1e_ctrl.fw" : "yamaha/ds1_ctrl.fw"; 2048 err = request_firmware(&chip->controller_microcode, name, 2049 &chip->pci->dev); 2050 if (err >= 0) { 2051 if (chip->controller_microcode->size != YDSXG_CTRLLENGTH) { 2052 dev_err(chip->card->dev, 2053 "controller microcode has wrong size\n"); 2054 err = -EINVAL; 2055 } 2056 } 2057 if (err < 0) 2058 return err; 2059 return 0; 2060} 2061 2062MODULE_FIRMWARE("yamaha/ds1_dsp.fw"); 2063MODULE_FIRMWARE("yamaha/ds1_ctrl.fw"); 2064MODULE_FIRMWARE("yamaha/ds1e_ctrl.fw"); 2065 2066static void snd_ymfpci_download_image(struct snd_ymfpci *chip) 2067{ 2068 int i; 2069 u16 ctrl; 2070 const __le32 *inst; 2071 2072 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000); 2073 snd_ymfpci_disable_dsp(chip); 2074 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000); 2075 snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000); 2076 snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000); 2077 snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000); 2078 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000); 2079 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000); 2080 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000); 2081 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 2082 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 2083 2084 /* setup DSP instruction code */ 2085 inst = (const __le32 *)chip->dsp_microcode->data; 2086 for (i = 0; i < YDSXG_DSPLENGTH / 4; i++) 2087 snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), 2088 le32_to_cpu(inst[i])); 2089 2090 /* setup control instruction code */ 2091 inst = (const __le32 *)chip->controller_microcode->data; 2092 for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++) 2093 snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), 2094 le32_to_cpu(inst[i])); 2095 2096 snd_ymfpci_enable_dsp(chip); 2097} 2098 2099static int snd_ymfpci_memalloc(struct snd_ymfpci *chip) 2100{ 2101 long size, playback_ctrl_size; 2102 int voice, bank, reg; 2103 u8 *ptr; 2104 dma_addr_t ptr_addr; 2105 2106 playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES; 2107 chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2; 2108 chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2; 2109 chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2; 2110 chip->work_size = YDSXG_DEFAULT_WORK_SIZE; 2111 2112 size = ALIGN(playback_ctrl_size, 0x100) + 2113 ALIGN(chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES, 0x100) + 2114 ALIGN(chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES, 0x100) + 2115 ALIGN(chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES, 0x100) + 2116 chip->work_size; 2117 /* work_ptr must be aligned to 256 bytes, but it's already 2118 covered with the kernel page allocation mechanism */ 2119 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev, 2120 size, &chip->work_ptr) < 0) 2121 return -ENOMEM; 2122 ptr = chip->work_ptr.area; 2123 ptr_addr = chip->work_ptr.addr; 2124 memset(ptr, 0, size); /* for sure */ 2125 2126 chip->bank_base_playback = ptr; 2127 chip->bank_base_playback_addr = ptr_addr; 2128 chip->ctrl_playback = (__le32 *)ptr; 2129 chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES); 2130 ptr += ALIGN(playback_ctrl_size, 0x100); 2131 ptr_addr += ALIGN(playback_ctrl_size, 0x100); 2132 for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) { 2133 chip->voices[voice].number = voice; 2134 chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr; 2135 chip->voices[voice].bank_addr = ptr_addr; 2136 for (bank = 0; bank < 2; bank++) { 2137 chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr; 2138 ptr += chip->bank_size_playback; 2139 ptr_addr += chip->bank_size_playback; 2140 } 2141 } 2142 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2143 ptr_addr = ALIGN(ptr_addr, 0x100); 2144 chip->bank_base_capture = ptr; 2145 chip->bank_base_capture_addr = ptr_addr; 2146 for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++) 2147 for (bank = 0; bank < 2; bank++) { 2148 chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr; 2149 ptr += chip->bank_size_capture; 2150 ptr_addr += chip->bank_size_capture; 2151 } 2152 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2153 ptr_addr = ALIGN(ptr_addr, 0x100); 2154 chip->bank_base_effect = ptr; 2155 chip->bank_base_effect_addr = ptr_addr; 2156 for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++) 2157 for (bank = 0; bank < 2; bank++) { 2158 chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr; 2159 ptr += chip->bank_size_effect; 2160 ptr_addr += chip->bank_size_effect; 2161 } 2162 ptr = (char *)ALIGN((unsigned long)ptr, 0x100); 2163 ptr_addr = ALIGN(ptr_addr, 0x100); 2164 chip->work_base = ptr; 2165 chip->work_base_addr = ptr_addr; 2166 2167 snd_BUG_ON(ptr + PAGE_ALIGN(chip->work_size) != 2168 chip->work_ptr.area + chip->work_ptr.bytes); 2169 2170 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr); 2171 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr); 2172 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr); 2173 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr); 2174 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2); 2175 2176 /* S/PDIF output initialization */ 2177 chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff; 2178 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0); 2179 snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits); 2180 2181 /* S/PDIF input initialization */ 2182 snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0); 2183 2184 /* digital mixer setup */ 2185 for (reg = 0x80; reg < 0xc0; reg += 4) 2186 snd_ymfpci_writel(chip, reg, 0); 2187 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff); 2188 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0x3fff3fff); 2189 snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff); 2190 snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff); 2191 snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff); 2192 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff); 2193 snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff); 2194 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff); 2195 2196 return 0; 2197} 2198 2199static int snd_ymfpci_free(struct snd_ymfpci *chip) 2200{ 2201 u16 ctrl; 2202 2203 if (snd_BUG_ON(!chip)) 2204 return -EINVAL; 2205 2206 if (chip->res_reg_area) { /* don't touch busy hardware */ 2207 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2208 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); 2209 snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0); 2210 snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0); 2211 snd_ymfpci_disable_dsp(chip); 2212 snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0); 2213 snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0); 2214 snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0); 2215 snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0); 2216 snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0); 2217 ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL); 2218 snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007); 2219 } 2220 2221 snd_ymfpci_ac3_done(chip); 2222 2223 /* Set PCI device to D3 state */ 2224#if 0 2225 /* FIXME: temporarily disabled, otherwise we cannot fire up 2226 * the chip again unless reboot. ACPI bug? 2227 */ 2228 pci_set_power_state(chip->pci, PCI_D3hot); 2229#endif 2230 2231#ifdef CONFIG_PM_SLEEP 2232 kfree(chip->saved_regs); 2233#endif 2234 if (chip->irq >= 0) 2235 free_irq(chip->irq, chip); 2236 release_and_free_resource(chip->mpu_res); 2237 release_and_free_resource(chip->fm_res); 2238 snd_ymfpci_free_gameport(chip); 2239 iounmap(chip->reg_area_virt); 2240 if (chip->work_ptr.area) 2241 snd_dma_free_pages(&chip->work_ptr); 2242 2243 release_and_free_resource(chip->res_reg_area); 2244 2245 pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl); 2246 2247 pci_disable_device(chip->pci); 2248 release_firmware(chip->dsp_microcode); 2249 release_firmware(chip->controller_microcode); 2250 kfree(chip); 2251 return 0; 2252} 2253 2254static int snd_ymfpci_dev_free(struct snd_device *device) 2255{ 2256 struct snd_ymfpci *chip = device->device_data; 2257 return snd_ymfpci_free(chip); 2258} 2259 2260#ifdef CONFIG_PM_SLEEP 2261static const int saved_regs_index[] = { 2262 /* spdif */ 2263 YDSXGR_SPDIFOUTCTRL, 2264 YDSXGR_SPDIFOUTSTATUS, 2265 YDSXGR_SPDIFINCTRL, 2266 /* volumes */ 2267 YDSXGR_PRIADCLOOPVOL, 2268 YDSXGR_NATIVEDACINVOL, 2269 YDSXGR_NATIVEDACOUTVOL, 2270 YDSXGR_BUF441OUTVOL, 2271 YDSXGR_NATIVEADCINVOL, 2272 YDSXGR_SPDIFLOOPVOL, 2273 YDSXGR_SPDIFOUTVOL, 2274 YDSXGR_ZVOUTVOL, 2275 YDSXGR_LEGACYOUTVOL, 2276 /* address bases */ 2277 YDSXGR_PLAYCTRLBASE, 2278 YDSXGR_RECCTRLBASE, 2279 YDSXGR_EFFCTRLBASE, 2280 YDSXGR_WORKBASE, 2281 /* capture set up */ 2282 YDSXGR_MAPOFREC, 2283 YDSXGR_RECFORMAT, 2284 YDSXGR_RECSLOTSR, 2285 YDSXGR_ADCFORMAT, 2286 YDSXGR_ADCSLOTSR, 2287}; 2288#define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index) 2289 2290static int snd_ymfpci_suspend(struct device *dev) 2291{ 2292 struct snd_card *card = dev_get_drvdata(dev); 2293 struct snd_ymfpci *chip = card->private_data; 2294 unsigned int i; 2295 2296 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2297 snd_ac97_suspend(chip->ac97); 2298 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2299 chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]); 2300 chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE); 2301 pci_read_config_word(chip->pci, PCIR_DSXG_LEGACY, 2302 &chip->saved_dsxg_legacy); 2303 pci_read_config_word(chip->pci, PCIR_DSXG_ELEGACY, 2304 &chip->saved_dsxg_elegacy); 2305 snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0); 2306 snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0); 2307 snd_ymfpci_disable_dsp(chip); 2308 return 0; 2309} 2310 2311static int snd_ymfpci_resume(struct device *dev) 2312{ 2313 struct pci_dev *pci = to_pci_dev(dev); 2314 struct snd_card *card = dev_get_drvdata(dev); 2315 struct snd_ymfpci *chip = card->private_data; 2316 unsigned int i; 2317 2318 snd_ymfpci_aclink_reset(pci); 2319 snd_ymfpci_codec_ready(chip, 0); 2320 snd_ymfpci_download_image(chip); 2321 udelay(100); 2322 2323 for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++) 2324 snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]); 2325 2326 snd_ac97_resume(chip->ac97); 2327 2328 pci_write_config_word(chip->pci, PCIR_DSXG_LEGACY, 2329 chip->saved_dsxg_legacy); 2330 pci_write_config_word(chip->pci, PCIR_DSXG_ELEGACY, 2331 chip->saved_dsxg_elegacy); 2332 2333 /* start hw again */ 2334 if (chip->start_count > 0) { 2335 spin_lock_irq(&chip->reg_lock); 2336 snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode); 2337 chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT); 2338 spin_unlock_irq(&chip->reg_lock); 2339 } 2340 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2341 return 0; 2342} 2343 2344SIMPLE_DEV_PM_OPS(snd_ymfpci_pm, snd_ymfpci_suspend, snd_ymfpci_resume); 2345#endif /* CONFIG_PM_SLEEP */ 2346 2347int snd_ymfpci_create(struct snd_card *card, 2348 struct pci_dev *pci, 2349 unsigned short old_legacy_ctrl, 2350 struct snd_ymfpci **rchip) 2351{ 2352 struct snd_ymfpci *chip; 2353 int err; 2354 static const struct snd_device_ops ops = { 2355 .dev_free = snd_ymfpci_dev_free, 2356 }; 2357 2358 *rchip = NULL; 2359 2360 /* enable PCI device */ 2361 err = pci_enable_device(pci); 2362 if (err < 0) 2363 return err; 2364 2365 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 2366 if (chip == NULL) { 2367 pci_disable_device(pci); 2368 return -ENOMEM; 2369 } 2370 chip->old_legacy_ctrl = old_legacy_ctrl; 2371 spin_lock_init(&chip->reg_lock); 2372 spin_lock_init(&chip->voice_lock); 2373 init_waitqueue_head(&chip->interrupt_sleep); 2374 atomic_set(&chip->interrupt_sleep_count, 0); 2375 chip->card = card; 2376 chip->pci = pci; 2377 chip->irq = -1; 2378 chip->device_id = pci->device; 2379 chip->rev = pci->revision; 2380 chip->reg_area_phys = pci_resource_start(pci, 0); 2381 chip->reg_area_virt = ioremap(chip->reg_area_phys, 0x8000); 2382 pci_set_master(pci); 2383 chip->src441_used = -1; 2384 2385 chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI"); 2386 if (!chip->res_reg_area) { 2387 dev_err(chip->card->dev, 2388 "unable to grab memory region 0x%lx-0x%lx\n", 2389 chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1); 2390 err = -EBUSY; 2391 goto free_chip; 2392 } 2393 if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_SHARED, 2394 KBUILD_MODNAME, chip)) { 2395 dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq); 2396 err = -EBUSY; 2397 goto free_chip; 2398 } 2399 chip->irq = pci->irq; 2400 card->sync_irq = chip->irq; 2401 2402 snd_ymfpci_aclink_reset(pci); 2403 if (snd_ymfpci_codec_ready(chip, 0) < 0) { 2404 err = -EIO; 2405 goto free_chip; 2406 } 2407 2408 err = snd_ymfpci_request_firmware(chip); 2409 if (err < 0) { 2410 dev_err(chip->card->dev, "firmware request failed: %d\n", err); 2411 goto free_chip; 2412 } 2413 snd_ymfpci_download_image(chip); 2414 2415 udelay(100); /* seems we need a delay after downloading image.. */ 2416 2417 if (snd_ymfpci_memalloc(chip) < 0) { 2418 err = -EIO; 2419 goto free_chip; 2420 } 2421 2422 err = snd_ymfpci_ac3_init(chip); 2423 if (err < 0) 2424 goto free_chip; 2425 2426#ifdef CONFIG_PM_SLEEP 2427 chip->saved_regs = kmalloc_array(YDSXGR_NUM_SAVED_REGS, sizeof(u32), 2428 GFP_KERNEL); 2429 if (chip->saved_regs == NULL) { 2430 err = -ENOMEM; 2431 goto free_chip; 2432 } 2433#endif 2434 2435 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); 2436 if (err < 0) 2437 goto free_chip; 2438 2439 snd_ymfpci_proc_init(card, chip); 2440 2441 *rchip = chip; 2442 return 0; 2443 2444free_chip: 2445 snd_ymfpci_free(chip); 2446 return err; 2447} 2448