1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Driver for NeoMagic 256AV and 256ZX chipsets. 4 * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de> 5 * 6 * Based on nm256_audio.c OSS driver in linux kernel. 7 * The original author of OSS nm256 driver wishes to remain anonymous, 8 * so I just put my acknoledgment to him/her here. 9 * The original author's web page is found at 10 * http://www.uglx.org/sony.html 11 */ 12 13#include <linux/io.h> 14#include <linux/delay.h> 15#include <linux/interrupt.h> 16#include <linux/init.h> 17#include <linux/pci.h> 18#include <linux/slab.h> 19#include <linux/module.h> 20#include <linux/mutex.h> 21 22#include <sound/core.h> 23#include <sound/info.h> 24#include <sound/control.h> 25#include <sound/pcm.h> 26#include <sound/ac97_codec.h> 27#include <sound/initval.h> 28 29#define CARD_NAME "NeoMagic 256AV/ZX" 30#define DRIVER_NAME "NM256" 31 32MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); 33MODULE_DESCRIPTION("NeoMagic NM256AV/ZX"); 34MODULE_LICENSE("GPL"); 35MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV}," 36 "{NeoMagic,NM256ZX}}"); 37 38/* 39 * some compile conditions. 40 */ 41 42static int index = SNDRV_DEFAULT_IDX1; /* Index */ 43static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ 44static int playback_bufsize = 16; 45static int capture_bufsize = 16; 46static bool force_ac97; /* disabled as default */ 47static int buffer_top; /* not specified */ 48static bool use_cache; /* disabled */ 49static bool vaio_hack; /* disabled */ 50static bool reset_workaround; 51static bool reset_workaround_2; 52 53module_param(index, int, 0444); 54MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard."); 55module_param(id, charp, 0444); 56MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard."); 57module_param(playback_bufsize, int, 0444); 58MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard."); 59module_param(capture_bufsize, int, 0444); 60MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard."); 61module_param(force_ac97, bool, 0444); 62MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard."); 63module_param(buffer_top, int, 0444); 64MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard."); 65module_param(use_cache, bool, 0444); 66MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access."); 67module_param(vaio_hack, bool, 0444); 68MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks."); 69module_param(reset_workaround, bool, 0444); 70MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops."); 71module_param(reset_workaround_2, bool, 0444); 72MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops."); 73 74/* just for backward compatibility */ 75static bool enable; 76module_param(enable, bool, 0444); 77 78 79 80/* 81 * hw definitions 82 */ 83 84/* The BIOS signature. */ 85#define NM_SIGNATURE 0x4e4d0000 86/* Signature mask. */ 87#define NM_SIG_MASK 0xffff0000 88 89/* Size of the second memory area. */ 90#define NM_PORT2_SIZE 4096 91 92/* The base offset of the mixer in the second memory area. */ 93#define NM_MIXER_OFFSET 0x600 94 95/* The maximum size of a coefficient entry. */ 96#define NM_MAX_PLAYBACK_COEF_SIZE 0x5000 97#define NM_MAX_RECORD_COEF_SIZE 0x1260 98 99/* The interrupt register. */ 100#define NM_INT_REG 0xa04 101/* And its bits. */ 102#define NM_PLAYBACK_INT 0x40 103#define NM_RECORD_INT 0x100 104#define NM_MISC_INT_1 0x4000 105#define NM_MISC_INT_2 0x1 106#define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1) 107 108/* The AV's "mixer ready" status bit and location. */ 109#define NM_MIXER_STATUS_OFFSET 0xa04 110#define NM_MIXER_READY_MASK 0x0800 111#define NM_MIXER_PRESENCE 0xa06 112#define NM_PRESENCE_MASK 0x0050 113#define NM_PRESENCE_VALUE 0x0040 114 115/* 116 * For the ZX. It uses the same interrupt register, but it holds 32 117 * bits instead of 16. 118 */ 119#define NM2_PLAYBACK_INT 0x10000 120#define NM2_RECORD_INT 0x80000 121#define NM2_MISC_INT_1 0x8 122#define NM2_MISC_INT_2 0x2 123#define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X)) 124 125/* The ZX's "mixer ready" status bit and location. */ 126#define NM2_MIXER_STATUS_OFFSET 0xa06 127#define NM2_MIXER_READY_MASK 0x0800 128 129/* The playback registers start from here. */ 130#define NM_PLAYBACK_REG_OFFSET 0x0 131/* The record registers start from here. */ 132#define NM_RECORD_REG_OFFSET 0x200 133 134/* The rate register is located 2 bytes from the start of the register area. */ 135#define NM_RATE_REG_OFFSET 2 136 137/* Mono/stereo flag, number of bits on playback, and rate mask. */ 138#define NM_RATE_STEREO 1 139#define NM_RATE_BITS_16 2 140#define NM_RATE_MASK 0xf0 141 142/* Playback enable register. */ 143#define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1) 144#define NM_PLAYBACK_ENABLE_FLAG 1 145#define NM_PLAYBACK_ONESHOT 2 146#define NM_PLAYBACK_FREERUN 4 147 148/* Mutes the audio output. */ 149#define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18) 150#define NM_AUDIO_MUTE_LEFT 0x8000 151#define NM_AUDIO_MUTE_RIGHT 0x0080 152 153/* Recording enable register. */ 154#define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0) 155#define NM_RECORD_ENABLE_FLAG 1 156#define NM_RECORD_FREERUN 2 157 158/* coefficient buffer pointer */ 159#define NM_COEFF_START_OFFSET 0x1c 160#define NM_COEFF_END_OFFSET 0x20 161 162/* DMA buffer offsets */ 163#define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4) 164#define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10) 165#define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc) 166#define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8) 167 168#define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4) 169#define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14) 170#define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc) 171#define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8) 172 173struct nm256_stream { 174 175 struct nm256 *chip; 176 struct snd_pcm_substream *substream; 177 int running; 178 int suspended; 179 180 u32 buf; /* offset from chip->buffer */ 181 int bufsize; /* buffer size in bytes */ 182 void __iomem *bufptr; /* mapped pointer */ 183 unsigned long bufptr_addr; /* physical address of the mapped pointer */ 184 185 int dma_size; /* buffer size of the substream in bytes */ 186 int period_size; /* period size in bytes */ 187 int periods; /* # of periods */ 188 int shift; /* bit shifts */ 189 int cur_period; /* current period # */ 190 191}; 192 193struct nm256 { 194 195 struct snd_card *card; 196 197 void __iomem *cport; /* control port */ 198 struct resource *res_cport; /* its resource */ 199 unsigned long cport_addr; /* physical address */ 200 201 void __iomem *buffer; /* buffer */ 202 struct resource *res_buffer; /* its resource */ 203 unsigned long buffer_addr; /* buffer phyiscal address */ 204 205 u32 buffer_start; /* start offset from pci resource 0 */ 206 u32 buffer_end; /* end offset */ 207 u32 buffer_size; /* total buffer size */ 208 209 u32 all_coeff_buf; /* coefficient buffer */ 210 u32 coeff_buf[2]; /* coefficient buffer for each stream */ 211 212 unsigned int coeffs_current: 1; /* coeff. table is loaded? */ 213 unsigned int use_cache: 1; /* use one big coef. table */ 214 unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */ 215 unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */ 216 unsigned int in_resume: 1; 217 218 int mixer_base; /* register offset of ac97 mixer */ 219 int mixer_status_offset; /* offset of mixer status reg. */ 220 int mixer_status_mask; /* bit mask to test the mixer status */ 221 222 int irq; 223 int irq_acks; 224 irq_handler_t interrupt; 225 int badintrcount; /* counter to check bogus interrupts */ 226 struct mutex irq_mutex; 227 228 struct nm256_stream streams[2]; 229 230 struct snd_ac97 *ac97; 231 unsigned short *ac97_regs; /* register caches, only for valid regs */ 232 233 struct snd_pcm *pcm; 234 235 struct pci_dev *pci; 236 237 spinlock_t reg_lock; 238 239}; 240 241 242/* 243 * include coefficient table 244 */ 245#include "nm256_coef.c" 246 247 248/* 249 * PCI ids 250 */ 251static const struct pci_device_id snd_nm256_ids[] = { 252 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO), 0}, 253 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO), 0}, 254 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO), 0}, 255 {0,}, 256}; 257 258MODULE_DEVICE_TABLE(pci, snd_nm256_ids); 259 260 261/* 262 * lowlvel stuffs 263 */ 264 265static inline u8 266snd_nm256_readb(struct nm256 *chip, int offset) 267{ 268 return readb(chip->cport + offset); 269} 270 271static inline u16 272snd_nm256_readw(struct nm256 *chip, int offset) 273{ 274 return readw(chip->cport + offset); 275} 276 277static inline u32 278snd_nm256_readl(struct nm256 *chip, int offset) 279{ 280 return readl(chip->cport + offset); 281} 282 283static inline void 284snd_nm256_writeb(struct nm256 *chip, int offset, u8 val) 285{ 286 writeb(val, chip->cport + offset); 287} 288 289static inline void 290snd_nm256_writew(struct nm256 *chip, int offset, u16 val) 291{ 292 writew(val, chip->cport + offset); 293} 294 295static inline void 296snd_nm256_writel(struct nm256 *chip, int offset, u32 val) 297{ 298 writel(val, chip->cport + offset); 299} 300 301static inline void 302snd_nm256_write_buffer(struct nm256 *chip, const void *src, int offset, int size) 303{ 304 offset -= chip->buffer_start; 305#ifdef CONFIG_SND_DEBUG 306 if (offset < 0 || offset >= chip->buffer_size) { 307 dev_err(chip->card->dev, 308 "write_buffer invalid offset = %d size = %d\n", 309 offset, size); 310 return; 311 } 312#endif 313 memcpy_toio(chip->buffer + offset, src, size); 314} 315 316/* 317 * coefficient handlers -- what a magic! 318 */ 319 320static u16 321snd_nm256_get_start_offset(int which) 322{ 323 u16 offset = 0; 324 while (which-- > 0) 325 offset += coefficient_sizes[which]; 326 return offset; 327} 328 329static void 330snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which) 331{ 332 u32 coeff_buf = chip->coeff_buf[stream]; 333 u16 offset = snd_nm256_get_start_offset(which); 334 u16 size = coefficient_sizes[which]; 335 336 snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size); 337 snd_nm256_writel(chip, port, coeff_buf); 338 /* ??? Record seems to behave differently than playback. */ 339 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 340 size--; 341 snd_nm256_writel(chip, port + 4, coeff_buf + size); 342} 343 344static void 345snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number) 346{ 347 /* The enable register for the specified engine. */ 348 u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ? 349 NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG); 350 u32 addr = NM_COEFF_START_OFFSET; 351 352 addr += (stream == SNDRV_PCM_STREAM_CAPTURE ? 353 NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET); 354 355 if (snd_nm256_readb(chip, poffset) & 1) { 356 dev_dbg(chip->card->dev, 357 "NM256: Engine was enabled while loading coefficients!\n"); 358 return; 359 } 360 361 /* The recording engine uses coefficient values 8-15. */ 362 number &= 7; 363 if (stream == SNDRV_PCM_STREAM_CAPTURE) 364 number += 8; 365 366 if (! chip->use_cache) { 367 snd_nm256_load_one_coefficient(chip, stream, addr, number); 368 return; 369 } 370 if (! chip->coeffs_current) { 371 snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf, 372 NM_TOTAL_COEFF_COUNT * 4); 373 chip->coeffs_current = 1; 374 } else { 375 u32 base = chip->all_coeff_buf; 376 u32 offset = snd_nm256_get_start_offset(number); 377 u32 end_offset = offset + coefficient_sizes[number]; 378 snd_nm256_writel(chip, addr, base + offset); 379 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 380 end_offset--; 381 snd_nm256_writel(chip, addr + 4, base + end_offset); 382 } 383} 384 385 386/* The actual rates supported by the card. */ 387static const unsigned int samplerates[8] = { 388 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000, 389}; 390static const struct snd_pcm_hw_constraint_list constraints_rates = { 391 .count = ARRAY_SIZE(samplerates), 392 .list = samplerates, 393 .mask = 0, 394}; 395 396/* 397 * return the index of the target rate 398 */ 399static int 400snd_nm256_fixed_rate(unsigned int rate) 401{ 402 unsigned int i; 403 for (i = 0; i < ARRAY_SIZE(samplerates); i++) { 404 if (rate == samplerates[i]) 405 return i; 406 } 407 snd_BUG(); 408 return 0; 409} 410 411/* 412 * set sample rate and format 413 */ 414static void 415snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s, 416 struct snd_pcm_substream *substream) 417{ 418 struct snd_pcm_runtime *runtime = substream->runtime; 419 int rate_index = snd_nm256_fixed_rate(runtime->rate); 420 unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK; 421 422 s->shift = 0; 423 if (snd_pcm_format_width(runtime->format) == 16) { 424 ratebits |= NM_RATE_BITS_16; 425 s->shift++; 426 } 427 if (runtime->channels > 1) { 428 ratebits |= NM_RATE_STEREO; 429 s->shift++; 430 } 431 432 runtime->rate = samplerates[rate_index]; 433 434 switch (substream->stream) { 435 case SNDRV_PCM_STREAM_PLAYBACK: 436 snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */ 437 snd_nm256_writeb(chip, 438 NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET, 439 ratebits); 440 break; 441 case SNDRV_PCM_STREAM_CAPTURE: 442 snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */ 443 snd_nm256_writeb(chip, 444 NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET, 445 ratebits); 446 break; 447 } 448} 449 450/* acquire interrupt */ 451static int snd_nm256_acquire_irq(struct nm256 *chip) 452{ 453 mutex_lock(&chip->irq_mutex); 454 if (chip->irq < 0) { 455 if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED, 456 KBUILD_MODNAME, chip)) { 457 dev_err(chip->card->dev, 458 "unable to grab IRQ %d\n", chip->pci->irq); 459 mutex_unlock(&chip->irq_mutex); 460 return -EBUSY; 461 } 462 chip->irq = chip->pci->irq; 463 chip->card->sync_irq = chip->irq; 464 } 465 chip->irq_acks++; 466 mutex_unlock(&chip->irq_mutex); 467 return 0; 468} 469 470/* release interrupt */ 471static void snd_nm256_release_irq(struct nm256 *chip) 472{ 473 mutex_lock(&chip->irq_mutex); 474 if (chip->irq_acks > 0) 475 chip->irq_acks--; 476 if (chip->irq_acks == 0 && chip->irq >= 0) { 477 free_irq(chip->irq, chip); 478 chip->irq = -1; 479 chip->card->sync_irq = -1; 480 } 481 mutex_unlock(&chip->irq_mutex); 482} 483 484/* 485 * start / stop 486 */ 487 488/* update the watermark (current period) */ 489static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg) 490{ 491 s->cur_period++; 492 s->cur_period %= s->periods; 493 snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size); 494} 495 496#define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK) 497#define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK) 498 499static void 500snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s, 501 struct snd_pcm_substream *substream) 502{ 503 /* program buffer pointers */ 504 snd_nm256_writel(chip, NM_PBUFFER_START, s->buf); 505 snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift)); 506 snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf); 507 snd_nm256_playback_mark(chip, s); 508 509 /* Enable playback engine and interrupts. */ 510 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 511 NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN); 512 /* Enable both channels. */ 513 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0); 514} 515 516static void 517snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s, 518 struct snd_pcm_substream *substream) 519{ 520 /* program buffer pointers */ 521 snd_nm256_writel(chip, NM_RBUFFER_START, s->buf); 522 snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size); 523 snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf); 524 snd_nm256_capture_mark(chip, s); 525 526 /* Enable playback engine and interrupts. */ 527 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 528 NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN); 529} 530 531/* Stop the play engine. */ 532static void 533snd_nm256_playback_stop(struct nm256 *chip) 534{ 535 /* Shut off sound from both channels. */ 536 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 537 NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT); 538 /* Disable play engine. */ 539 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0); 540} 541 542static void 543snd_nm256_capture_stop(struct nm256 *chip) 544{ 545 /* Disable recording engine. */ 546 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0); 547} 548 549static int 550snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd) 551{ 552 struct nm256 *chip = snd_pcm_substream_chip(substream); 553 struct nm256_stream *s = substream->runtime->private_data; 554 int err = 0; 555 556 if (snd_BUG_ON(!s)) 557 return -ENXIO; 558 559 spin_lock(&chip->reg_lock); 560 switch (cmd) { 561 case SNDRV_PCM_TRIGGER_RESUME: 562 s->suspended = 0; 563 fallthrough; 564 case SNDRV_PCM_TRIGGER_START: 565 if (! s->running) { 566 snd_nm256_playback_start(chip, s, substream); 567 s->running = 1; 568 } 569 break; 570 case SNDRV_PCM_TRIGGER_SUSPEND: 571 s->suspended = 1; 572 fallthrough; 573 case SNDRV_PCM_TRIGGER_STOP: 574 if (s->running) { 575 snd_nm256_playback_stop(chip); 576 s->running = 0; 577 } 578 break; 579 default: 580 err = -EINVAL; 581 break; 582 } 583 spin_unlock(&chip->reg_lock); 584 return err; 585} 586 587static int 588snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd) 589{ 590 struct nm256 *chip = snd_pcm_substream_chip(substream); 591 struct nm256_stream *s = substream->runtime->private_data; 592 int err = 0; 593 594 if (snd_BUG_ON(!s)) 595 return -ENXIO; 596 597 spin_lock(&chip->reg_lock); 598 switch (cmd) { 599 case SNDRV_PCM_TRIGGER_START: 600 case SNDRV_PCM_TRIGGER_RESUME: 601 if (! s->running) { 602 snd_nm256_capture_start(chip, s, substream); 603 s->running = 1; 604 } 605 break; 606 case SNDRV_PCM_TRIGGER_STOP: 607 case SNDRV_PCM_TRIGGER_SUSPEND: 608 if (s->running) { 609 snd_nm256_capture_stop(chip); 610 s->running = 0; 611 } 612 break; 613 default: 614 err = -EINVAL; 615 break; 616 } 617 spin_unlock(&chip->reg_lock); 618 return err; 619} 620 621 622/* 623 * prepare playback/capture channel 624 */ 625static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream) 626{ 627 struct nm256 *chip = snd_pcm_substream_chip(substream); 628 struct snd_pcm_runtime *runtime = substream->runtime; 629 struct nm256_stream *s = runtime->private_data; 630 631 if (snd_BUG_ON(!s)) 632 return -ENXIO; 633 s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size); 634 s->period_size = frames_to_bytes(runtime, substream->runtime->period_size); 635 s->periods = substream->runtime->periods; 636 s->cur_period = 0; 637 638 spin_lock_irq(&chip->reg_lock); 639 s->running = 0; 640 snd_nm256_set_format(chip, s, substream); 641 spin_unlock_irq(&chip->reg_lock); 642 643 return 0; 644} 645 646 647/* 648 * get the current pointer 649 */ 650static snd_pcm_uframes_t 651snd_nm256_playback_pointer(struct snd_pcm_substream *substream) 652{ 653 struct nm256 *chip = snd_pcm_substream_chip(substream); 654 struct nm256_stream *s = substream->runtime->private_data; 655 unsigned long curp; 656 657 if (snd_BUG_ON(!s)) 658 return 0; 659 curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf; 660 curp %= s->dma_size; 661 return bytes_to_frames(substream->runtime, curp); 662} 663 664static snd_pcm_uframes_t 665snd_nm256_capture_pointer(struct snd_pcm_substream *substream) 666{ 667 struct nm256 *chip = snd_pcm_substream_chip(substream); 668 struct nm256_stream *s = substream->runtime->private_data; 669 unsigned long curp; 670 671 if (snd_BUG_ON(!s)) 672 return 0; 673 curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf; 674 curp %= s->dma_size; 675 return bytes_to_frames(substream->runtime, curp); 676} 677 678/* Remapped I/O space can be accessible as pointer on i386 */ 679/* This might be changed in the future */ 680#ifndef __i386__ 681/* 682 * silence / copy for playback 683 */ 684static int 685snd_nm256_playback_silence(struct snd_pcm_substream *substream, 686 int channel, unsigned long pos, unsigned long count) 687{ 688 struct snd_pcm_runtime *runtime = substream->runtime; 689 struct nm256_stream *s = runtime->private_data; 690 691 memset_io(s->bufptr + pos, 0, count); 692 return 0; 693} 694 695static int 696snd_nm256_playback_copy(struct snd_pcm_substream *substream, 697 int channel, unsigned long pos, 698 void __user *src, unsigned long count) 699{ 700 struct snd_pcm_runtime *runtime = substream->runtime; 701 struct nm256_stream *s = runtime->private_data; 702 703 if (copy_from_user_toio(s->bufptr + pos, src, count)) 704 return -EFAULT; 705 return 0; 706} 707 708static int 709snd_nm256_playback_copy_kernel(struct snd_pcm_substream *substream, 710 int channel, unsigned long pos, 711 void *src, unsigned long count) 712{ 713 struct snd_pcm_runtime *runtime = substream->runtime; 714 struct nm256_stream *s = runtime->private_data; 715 716 memcpy_toio(s->bufptr + pos, src, count); 717 return 0; 718} 719 720/* 721 * copy to user 722 */ 723static int 724snd_nm256_capture_copy(struct snd_pcm_substream *substream, 725 int channel, unsigned long pos, 726 void __user *dst, unsigned long count) 727{ 728 struct snd_pcm_runtime *runtime = substream->runtime; 729 struct nm256_stream *s = runtime->private_data; 730 731 if (copy_to_user_fromio(dst, s->bufptr + pos, count)) 732 return -EFAULT; 733 return 0; 734} 735 736static int 737snd_nm256_capture_copy_kernel(struct snd_pcm_substream *substream, 738 int channel, unsigned long pos, 739 void *dst, unsigned long count) 740{ 741 struct snd_pcm_runtime *runtime = substream->runtime; 742 struct nm256_stream *s = runtime->private_data; 743 744 memcpy_fromio(dst, s->bufptr + pos, count); 745 return 0; 746} 747 748#endif /* !__i386__ */ 749 750 751/* 752 * update playback/capture watermarks 753 */ 754 755/* spinlock held! */ 756static void 757snd_nm256_playback_update(struct nm256 *chip) 758{ 759 struct nm256_stream *s; 760 761 s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK]; 762 if (s->running && s->substream) { 763 spin_unlock(&chip->reg_lock); 764 snd_pcm_period_elapsed(s->substream); 765 spin_lock(&chip->reg_lock); 766 snd_nm256_playback_mark(chip, s); 767 } 768} 769 770/* spinlock held! */ 771static void 772snd_nm256_capture_update(struct nm256 *chip) 773{ 774 struct nm256_stream *s; 775 776 s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE]; 777 if (s->running && s->substream) { 778 spin_unlock(&chip->reg_lock); 779 snd_pcm_period_elapsed(s->substream); 780 spin_lock(&chip->reg_lock); 781 snd_nm256_capture_mark(chip, s); 782 } 783} 784 785/* 786 * hardware info 787 */ 788static const struct snd_pcm_hardware snd_nm256_playback = 789{ 790 .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID | 791 SNDRV_PCM_INFO_INTERLEAVED | 792 /*SNDRV_PCM_INFO_PAUSE |*/ 793 SNDRV_PCM_INFO_RESUME, 794 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 795 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000, 796 .rate_min = 8000, 797 .rate_max = 48000, 798 .channels_min = 1, 799 .channels_max = 2, 800 .periods_min = 2, 801 .periods_max = 1024, 802 .buffer_bytes_max = 128 * 1024, 803 .period_bytes_min = 256, 804 .period_bytes_max = 128 * 1024, 805}; 806 807static const struct snd_pcm_hardware snd_nm256_capture = 808{ 809 .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID | 810 SNDRV_PCM_INFO_INTERLEAVED | 811 /*SNDRV_PCM_INFO_PAUSE |*/ 812 SNDRV_PCM_INFO_RESUME, 813 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 814 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000, 815 .rate_min = 8000, 816 .rate_max = 48000, 817 .channels_min = 1, 818 .channels_max = 2, 819 .periods_min = 2, 820 .periods_max = 1024, 821 .buffer_bytes_max = 128 * 1024, 822 .period_bytes_min = 256, 823 .period_bytes_max = 128 * 1024, 824}; 825 826 827/* set dma transfer size */ 828static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream, 829 struct snd_pcm_hw_params *hw_params) 830{ 831 /* area and addr are already set and unchanged */ 832 substream->runtime->dma_bytes = params_buffer_bytes(hw_params); 833 return 0; 834} 835 836/* 837 * open 838 */ 839static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s, 840 struct snd_pcm_substream *substream, 841 const struct snd_pcm_hardware *hw_ptr) 842{ 843 struct snd_pcm_runtime *runtime = substream->runtime; 844 845 s->running = 0; 846 runtime->hw = *hw_ptr; 847 runtime->hw.buffer_bytes_max = s->bufsize; 848 runtime->hw.period_bytes_max = s->bufsize / 2; 849 runtime->dma_area = (void __force *) s->bufptr; 850 runtime->dma_addr = s->bufptr_addr; 851 runtime->dma_bytes = s->bufsize; 852 runtime->private_data = s; 853 s->substream = substream; 854 855 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 856 &constraints_rates); 857} 858 859static int 860snd_nm256_playback_open(struct snd_pcm_substream *substream) 861{ 862 struct nm256 *chip = snd_pcm_substream_chip(substream); 863 864 if (snd_nm256_acquire_irq(chip) < 0) 865 return -EBUSY; 866 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK], 867 substream, &snd_nm256_playback); 868 return 0; 869} 870 871static int 872snd_nm256_capture_open(struct snd_pcm_substream *substream) 873{ 874 struct nm256 *chip = snd_pcm_substream_chip(substream); 875 876 if (snd_nm256_acquire_irq(chip) < 0) 877 return -EBUSY; 878 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE], 879 substream, &snd_nm256_capture); 880 return 0; 881} 882 883/* 884 * close - we don't have to do special.. 885 */ 886static int 887snd_nm256_playback_close(struct snd_pcm_substream *substream) 888{ 889 struct nm256 *chip = snd_pcm_substream_chip(substream); 890 891 snd_nm256_release_irq(chip); 892 return 0; 893} 894 895 896static int 897snd_nm256_capture_close(struct snd_pcm_substream *substream) 898{ 899 struct nm256 *chip = snd_pcm_substream_chip(substream); 900 901 snd_nm256_release_irq(chip); 902 return 0; 903} 904 905/* 906 * create a pcm instance 907 */ 908static const struct snd_pcm_ops snd_nm256_playback_ops = { 909 .open = snd_nm256_playback_open, 910 .close = snd_nm256_playback_close, 911 .hw_params = snd_nm256_pcm_hw_params, 912 .prepare = snd_nm256_pcm_prepare, 913 .trigger = snd_nm256_playback_trigger, 914 .pointer = snd_nm256_playback_pointer, 915#ifndef __i386__ 916 .copy_user = snd_nm256_playback_copy, 917 .copy_kernel = snd_nm256_playback_copy_kernel, 918 .fill_silence = snd_nm256_playback_silence, 919#endif 920 .mmap = snd_pcm_lib_mmap_iomem, 921}; 922 923static const struct snd_pcm_ops snd_nm256_capture_ops = { 924 .open = snd_nm256_capture_open, 925 .close = snd_nm256_capture_close, 926 .hw_params = snd_nm256_pcm_hw_params, 927 .prepare = snd_nm256_pcm_prepare, 928 .trigger = snd_nm256_capture_trigger, 929 .pointer = snd_nm256_capture_pointer, 930#ifndef __i386__ 931 .copy_user = snd_nm256_capture_copy, 932 .copy_kernel = snd_nm256_capture_copy_kernel, 933#endif 934 .mmap = snd_pcm_lib_mmap_iomem, 935}; 936 937static int 938snd_nm256_pcm(struct nm256 *chip, int device) 939{ 940 struct snd_pcm *pcm; 941 int i, err; 942 943 for (i = 0; i < 2; i++) { 944 struct nm256_stream *s = &chip->streams[i]; 945 s->bufptr = chip->buffer + (s->buf - chip->buffer_start); 946 s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start); 947 } 948 949 err = snd_pcm_new(chip->card, chip->card->driver, device, 950 1, 1, &pcm); 951 if (err < 0) 952 return err; 953 954 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops); 955 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops); 956 957 pcm->private_data = chip; 958 pcm->info_flags = 0; 959 chip->pcm = pcm; 960 961 return 0; 962} 963 964 965/* 966 * Initialize the hardware. 967 */ 968static void 969snd_nm256_init_chip(struct nm256 *chip) 970{ 971 /* Reset everything. */ 972 snd_nm256_writeb(chip, 0x0, 0x11); 973 snd_nm256_writew(chip, 0x214, 0); 974 /* stop sounds.. */ 975 //snd_nm256_playback_stop(chip); 976 //snd_nm256_capture_stop(chip); 977} 978 979 980static irqreturn_t 981snd_nm256_intr_check(struct nm256 *chip) 982{ 983 if (chip->badintrcount++ > 1000) { 984 /* 985 * I'm not sure if the best thing is to stop the card from 986 * playing or just release the interrupt (after all, we're in 987 * a bad situation, so doing fancy stuff may not be such a good 988 * idea). 989 * 990 * I worry about the card engine continuing to play noise 991 * over and over, however--that could become a very 992 * obnoxious problem. And we know that when this usually 993 * happens things are fairly safe, it just means the user's 994 * inserted a PCMCIA card and someone's spamming us with IRQ 9s. 995 */ 996 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running) 997 snd_nm256_playback_stop(chip); 998 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running) 999 snd_nm256_capture_stop(chip); 1000 chip->badintrcount = 0; 1001 return IRQ_HANDLED; 1002 } 1003 return IRQ_NONE; 1004} 1005 1006/* 1007 * Handle a potential interrupt for the device referred to by DEV_ID. 1008 * 1009 * I don't like the cut-n-paste job here either between the two routines, 1010 * but there are sufficient differences between the two interrupt handlers 1011 * that parameterizing it isn't all that great either. (Could use a macro, 1012 * I suppose...yucky bleah.) 1013 */ 1014 1015static irqreturn_t 1016snd_nm256_interrupt(int irq, void *dev_id) 1017{ 1018 struct nm256 *chip = dev_id; 1019 u16 status; 1020 u8 cbyte; 1021 1022 status = snd_nm256_readw(chip, NM_INT_REG); 1023 1024 /* Not ours. */ 1025 if (status == 0) 1026 return snd_nm256_intr_check(chip); 1027 1028 chip->badintrcount = 0; 1029 1030 /* Rather boring; check for individual interrupts and process them. */ 1031 1032 spin_lock(&chip->reg_lock); 1033 if (status & NM_PLAYBACK_INT) { 1034 status &= ~NM_PLAYBACK_INT; 1035 NM_ACK_INT(chip, NM_PLAYBACK_INT); 1036 snd_nm256_playback_update(chip); 1037 } 1038 1039 if (status & NM_RECORD_INT) { 1040 status &= ~NM_RECORD_INT; 1041 NM_ACK_INT(chip, NM_RECORD_INT); 1042 snd_nm256_capture_update(chip); 1043 } 1044 1045 if (status & NM_MISC_INT_1) { 1046 status &= ~NM_MISC_INT_1; 1047 NM_ACK_INT(chip, NM_MISC_INT_1); 1048 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n"); 1049 snd_nm256_writew(chip, NM_INT_REG, 0x8000); 1050 cbyte = snd_nm256_readb(chip, 0x400); 1051 snd_nm256_writeb(chip, 0x400, cbyte | 2); 1052 } 1053 1054 if (status & NM_MISC_INT_2) { 1055 status &= ~NM_MISC_INT_2; 1056 NM_ACK_INT(chip, NM_MISC_INT_2); 1057 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n"); 1058 cbyte = snd_nm256_readb(chip, 0x400); 1059 snd_nm256_writeb(chip, 0x400, cbyte & ~2); 1060 } 1061 1062 /* Unknown interrupt. */ 1063 if (status) { 1064 dev_dbg(chip->card->dev, 1065 "NM256: Fire in the hole! Unknown status 0x%x\n", 1066 status); 1067 /* Pray. */ 1068 NM_ACK_INT(chip, status); 1069 } 1070 1071 spin_unlock(&chip->reg_lock); 1072 return IRQ_HANDLED; 1073} 1074 1075/* 1076 * Handle a potential interrupt for the device referred to by DEV_ID. 1077 * This handler is for the 256ZX, and is very similar to the non-ZX 1078 * routine. 1079 */ 1080 1081static irqreturn_t 1082snd_nm256_interrupt_zx(int irq, void *dev_id) 1083{ 1084 struct nm256 *chip = dev_id; 1085 u32 status; 1086 u8 cbyte; 1087 1088 status = snd_nm256_readl(chip, NM_INT_REG); 1089 1090 /* Not ours. */ 1091 if (status == 0) 1092 return snd_nm256_intr_check(chip); 1093 1094 chip->badintrcount = 0; 1095 1096 /* Rather boring; check for individual interrupts and process them. */ 1097 1098 spin_lock(&chip->reg_lock); 1099 if (status & NM2_PLAYBACK_INT) { 1100 status &= ~NM2_PLAYBACK_INT; 1101 NM2_ACK_INT(chip, NM2_PLAYBACK_INT); 1102 snd_nm256_playback_update(chip); 1103 } 1104 1105 if (status & NM2_RECORD_INT) { 1106 status &= ~NM2_RECORD_INT; 1107 NM2_ACK_INT(chip, NM2_RECORD_INT); 1108 snd_nm256_capture_update(chip); 1109 } 1110 1111 if (status & NM2_MISC_INT_1) { 1112 status &= ~NM2_MISC_INT_1; 1113 NM2_ACK_INT(chip, NM2_MISC_INT_1); 1114 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n"); 1115 cbyte = snd_nm256_readb(chip, 0x400); 1116 snd_nm256_writeb(chip, 0x400, cbyte | 2); 1117 } 1118 1119 if (status & NM2_MISC_INT_2) { 1120 status &= ~NM2_MISC_INT_2; 1121 NM2_ACK_INT(chip, NM2_MISC_INT_2); 1122 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n"); 1123 cbyte = snd_nm256_readb(chip, 0x400); 1124 snd_nm256_writeb(chip, 0x400, cbyte & ~2); 1125 } 1126 1127 /* Unknown interrupt. */ 1128 if (status) { 1129 dev_dbg(chip->card->dev, 1130 "NM256: Fire in the hole! Unknown status 0x%x\n", 1131 status); 1132 /* Pray. */ 1133 NM2_ACK_INT(chip, status); 1134 } 1135 1136 spin_unlock(&chip->reg_lock); 1137 return IRQ_HANDLED; 1138} 1139 1140/* 1141 * AC97 interface 1142 */ 1143 1144/* 1145 * Waits for the mixer to become ready to be written; returns a zero value 1146 * if it timed out. 1147 */ 1148static int 1149snd_nm256_ac97_ready(struct nm256 *chip) 1150{ 1151 int timeout = 10; 1152 u32 testaddr; 1153 u16 testb; 1154 1155 testaddr = chip->mixer_status_offset; 1156 testb = chip->mixer_status_mask; 1157 1158 /* 1159 * Loop around waiting for the mixer to become ready. 1160 */ 1161 while (timeout-- > 0) { 1162 if ((snd_nm256_readw(chip, testaddr) & testb) == 0) 1163 return 1; 1164 udelay(100); 1165 } 1166 return 0; 1167} 1168 1169/* 1170 * Initial register values to be written to the AC97 mixer. 1171 * While most of these are identical to the reset values, we do this 1172 * so that we have most of the register contents cached--this avoids 1173 * reading from the mixer directly (which seems to be problematic, 1174 * probably due to ignorance). 1175 */ 1176 1177struct initialValues { 1178 unsigned short reg; 1179 unsigned short value; 1180}; 1181 1182static const struct initialValues nm256_ac97_init_val[] = 1183{ 1184 { AC97_MASTER, 0x8000 }, 1185 { AC97_HEADPHONE, 0x8000 }, 1186 { AC97_MASTER_MONO, 0x8000 }, 1187 { AC97_PC_BEEP, 0x8000 }, 1188 { AC97_PHONE, 0x8008 }, 1189 { AC97_MIC, 0x8000 }, 1190 { AC97_LINE, 0x8808 }, 1191 { AC97_CD, 0x8808 }, 1192 { AC97_VIDEO, 0x8808 }, 1193 { AC97_AUX, 0x8808 }, 1194 { AC97_PCM, 0x8808 }, 1195 { AC97_REC_SEL, 0x0000 }, 1196 { AC97_REC_GAIN, 0x0B0B }, 1197 { AC97_GENERAL_PURPOSE, 0x0000 }, 1198 { AC97_3D_CONTROL, 0x8000 }, 1199 { AC97_VENDOR_ID1, 0x8384 }, 1200 { AC97_VENDOR_ID2, 0x7609 }, 1201}; 1202 1203static int nm256_ac97_idx(unsigned short reg) 1204{ 1205 int i; 1206 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) 1207 if (nm256_ac97_init_val[i].reg == reg) 1208 return i; 1209 return -1; 1210} 1211 1212/* 1213 * some nm256 easily crash when reading from mixer registers 1214 * thus we're treating it as a write-only mixer and cache the 1215 * written values 1216 */ 1217static unsigned short 1218snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 1219{ 1220 struct nm256 *chip = ac97->private_data; 1221 int idx = nm256_ac97_idx(reg); 1222 1223 if (idx < 0) 1224 return 0; 1225 return chip->ac97_regs[idx]; 1226} 1227 1228/* 1229 */ 1230static void 1231snd_nm256_ac97_write(struct snd_ac97 *ac97, 1232 unsigned short reg, unsigned short val) 1233{ 1234 struct nm256 *chip = ac97->private_data; 1235 int tries = 2; 1236 int idx = nm256_ac97_idx(reg); 1237 u32 base; 1238 1239 if (idx < 0) 1240 return; 1241 1242 base = chip->mixer_base; 1243 1244 snd_nm256_ac97_ready(chip); 1245 1246 /* Wait for the write to take, too. */ 1247 while (tries-- > 0) { 1248 snd_nm256_writew(chip, base + reg, val); 1249 msleep(1); /* a little delay here seems better.. */ 1250 if (snd_nm256_ac97_ready(chip)) { 1251 /* successful write: set cache */ 1252 chip->ac97_regs[idx] = val; 1253 return; 1254 } 1255 } 1256 dev_dbg(chip->card->dev, "nm256: ac97 codec not ready..\n"); 1257} 1258 1259/* static resolution table */ 1260static const struct snd_ac97_res_table nm256_res_table[] = { 1261 { AC97_MASTER, 0x1f1f }, 1262 { AC97_HEADPHONE, 0x1f1f }, 1263 { AC97_MASTER_MONO, 0x001f }, 1264 { AC97_PC_BEEP, 0x001f }, 1265 { AC97_PHONE, 0x001f }, 1266 { AC97_MIC, 0x001f }, 1267 { AC97_LINE, 0x1f1f }, 1268 { AC97_CD, 0x1f1f }, 1269 { AC97_VIDEO, 0x1f1f }, 1270 { AC97_AUX, 0x1f1f }, 1271 { AC97_PCM, 0x1f1f }, 1272 { AC97_REC_GAIN, 0x0f0f }, 1273 { } /* terminator */ 1274}; 1275 1276/* initialize the ac97 into a known state */ 1277static void 1278snd_nm256_ac97_reset(struct snd_ac97 *ac97) 1279{ 1280 struct nm256 *chip = ac97->private_data; 1281 1282 /* Reset the mixer. 'Tis magic! */ 1283 snd_nm256_writeb(chip, 0x6c0, 1); 1284 if (! chip->reset_workaround) { 1285 /* Dell latitude LS will lock up by this */ 1286 snd_nm256_writeb(chip, 0x6cc, 0x87); 1287 } 1288 if (! chip->reset_workaround_2) { 1289 /* Dell latitude CSx will lock up by this */ 1290 snd_nm256_writeb(chip, 0x6cc, 0x80); 1291 snd_nm256_writeb(chip, 0x6cc, 0x0); 1292 } 1293 if (! chip->in_resume) { 1294 int i; 1295 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) { 1296 /* preload the cache, so as to avoid even a single 1297 * read of the mixer regs 1298 */ 1299 snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg, 1300 nm256_ac97_init_val[i].value); 1301 } 1302 } 1303} 1304 1305/* create an ac97 mixer interface */ 1306static int 1307snd_nm256_mixer(struct nm256 *chip) 1308{ 1309 struct snd_ac97_bus *pbus; 1310 struct snd_ac97_template ac97; 1311 int err; 1312 static const struct snd_ac97_bus_ops ops = { 1313 .reset = snd_nm256_ac97_reset, 1314 .write = snd_nm256_ac97_write, 1315 .read = snd_nm256_ac97_read, 1316 }; 1317 1318 chip->ac97_regs = kcalloc(ARRAY_SIZE(nm256_ac97_init_val), 1319 sizeof(short), GFP_KERNEL); 1320 if (! chip->ac97_regs) 1321 return -ENOMEM; 1322 1323 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0) 1324 return err; 1325 1326 memset(&ac97, 0, sizeof(ac97)); 1327 ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */ 1328 ac97.private_data = chip; 1329 ac97.res_table = nm256_res_table; 1330 pbus->no_vra = 1; 1331 err = snd_ac97_mixer(pbus, &ac97, &chip->ac97); 1332 if (err < 0) 1333 return err; 1334 if (! (chip->ac97->id & (0xf0000000))) { 1335 /* looks like an invalid id */ 1336 sprintf(chip->card->mixername, "%s AC97", chip->card->driver); 1337 } 1338 return 0; 1339} 1340 1341/* 1342 * See if the signature left by the NM256 BIOS is intact; if so, we use 1343 * the associated address as the end of our audio buffer in the video 1344 * RAM. 1345 */ 1346 1347static int 1348snd_nm256_peek_for_sig(struct nm256 *chip) 1349{ 1350 /* The signature is located 1K below the end of video RAM. */ 1351 void __iomem *temp; 1352 /* Default buffer end is 5120 bytes below the top of RAM. */ 1353 unsigned long pointer_found = chip->buffer_end - 0x1400; 1354 u32 sig; 1355 1356 temp = ioremap(chip->buffer_addr + chip->buffer_end - 0x400, 16); 1357 if (temp == NULL) { 1358 dev_err(chip->card->dev, 1359 "Unable to scan for card signature in video RAM\n"); 1360 return -EBUSY; 1361 } 1362 1363 sig = readl(temp); 1364 if ((sig & NM_SIG_MASK) == NM_SIGNATURE) { 1365 u32 pointer = readl(temp + 4); 1366 1367 /* 1368 * If it's obviously invalid, don't use it 1369 */ 1370 if (pointer == 0xffffffff || 1371 pointer < chip->buffer_size || 1372 pointer > chip->buffer_end) { 1373 dev_err(chip->card->dev, 1374 "invalid signature found: 0x%x\n", pointer); 1375 iounmap(temp); 1376 return -ENODEV; 1377 } else { 1378 pointer_found = pointer; 1379 dev_info(chip->card->dev, 1380 "found card signature in video RAM: 0x%x\n", 1381 pointer); 1382 } 1383 } 1384 1385 iounmap(temp); 1386 chip->buffer_end = pointer_found; 1387 1388 return 0; 1389} 1390 1391#ifdef CONFIG_PM_SLEEP 1392/* 1393 * APM event handler, so the card is properly reinitialized after a power 1394 * event. 1395 */ 1396static int nm256_suspend(struct device *dev) 1397{ 1398 struct snd_card *card = dev_get_drvdata(dev); 1399 struct nm256 *chip = card->private_data; 1400 1401 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1402 snd_ac97_suspend(chip->ac97); 1403 chip->coeffs_current = 0; 1404 return 0; 1405} 1406 1407static int nm256_resume(struct device *dev) 1408{ 1409 struct snd_card *card = dev_get_drvdata(dev); 1410 struct nm256 *chip = card->private_data; 1411 int i; 1412 1413 /* Perform a full reset on the hardware */ 1414 chip->in_resume = 1; 1415 1416 snd_nm256_init_chip(chip); 1417 1418 /* restore ac97 */ 1419 snd_ac97_resume(chip->ac97); 1420 1421 for (i = 0; i < 2; i++) { 1422 struct nm256_stream *s = &chip->streams[i]; 1423 if (s->substream && s->suspended) { 1424 spin_lock_irq(&chip->reg_lock); 1425 snd_nm256_set_format(chip, s, s->substream); 1426 spin_unlock_irq(&chip->reg_lock); 1427 } 1428 } 1429 1430 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1431 chip->in_resume = 0; 1432 return 0; 1433} 1434 1435static SIMPLE_DEV_PM_OPS(nm256_pm, nm256_suspend, nm256_resume); 1436#define NM256_PM_OPS &nm256_pm 1437#else 1438#define NM256_PM_OPS NULL 1439#endif /* CONFIG_PM_SLEEP */ 1440 1441static int snd_nm256_free(struct nm256 *chip) 1442{ 1443 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running) 1444 snd_nm256_playback_stop(chip); 1445 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running) 1446 snd_nm256_capture_stop(chip); 1447 1448 if (chip->irq >= 0) 1449 free_irq(chip->irq, chip); 1450 1451 iounmap(chip->cport); 1452 iounmap(chip->buffer); 1453 release_and_free_resource(chip->res_cport); 1454 release_and_free_resource(chip->res_buffer); 1455 1456 pci_disable_device(chip->pci); 1457 kfree(chip->ac97_regs); 1458 kfree(chip); 1459 return 0; 1460} 1461 1462static int snd_nm256_dev_free(struct snd_device *device) 1463{ 1464 struct nm256 *chip = device->device_data; 1465 return snd_nm256_free(chip); 1466} 1467 1468static int 1469snd_nm256_create(struct snd_card *card, struct pci_dev *pci, 1470 struct nm256 **chip_ret) 1471{ 1472 struct nm256 *chip; 1473 int err, pval; 1474 static const struct snd_device_ops ops = { 1475 .dev_free = snd_nm256_dev_free, 1476 }; 1477 u32 addr; 1478 1479 *chip_ret = NULL; 1480 1481 if ((err = pci_enable_device(pci)) < 0) 1482 return err; 1483 1484 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1485 if (chip == NULL) { 1486 pci_disable_device(pci); 1487 return -ENOMEM; 1488 } 1489 1490 chip->card = card; 1491 chip->pci = pci; 1492 chip->use_cache = use_cache; 1493 spin_lock_init(&chip->reg_lock); 1494 chip->irq = -1; 1495 mutex_init(&chip->irq_mutex); 1496 1497 /* store buffer sizes in bytes */ 1498 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024; 1499 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024; 1500 1501 /* 1502 * The NM256 has two memory ports. The first port is nothing 1503 * more than a chunk of video RAM, which is used as the I/O ring 1504 * buffer. The second port has the actual juicy stuff (like the 1505 * mixer and the playback engine control registers). 1506 */ 1507 1508 chip->buffer_addr = pci_resource_start(pci, 0); 1509 chip->cport_addr = pci_resource_start(pci, 1); 1510 1511 /* Init the memory port info. */ 1512 /* remap control port (#2) */ 1513 chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE, 1514 card->driver); 1515 if (chip->res_cport == NULL) { 1516 dev_err(card->dev, "memory region 0x%lx (size 0x%x) busy\n", 1517 chip->cport_addr, NM_PORT2_SIZE); 1518 err = -EBUSY; 1519 goto __error; 1520 } 1521 chip->cport = ioremap(chip->cport_addr, NM_PORT2_SIZE); 1522 if (chip->cport == NULL) { 1523 dev_err(card->dev, "unable to map control port %lx\n", 1524 chip->cport_addr); 1525 err = -ENOMEM; 1526 goto __error; 1527 } 1528 1529 if (!strcmp(card->driver, "NM256AV")) { 1530 /* Ok, try to see if this is a non-AC97 version of the hardware. */ 1531 pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE); 1532 if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) { 1533 if (! force_ac97) { 1534 dev_err(card->dev, 1535 "no ac97 is found!\n"); 1536 dev_err(card->dev, 1537 "force the driver to load by passing in the module parameter\n"); 1538 dev_err(card->dev, 1539 " force_ac97=1\n"); 1540 dev_err(card->dev, 1541 "or try sb16, opl3sa2, or cs423x drivers instead.\n"); 1542 err = -ENXIO; 1543 goto __error; 1544 } 1545 } 1546 chip->buffer_end = 2560 * 1024; 1547 chip->interrupt = snd_nm256_interrupt; 1548 chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET; 1549 chip->mixer_status_mask = NM_MIXER_READY_MASK; 1550 } else { 1551 /* Not sure if there is any relevant detect for the ZX or not. */ 1552 if (snd_nm256_readb(chip, 0xa0b) != 0) 1553 chip->buffer_end = 6144 * 1024; 1554 else 1555 chip->buffer_end = 4096 * 1024; 1556 1557 chip->interrupt = snd_nm256_interrupt_zx; 1558 chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET; 1559 chip->mixer_status_mask = NM2_MIXER_READY_MASK; 1560 } 1561 1562 chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize + 1563 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize; 1564 if (chip->use_cache) 1565 chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4; 1566 else 1567 chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE; 1568 1569 if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end) 1570 chip->buffer_end = buffer_top; 1571 else { 1572 /* get buffer end pointer from signature */ 1573 if ((err = snd_nm256_peek_for_sig(chip)) < 0) 1574 goto __error; 1575 } 1576 1577 chip->buffer_start = chip->buffer_end - chip->buffer_size; 1578 chip->buffer_addr += chip->buffer_start; 1579 1580 dev_info(card->dev, "Mapping port 1 from 0x%x - 0x%x\n", 1581 chip->buffer_start, chip->buffer_end); 1582 1583 chip->res_buffer = request_mem_region(chip->buffer_addr, 1584 chip->buffer_size, 1585 card->driver); 1586 if (chip->res_buffer == NULL) { 1587 dev_err(card->dev, "buffer 0x%lx (size 0x%x) busy\n", 1588 chip->buffer_addr, chip->buffer_size); 1589 err = -EBUSY; 1590 goto __error; 1591 } 1592 chip->buffer = ioremap(chip->buffer_addr, chip->buffer_size); 1593 if (chip->buffer == NULL) { 1594 err = -ENOMEM; 1595 dev_err(card->dev, "unable to map ring buffer at %lx\n", 1596 chip->buffer_addr); 1597 goto __error; 1598 } 1599 1600 /* set offsets */ 1601 addr = chip->buffer_start; 1602 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr; 1603 addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize; 1604 chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr; 1605 addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize; 1606 if (chip->use_cache) { 1607 chip->all_coeff_buf = addr; 1608 } else { 1609 chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr; 1610 addr += NM_MAX_PLAYBACK_COEF_SIZE; 1611 chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr; 1612 } 1613 1614 /* Fixed setting. */ 1615 chip->mixer_base = NM_MIXER_OFFSET; 1616 1617 chip->coeffs_current = 0; 1618 1619 snd_nm256_init_chip(chip); 1620 1621 // pci_set_master(pci); /* needed? */ 1622 1623 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) 1624 goto __error; 1625 1626 *chip_ret = chip; 1627 return 0; 1628 1629__error: 1630 snd_nm256_free(chip); 1631 return err; 1632} 1633 1634 1635enum { NM_IGNORED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 }; 1636 1637static const struct snd_pci_quirk nm256_quirks[] = { 1638 /* HP omnibook 4150 has cs4232 codec internally */ 1639 SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_IGNORED), 1640 /* Reset workarounds to avoid lock-ups */ 1641 SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND), 1642 SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND), 1643 SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2), 1644 { } /* terminator */ 1645}; 1646 1647 1648static int snd_nm256_probe(struct pci_dev *pci, 1649 const struct pci_device_id *pci_id) 1650{ 1651 struct snd_card *card; 1652 struct nm256 *chip; 1653 int err; 1654 const struct snd_pci_quirk *q; 1655 1656 q = snd_pci_quirk_lookup(pci, nm256_quirks); 1657 if (q) { 1658 dev_dbg(&pci->dev, "Enabled quirk for %s.\n", 1659 snd_pci_quirk_name(q)); 1660 switch (q->value) { 1661 case NM_IGNORED: 1662 dev_info(&pci->dev, 1663 "The device is on the denylist. Loading stopped\n"); 1664 return -ENODEV; 1665 case NM_RESET_WORKAROUND_2: 1666 reset_workaround_2 = 1; 1667 fallthrough; 1668 case NM_RESET_WORKAROUND: 1669 reset_workaround = 1; 1670 break; 1671 } 1672 } 1673 1674 err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card); 1675 if (err < 0) 1676 return err; 1677 1678 switch (pci->device) { 1679 case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO: 1680 strcpy(card->driver, "NM256AV"); 1681 break; 1682 case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO: 1683 strcpy(card->driver, "NM256ZX"); 1684 break; 1685 case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO: 1686 strcpy(card->driver, "NM256XL+"); 1687 break; 1688 default: 1689 dev_err(&pci->dev, "invalid device id 0x%x\n", pci->device); 1690 snd_card_free(card); 1691 return -EINVAL; 1692 } 1693 1694 if (vaio_hack) 1695 buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */ 1696 1697 if (playback_bufsize < 4) 1698 playback_bufsize = 4; 1699 if (playback_bufsize > 128) 1700 playback_bufsize = 128; 1701 if (capture_bufsize < 4) 1702 capture_bufsize = 4; 1703 if (capture_bufsize > 128) 1704 capture_bufsize = 128; 1705 if ((err = snd_nm256_create(card, pci, &chip)) < 0) { 1706 snd_card_free(card); 1707 return err; 1708 } 1709 card->private_data = chip; 1710 1711 if (reset_workaround) { 1712 dev_dbg(&pci->dev, "reset_workaround activated\n"); 1713 chip->reset_workaround = 1; 1714 } 1715 1716 if (reset_workaround_2) { 1717 dev_dbg(&pci->dev, "reset_workaround_2 activated\n"); 1718 chip->reset_workaround_2 = 1; 1719 } 1720 1721 if ((err = snd_nm256_pcm(chip, 0)) < 0 || 1722 (err = snd_nm256_mixer(chip)) < 0) { 1723 snd_card_free(card); 1724 return err; 1725 } 1726 1727 sprintf(card->shortname, "NeoMagic %s", card->driver); 1728 sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d", 1729 card->shortname, 1730 chip->buffer_addr, chip->cport_addr, chip->irq); 1731 1732 if ((err = snd_card_register(card)) < 0) { 1733 snd_card_free(card); 1734 return err; 1735 } 1736 1737 pci_set_drvdata(pci, card); 1738 return 0; 1739} 1740 1741static void snd_nm256_remove(struct pci_dev *pci) 1742{ 1743 snd_card_free(pci_get_drvdata(pci)); 1744} 1745 1746 1747static struct pci_driver nm256_driver = { 1748 .name = KBUILD_MODNAME, 1749 .id_table = snd_nm256_ids, 1750 .probe = snd_nm256_probe, 1751 .remove = snd_nm256_remove, 1752 .driver = { 1753 .pm = NM256_PM_OPS, 1754 }, 1755}; 1756 1757module_pci_driver(nm256_driver); 1758