1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Driver for Digigram miXart soundcards 4 * 5 * DSP firmware management 6 * 7 * Copyright (c) 2003 by Digigram <alsa@digigram.com> 8 */ 9 10#include <linux/interrupt.h> 11#include <linux/pci.h> 12#include <linux/firmware.h> 13#include <linux/vmalloc.h> 14#include <linux/slab.h> 15#include <linux/module.h> 16#include <linux/io.h> 17#include <sound/core.h> 18#include "mixart.h" 19#include "mixart_mixer.h" 20#include "mixart_core.h" 21#include "mixart_hwdep.h" 22 23 24/** 25 * wait for a value on a peudo register, exit with a timeout 26 * 27 * @mgr: pointer to miXart manager structure 28 * @offset: unsigned pseudo_register base + offset of value 29 * @is_egal: wait for the equal value 30 * @value: value 31 * @timeout: timeout in centisenconds 32 */ 33static int mixart_wait_nice_for_register_value(struct mixart_mgr *mgr, 34 u32 offset, int is_egal, 35 u32 value, unsigned long timeout) 36{ 37 unsigned long end_time = jiffies + (timeout * HZ / 100); 38 u32 read; 39 40 do { /* we may take too long time in this loop. 41 * so give controls back to kernel if needed. 42 */ 43 cond_resched(); 44 45 read = readl_be( MIXART_MEM( mgr, offset )); 46 if(is_egal) { 47 if(read == value) return 0; 48 } 49 else { /* wait for different value */ 50 if(read != value) return 0; 51 } 52 } while ( time_after_eq(end_time, jiffies) ); 53 54 return -EBUSY; 55} 56 57 58/* 59 structures needed to upload elf code packets 60 */ 61struct snd_mixart_elf32_ehdr { 62 u8 e_ident[16]; 63 __be16 e_type; 64 __be16 e_machine; 65 __be32 e_version; 66 __be32 e_entry; 67 __be32 e_phoff; 68 __be32 e_shoff; 69 __be32 e_flags; 70 __be16 e_ehsize; 71 __be16 e_phentsize; 72 __be16 e_phnum; 73 __be16 e_shentsize; 74 __be16 e_shnum; 75 __be16 e_shstrndx; 76}; 77 78struct snd_mixart_elf32_phdr { 79 __be32 p_type; 80 __be32 p_offset; 81 __be32 p_vaddr; 82 __be32 p_paddr; 83 __be32 p_filesz; 84 __be32 p_memsz; 85 __be32 p_flags; 86 __be32 p_align; 87}; 88 89static int mixart_load_elf(struct mixart_mgr *mgr, const struct firmware *dsp ) 90{ 91 char elf32_magic_number[4] = {0x7f,'E','L','F'}; 92 struct snd_mixart_elf32_ehdr *elf_header; 93 int i; 94 95 elf_header = (struct snd_mixart_elf32_ehdr *)dsp->data; 96 for( i=0; i<4; i++ ) 97 if ( elf32_magic_number[i] != elf_header->e_ident[i] ) 98 return -EINVAL; 99 100 if( elf_header->e_phoff != 0 ) { 101 struct snd_mixart_elf32_phdr elf_programheader; 102 103 for( i=0; i < be16_to_cpu(elf_header->e_phnum); i++ ) { 104 u32 pos = be32_to_cpu(elf_header->e_phoff) + (u32)(i * be16_to_cpu(elf_header->e_phentsize)); 105 106 memcpy( &elf_programheader, dsp->data + pos, sizeof(elf_programheader) ); 107 108 if(elf_programheader.p_type != 0) { 109 if( elf_programheader.p_filesz != 0 ) { 110 memcpy_toio( MIXART_MEM( mgr, be32_to_cpu(elf_programheader.p_vaddr)), 111 dsp->data + be32_to_cpu( elf_programheader.p_offset ), 112 be32_to_cpu( elf_programheader.p_filesz )); 113 } 114 } 115 } 116 } 117 return 0; 118} 119 120/* 121 * get basic information and init miXart 122 */ 123 124/* audio IDs for request to the board */ 125#define MIXART_FIRST_ANA_AUDIO_ID 0 126#define MIXART_FIRST_DIG_AUDIO_ID 8 127 128static int mixart_enum_connectors(struct mixart_mgr *mgr) 129{ 130 u32 k; 131 int err; 132 struct mixart_msg request; 133 struct mixart_enum_connector_resp *connector; 134 struct mixart_audio_info_req *audio_info_req; 135 struct mixart_audio_info_resp *audio_info; 136 137 connector = kmalloc(sizeof(*connector), GFP_KERNEL); 138 audio_info_req = kmalloc(sizeof(*audio_info_req), GFP_KERNEL); 139 audio_info = kmalloc(sizeof(*audio_info), GFP_KERNEL); 140 if (! connector || ! audio_info_req || ! audio_info) { 141 err = -ENOMEM; 142 goto __error; 143 } 144 145 audio_info_req->line_max_level = MIXART_FLOAT_P_22_0_TO_HEX; 146 audio_info_req->micro_max_level = MIXART_FLOAT_M_20_0_TO_HEX; 147 audio_info_req->cd_max_level = MIXART_FLOAT____0_0_TO_HEX; 148 149 request.message_id = MSG_SYSTEM_ENUM_PLAY_CONNECTOR; 150 request.uid = (struct mixart_uid){0,0}; /* board num = 0 */ 151 request.data = NULL; 152 request.size = 0; 153 154 err = snd_mixart_send_msg(mgr, &request, sizeof(*connector), connector); 155 if((err < 0) || (connector->error_code) || (connector->uid_count > MIXART_MAX_PHYS_CONNECTORS)) { 156 dev_err(&mgr->pci->dev, 157 "error MSG_SYSTEM_ENUM_PLAY_CONNECTOR\n"); 158 err = -EINVAL; 159 goto __error; 160 } 161 162 for(k=0; k < connector->uid_count; k++) { 163 struct mixart_pipe *pipe; 164 165 if(k < MIXART_FIRST_DIG_AUDIO_ID) { 166 pipe = &mgr->chip[k/2]->pipe_out_ana; 167 } else { 168 pipe = &mgr->chip[(k-MIXART_FIRST_DIG_AUDIO_ID)/2]->pipe_out_dig; 169 } 170 if(k & 1) { 171 pipe->uid_right_connector = connector->uid[k]; /* odd */ 172 } else { 173 pipe->uid_left_connector = connector->uid[k]; /* even */ 174 } 175 176 /* dev_dbg(&mgr->pci->dev, "playback connector[%d].object_id = %x\n", k, connector->uid[k].object_id); */ 177 178 /* TODO: really need send_msg MSG_CONNECTOR_GET_AUDIO_INFO for each connector ? perhaps for analog level caps ? */ 179 request.message_id = MSG_CONNECTOR_GET_AUDIO_INFO; 180 request.uid = connector->uid[k]; 181 request.data = audio_info_req; 182 request.size = sizeof(*audio_info_req); 183 184 err = snd_mixart_send_msg(mgr, &request, sizeof(*audio_info), audio_info); 185 if( err < 0 ) { 186 dev_err(&mgr->pci->dev, 187 "error MSG_CONNECTOR_GET_AUDIO_INFO\n"); 188 goto __error; 189 } 190 /*dev_dbg(&mgr->pci->dev, "play analog_info.analog_level_present = %x\n", audio_info->info.analog_info.analog_level_present);*/ 191 } 192 193 request.message_id = MSG_SYSTEM_ENUM_RECORD_CONNECTOR; 194 request.uid = (struct mixart_uid){0,0}; /* board num = 0 */ 195 request.data = NULL; 196 request.size = 0; 197 198 err = snd_mixart_send_msg(mgr, &request, sizeof(*connector), connector); 199 if((err < 0) || (connector->error_code) || (connector->uid_count > MIXART_MAX_PHYS_CONNECTORS)) { 200 dev_err(&mgr->pci->dev, 201 "error MSG_SYSTEM_ENUM_RECORD_CONNECTOR\n"); 202 err = -EINVAL; 203 goto __error; 204 } 205 206 for(k=0; k < connector->uid_count; k++) { 207 struct mixart_pipe *pipe; 208 209 if(k < MIXART_FIRST_DIG_AUDIO_ID) { 210 pipe = &mgr->chip[k/2]->pipe_in_ana; 211 } else { 212 pipe = &mgr->chip[(k-MIXART_FIRST_DIG_AUDIO_ID)/2]->pipe_in_dig; 213 } 214 if(k & 1) { 215 pipe->uid_right_connector = connector->uid[k]; /* odd */ 216 } else { 217 pipe->uid_left_connector = connector->uid[k]; /* even */ 218 } 219 220 /* dev_dbg(&mgr->pci->dev, "capture connector[%d].object_id = %x\n", k, connector->uid[k].object_id); */ 221 222 /* TODO: really need send_msg MSG_CONNECTOR_GET_AUDIO_INFO for each connector ? perhaps for analog level caps ? */ 223 request.message_id = MSG_CONNECTOR_GET_AUDIO_INFO; 224 request.uid = connector->uid[k]; 225 request.data = audio_info_req; 226 request.size = sizeof(*audio_info_req); 227 228 err = snd_mixart_send_msg(mgr, &request, sizeof(*audio_info), audio_info); 229 if( err < 0 ) { 230 dev_err(&mgr->pci->dev, 231 "error MSG_CONNECTOR_GET_AUDIO_INFO\n"); 232 goto __error; 233 } 234 /*dev_dbg(&mgr->pci->dev, "rec analog_info.analog_level_present = %x\n", audio_info->info.analog_info.analog_level_present);*/ 235 } 236 err = 0; 237 238 __error: 239 kfree(connector); 240 kfree(audio_info_req); 241 kfree(audio_info); 242 243 return err; 244} 245 246static int mixart_enum_physio(struct mixart_mgr *mgr) 247{ 248 u32 k; 249 int err; 250 struct mixart_msg request; 251 struct mixart_uid get_console_mgr; 252 struct mixart_return_uid console_mgr; 253 struct mixart_uid_enumeration phys_io; 254 255 /* get the uid for the console manager */ 256 get_console_mgr.object_id = 0; 257 get_console_mgr.desc = MSG_CONSOLE_MANAGER | 0; /* cardindex = 0 */ 258 259 request.message_id = MSG_CONSOLE_GET_CLOCK_UID; 260 request.uid = get_console_mgr; 261 request.data = &get_console_mgr; 262 request.size = sizeof(get_console_mgr); 263 264 err = snd_mixart_send_msg(mgr, &request, sizeof(console_mgr), &console_mgr); 265 266 if( (err < 0) || (console_mgr.error_code != 0) ) { 267 dev_dbg(&mgr->pci->dev, 268 "error MSG_CONSOLE_GET_CLOCK_UID : err=%x\n", 269 console_mgr.error_code); 270 return -EINVAL; 271 } 272 273 /* used later for clock issues ! */ 274 mgr->uid_console_manager = console_mgr.uid; 275 276 request.message_id = MSG_SYSTEM_ENUM_PHYSICAL_IO; 277 request.uid = (struct mixart_uid){0,0}; 278 request.data = &console_mgr.uid; 279 request.size = sizeof(console_mgr.uid); 280 281 err = snd_mixart_send_msg(mgr, &request, sizeof(phys_io), &phys_io); 282 if( (err < 0) || ( phys_io.error_code != 0 ) ) { 283 dev_err(&mgr->pci->dev, 284 "error MSG_SYSTEM_ENUM_PHYSICAL_IO err(%x) error_code(%x)\n", 285 err, phys_io.error_code); 286 return -EINVAL; 287 } 288 289 /* min 2 phys io per card (analog in + analog out) */ 290 if (phys_io.nb_uid < MIXART_MAX_CARDS * 2) 291 return -EINVAL; 292 293 for(k=0; k<mgr->num_cards; k++) { 294 mgr->chip[k]->uid_in_analog_physio = phys_io.uid[k]; 295 mgr->chip[k]->uid_out_analog_physio = phys_io.uid[phys_io.nb_uid/2 + k]; 296 } 297 298 return 0; 299} 300 301 302static int mixart_first_init(struct mixart_mgr *mgr) 303{ 304 u32 k; 305 int err; 306 struct mixart_msg request; 307 308 if((err = mixart_enum_connectors(mgr)) < 0) return err; 309 310 if((err = mixart_enum_physio(mgr)) < 0) return err; 311 312 /* send a synchro command to card (necessary to do this before first MSG_STREAM_START_STREAM_GRP_PACKET) */ 313 /* though why not here */ 314 request.message_id = MSG_SYSTEM_SEND_SYNCHRO_CMD; 315 request.uid = (struct mixart_uid){0,0}; 316 request.data = NULL; 317 request.size = 0; 318 /* this command has no data. response is a 32 bit status */ 319 err = snd_mixart_send_msg(mgr, &request, sizeof(k), &k); 320 if( (err < 0) || (k != 0) ) { 321 dev_err(&mgr->pci->dev, "error MSG_SYSTEM_SEND_SYNCHRO_CMD\n"); 322 return err == 0 ? -EINVAL : err; 323 } 324 325 return 0; 326} 327 328 329/* firmware base addresses (when hard coded) */ 330#define MIXART_MOTHERBOARD_XLX_BASE_ADDRESS 0x00600000 331 332static int mixart_dsp_load(struct mixart_mgr* mgr, int index, const struct firmware *dsp) 333{ 334 int err, card_index; 335 u32 status_xilinx, status_elf, status_daught; 336 u32 val; 337 338 /* read motherboard xilinx status */ 339 status_xilinx = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_MXLX_STATUS_OFFSET )); 340 /* read elf status */ 341 status_elf = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_ELF_STATUS_OFFSET )); 342 /* read daughterboard xilinx status */ 343 status_daught = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_DXLX_STATUS_OFFSET )); 344 345 /* motherboard xilinx status 5 will say that the board is performing a reset */ 346 if (status_xilinx == 5) { 347 dev_err(&mgr->pci->dev, "miXart is resetting !\n"); 348 return -EAGAIN; /* try again later */ 349 } 350 351 switch (index) { 352 case MIXART_MOTHERBOARD_XLX_INDEX: 353 354 /* xilinx already loaded ? */ 355 if (status_xilinx == 4) { 356 dev_dbg(&mgr->pci->dev, "xilinx is already loaded !\n"); 357 return 0; 358 } 359 /* the status should be 0 == "idle" */ 360 if (status_xilinx != 0) { 361 dev_err(&mgr->pci->dev, 362 "xilinx load error ! status = %d\n", 363 status_xilinx); 364 return -EIO; /* modprob -r may help ? */ 365 } 366 367 /* check xilinx validity */ 368 if (((u32*)(dsp->data))[0] == 0xffffffff) 369 return -EINVAL; 370 if (dsp->size % 4) 371 return -EINVAL; 372 373 /* set xilinx status to copying */ 374 writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET )); 375 376 /* setup xilinx base address */ 377 writel_be( MIXART_MOTHERBOARD_XLX_BASE_ADDRESS, MIXART_MEM( mgr,MIXART_PSEUDOREG_MXLX_BASE_ADDR_OFFSET )); 378 /* setup code size for xilinx file */ 379 writel_be( dsp->size, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_SIZE_OFFSET )); 380 381 /* copy xilinx code */ 382 memcpy_toio( MIXART_MEM( mgr, MIXART_MOTHERBOARD_XLX_BASE_ADDRESS), dsp->data, dsp->size); 383 384 /* set xilinx status to copy finished */ 385 writel_be( 2, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET )); 386 387 /* return, because no further processing needed */ 388 return 0; 389 390 case MIXART_MOTHERBOARD_ELF_INDEX: 391 392 if (status_elf == 4) { 393 dev_dbg(&mgr->pci->dev, "elf file already loaded !\n"); 394 return 0; 395 } 396 397 /* the status should be 0 == "idle" */ 398 if (status_elf != 0) { 399 dev_err(&mgr->pci->dev, 400 "elf load error ! status = %d\n", 401 status_elf); 402 return -EIO; /* modprob -r may help ? */ 403 } 404 405 /* wait for xilinx status == 4 */ 406 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET, 1, 4, 500); /* 5sec */ 407 if (err < 0) { 408 dev_err(&mgr->pci->dev, "xilinx was not loaded or " 409 "could not be started\n"); 410 return err; 411 } 412 413 /* init some data on the card */ 414 writel_be( 0, MIXART_MEM( mgr, MIXART_PSEUDOREG_BOARDNUMBER ) ); /* set miXart boardnumber to 0 */ 415 writel_be( 0, MIXART_MEM( mgr, MIXART_FLOWTABLE_PTR ) ); /* reset pointer to flow table on miXart */ 416 417 /* set elf status to copying */ 418 writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET )); 419 420 /* process the copying of the elf packets */ 421 err = mixart_load_elf( mgr, dsp ); 422 if (err < 0) return err; 423 424 /* set elf status to copy finished */ 425 writel_be( 2, MIXART_MEM( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET )); 426 427 /* wait for elf status == 4 */ 428 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET, 1, 4, 300); /* 3sec */ 429 if (err < 0) { 430 dev_err(&mgr->pci->dev, "elf could not be started\n"); 431 return err; 432 } 433 434 /* miXart waits at this point on the pointer to the flow table */ 435 writel_be( (u32)mgr->flowinfo.addr, MIXART_MEM( mgr, MIXART_FLOWTABLE_PTR ) ); /* give pointer of flow table to miXart */ 436 437 return 0; /* return, another xilinx file has to be loaded before */ 438 439 case MIXART_AESEBUBOARD_XLX_INDEX: 440 default: 441 442 /* elf and xilinx should be loaded */ 443 if (status_elf != 4 || status_xilinx != 4) { 444 dev_err(&mgr->pci->dev, "xilinx or elf not " 445 "successfully loaded\n"); 446 return -EIO; /* modprob -r may help ? */ 447 } 448 449 /* wait for daughter detection != 0 */ 450 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DBRD_PRESENCE_OFFSET, 0, 0, 30); /* 300msec */ 451 if (err < 0) { 452 dev_err(&mgr->pci->dev, "error starting elf file\n"); 453 return err; 454 } 455 456 /* the board type can now be retrieved */ 457 mgr->board_type = (DAUGHTER_TYPE_MASK & readl_be( MIXART_MEM( mgr, MIXART_PSEUDOREG_DBRD_TYPE_OFFSET))); 458 459 if (mgr->board_type == MIXART_DAUGHTER_TYPE_NONE) 460 break; /* no daughter board; the file does not have to be loaded, continue after the switch */ 461 462 /* only if aesebu daughter board presence (elf code must run) */ 463 if (mgr->board_type != MIXART_DAUGHTER_TYPE_AES ) 464 return -EINVAL; 465 466 /* daughter should be idle */ 467 if (status_daught != 0) { 468 dev_err(&mgr->pci->dev, 469 "daughter load error ! status = %d\n", 470 status_daught); 471 return -EIO; /* modprob -r may help ? */ 472 } 473 474 /* check daughterboard xilinx validity */ 475 if (((u32*)(dsp->data))[0] == 0xffffffff) 476 return -EINVAL; 477 if (dsp->size % 4) 478 return -EINVAL; 479 480 /* inform mixart about the size of the file */ 481 writel_be( dsp->size, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_SIZE_OFFSET )); 482 483 /* set daughterboard status to 1 */ 484 writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET )); 485 486 /* wait for status == 2 */ 487 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET, 1, 2, 30); /* 300msec */ 488 if (err < 0) { 489 dev_err(&mgr->pci->dev, "daughter board load error\n"); 490 return err; 491 } 492 493 /* get the address where to write the file */ 494 val = readl_be( MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_BASE_ADDR_OFFSET )); 495 if (!val) 496 return -EINVAL; 497 498 /* copy daughterboard xilinx code */ 499 memcpy_toio( MIXART_MEM( mgr, val), dsp->data, dsp->size); 500 501 /* set daughterboard status to 4 */ 502 writel_be( 4, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET )); 503 504 /* continue with init */ 505 break; 506 } /* end of switch file index*/ 507 508 /* wait for daughter status == 3 */ 509 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET, 1, 3, 300); /* 3sec */ 510 if (err < 0) { 511 dev_err(&mgr->pci->dev, 512 "daughter board could not be initialised\n"); 513 return err; 514 } 515 516 /* init mailbox (communication with embedded) */ 517 snd_mixart_init_mailbox(mgr); 518 519 /* first communication with embedded */ 520 err = mixart_first_init(mgr); 521 if (err < 0) { 522 dev_err(&mgr->pci->dev, "miXart could not be set up\n"); 523 return err; 524 } 525 526 /* create devices and mixer in accordance with HW options*/ 527 for (card_index = 0; card_index < mgr->num_cards; card_index++) { 528 struct snd_mixart *chip = mgr->chip[card_index]; 529 530 if ((err = snd_mixart_create_pcm(chip)) < 0) 531 return err; 532 533 if (card_index == 0) { 534 if ((err = snd_mixart_create_mixer(chip->mgr)) < 0) 535 return err; 536 } 537 538 if ((err = snd_card_register(chip->card)) < 0) 539 return err; 540 } 541 542 dev_dbg(&mgr->pci->dev, 543 "miXart firmware downloaded and successfully set up\n"); 544 545 return 0; 546} 547 548 549int snd_mixart_setup_firmware(struct mixart_mgr *mgr) 550{ 551 static const char * const fw_files[3] = { 552 "miXart8.xlx", "miXart8.elf", "miXart8AES.xlx" 553 }; 554 char path[32]; 555 556 const struct firmware *fw_entry; 557 int i, err; 558 559 for (i = 0; i < 3; i++) { 560 sprintf(path, "mixart/%s", fw_files[i]); 561 if (request_firmware(&fw_entry, path, &mgr->pci->dev)) { 562 dev_err(&mgr->pci->dev, 563 "miXart: can't load firmware %s\n", path); 564 return -ENOENT; 565 } 566 /* fake hwdep dsp record */ 567 err = mixart_dsp_load(mgr, i, fw_entry); 568 release_firmware(fw_entry); 569 if (err < 0) 570 return err; 571 mgr->dsp_loaded |= 1 << i; 572 } 573 return 0; 574} 575 576MODULE_FIRMWARE("mixart/miXart8.xlx"); 577MODULE_FIRMWARE("mixart/miXart8.elf"); 578MODULE_FIRMWARE("mixart/miXart8AES.xlx"); 579