1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT) 4 * VIA VT1720 (Envy24PT) 5 * 6 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 7 * 2002 James Stafford <jstafford@ampltd.com> 8 * 2003 Takashi Iwai <tiwai@suse.de> 9 */ 10 11#include <linux/delay.h> 12#include <linux/interrupt.h> 13#include <linux/init.h> 14#include <linux/pci.h> 15#include <linux/slab.h> 16#include <linux/module.h> 17#include <linux/mutex.h> 18#include <sound/core.h> 19#include <sound/info.h> 20#include <sound/rawmidi.h> 21#include <sound/initval.h> 22 23#include <sound/asoundef.h> 24 25#include "ice1712.h" 26#include "envy24ht.h" 27 28/* lowlevel routines */ 29#include "amp.h" 30#include "revo.h" 31#include "aureon.h" 32#include "vt1720_mobo.h" 33#include "pontis.h" 34#include "prodigy192.h" 35#include "prodigy_hifi.h" 36#include "juli.h" 37#include "maya44.h" 38#include "phase.h" 39#include "wtm.h" 40#include "se.h" 41#include "quartet.h" 42#include "psc724.h" 43 44MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 45MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)"); 46MODULE_LICENSE("GPL"); 47MODULE_SUPPORTED_DEVICE("{" 48 REVO_DEVICE_DESC 49 AMP_AUDIO2000_DEVICE_DESC 50 AUREON_DEVICE_DESC 51 VT1720_MOBO_DEVICE_DESC 52 PONTIS_DEVICE_DESC 53 PRODIGY192_DEVICE_DESC 54 PRODIGY_HIFI_DEVICE_DESC 55 JULI_DEVICE_DESC 56 MAYA44_DEVICE_DESC 57 PHASE_DEVICE_DESC 58 WTM_DEVICE_DESC 59 SE_DEVICE_DESC 60 QTET_DEVICE_DESC 61 "{VIA,VT1720}," 62 "{VIA,VT1724}," 63 "{ICEnsemble,Generic ICE1724}," 64 "{ICEnsemble,Generic Envy24HT}" 65 "{ICEnsemble,Generic Envy24PT}}"); 66 67static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 68static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 69static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 70static char *model[SNDRV_CARDS]; 71 72module_param_array(index, int, NULL, 0444); 73MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard."); 74module_param_array(id, charp, NULL, 0444); 75MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard."); 76module_param_array(enable, bool, NULL, 0444); 77MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard."); 78module_param_array(model, charp, NULL, 0444); 79MODULE_PARM_DESC(model, "Use the given board model."); 80 81 82/* Both VT1720 and VT1724 have the same PCI IDs */ 83static const struct pci_device_id snd_vt1724_ids[] = { 84 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 }, 85 { 0, } 86}; 87 88MODULE_DEVICE_TABLE(pci, snd_vt1724_ids); 89 90 91static int PRO_RATE_LOCKED; 92static int PRO_RATE_RESET = 1; 93static unsigned int PRO_RATE_DEFAULT = 44100; 94 95static const char * const ext_clock_names[1] = { "IEC958 In" }; 96 97/* 98 * Basic I/O 99 */ 100 101/* 102 * default rates, default clock routines 103 */ 104 105/* check whether the clock mode is spdif-in */ 106static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice) 107{ 108 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0; 109} 110 111/* 112 * locking rate makes sense only for internal clock mode 113 */ 114static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 115{ 116 return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED; 117} 118 119/* 120 * ac97 section 121 */ 122 123static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice) 124{ 125 unsigned char old_cmd; 126 int tm; 127 for (tm = 0; tm < 0x10000; tm++) { 128 old_cmd = inb(ICEMT1724(ice, AC97_CMD)); 129 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ)) 130 continue; 131 if (!(old_cmd & VT1724_AC97_READY)) 132 continue; 133 return old_cmd; 134 } 135 dev_dbg(ice->card->dev, "snd_vt1724_ac97_ready: timeout\n"); 136 return old_cmd; 137} 138 139static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit) 140{ 141 int tm; 142 for (tm = 0; tm < 0x10000; tm++) 143 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0) 144 return 0; 145 dev_dbg(ice->card->dev, "snd_vt1724_ac97_wait_bit: timeout\n"); 146 return -EIO; 147} 148 149static void snd_vt1724_ac97_write(struct snd_ac97 *ac97, 150 unsigned short reg, 151 unsigned short val) 152{ 153 struct snd_ice1712 *ice = ac97->private_data; 154 unsigned char old_cmd; 155 156 old_cmd = snd_vt1724_ac97_ready(ice); 157 old_cmd &= ~VT1724_AC97_ID_MASK; 158 old_cmd |= ac97->num; 159 outb(reg, ICEMT1724(ice, AC97_INDEX)); 160 outw(val, ICEMT1724(ice, AC97_DATA)); 161 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD)); 162 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE); 163} 164 165static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 166{ 167 struct snd_ice1712 *ice = ac97->private_data; 168 unsigned char old_cmd; 169 170 old_cmd = snd_vt1724_ac97_ready(ice); 171 old_cmd &= ~VT1724_AC97_ID_MASK; 172 old_cmd |= ac97->num; 173 outb(reg, ICEMT1724(ice, AC97_INDEX)); 174 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD)); 175 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0) 176 return ~0; 177 return inw(ICEMT1724(ice, AC97_DATA)); 178} 179 180 181/* 182 * GPIO operations 183 */ 184 185/* set gpio direction 0 = read, 1 = write */ 186static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 187{ 188 outl(data, ICEREG1724(ice, GPIO_DIRECTION)); 189 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */ 190} 191 192/* get gpio direction 0 = read, 1 = write */ 193static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice) 194{ 195 return inl(ICEREG1724(ice, GPIO_DIRECTION)); 196} 197 198/* set the gpio mask (0 = writable) */ 199static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 200{ 201 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK)); 202 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */ 203 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22)); 204 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */ 205} 206 207static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice) 208{ 209 unsigned int mask; 210 if (!ice->vt1720) 211 mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22)); 212 else 213 mask = 0; 214 mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK)); 215 return mask; 216} 217 218static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data) 219{ 220 outw(data, ICEREG1724(ice, GPIO_DATA)); 221 if (!ice->vt1720) 222 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22)); 223 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */ 224} 225 226static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice) 227{ 228 unsigned int data; 229 if (!ice->vt1720) 230 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22)); 231 else 232 data = 0; 233 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA)); 234 return data; 235} 236 237/* 238 * MIDI 239 */ 240 241static void vt1724_midi_clear_rx(struct snd_ice1712 *ice) 242{ 243 unsigned int count; 244 245 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count) 246 inb(ICEREG1724(ice, MPU_DATA)); 247} 248 249static inline struct snd_rawmidi_substream * 250get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream) 251{ 252 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams, 253 struct snd_rawmidi_substream, list); 254} 255 256static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable); 257 258static void vt1724_midi_write(struct snd_ice1712 *ice) 259{ 260 struct snd_rawmidi_substream *s; 261 int count, i; 262 u8 buffer[32]; 263 264 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT); 265 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO)); 266 if (count > 0) { 267 count = snd_rawmidi_transmit(s, buffer, count); 268 for (i = 0; i < count; ++i) 269 outb(buffer[i], ICEREG1724(ice, MPU_DATA)); 270 } 271 /* mask irq when all bytes have been transmitted. 272 * enabled again in output_trigger when the new data comes in. 273 */ 274 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 275 !snd_rawmidi_transmit_empty(s)); 276} 277 278static void vt1724_midi_read(struct snd_ice1712 *ice) 279{ 280 struct snd_rawmidi_substream *s; 281 int count, i; 282 u8 buffer[32]; 283 284 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT); 285 count = inb(ICEREG1724(ice, MPU_RXFIFO)); 286 if (count > 0) { 287 count = min(count, 32); 288 for (i = 0; i < count; ++i) 289 buffer[i] = inb(ICEREG1724(ice, MPU_DATA)); 290 snd_rawmidi_receive(s, buffer, count); 291 } 292} 293 294/* call with ice->reg_lock */ 295static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable) 296{ 297 u8 mask = inb(ICEREG1724(ice, IRQMASK)); 298 if (enable) 299 mask &= ~flag; 300 else 301 mask |= flag; 302 outb(mask, ICEREG1724(ice, IRQMASK)); 303} 304 305static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream, 306 u8 flag, int enable) 307{ 308 struct snd_ice1712 *ice = substream->rmidi->private_data; 309 310 spin_lock_irq(&ice->reg_lock); 311 enable_midi_irq(ice, flag, enable); 312 spin_unlock_irq(&ice->reg_lock); 313} 314 315static int vt1724_midi_output_open(struct snd_rawmidi_substream *s) 316{ 317 return 0; 318} 319 320static int vt1724_midi_output_close(struct snd_rawmidi_substream *s) 321{ 322 return 0; 323} 324 325static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up) 326{ 327 struct snd_ice1712 *ice = s->rmidi->private_data; 328 unsigned long flags; 329 330 spin_lock_irqsave(&ice->reg_lock, flags); 331 if (up) { 332 ice->midi_output = 1; 333 vt1724_midi_write(ice); 334 } else { 335 ice->midi_output = 0; 336 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 337 } 338 spin_unlock_irqrestore(&ice->reg_lock, flags); 339} 340 341static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s) 342{ 343 struct snd_ice1712 *ice = s->rmidi->private_data; 344 unsigned long timeout; 345 346 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0); 347 /* 32 bytes should be transmitted in less than about 12 ms */ 348 timeout = jiffies + msecs_to_jiffies(15); 349 do { 350 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY) 351 break; 352 schedule_timeout_uninterruptible(1); 353 } while (time_after(timeout, jiffies)); 354} 355 356static const struct snd_rawmidi_ops vt1724_midi_output_ops = { 357 .open = vt1724_midi_output_open, 358 .close = vt1724_midi_output_close, 359 .trigger = vt1724_midi_output_trigger, 360 .drain = vt1724_midi_output_drain, 361}; 362 363static int vt1724_midi_input_open(struct snd_rawmidi_substream *s) 364{ 365 vt1724_midi_clear_rx(s->rmidi->private_data); 366 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1); 367 return 0; 368} 369 370static int vt1724_midi_input_close(struct snd_rawmidi_substream *s) 371{ 372 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0); 373 return 0; 374} 375 376static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up) 377{ 378 struct snd_ice1712 *ice = s->rmidi->private_data; 379 unsigned long flags; 380 381 spin_lock_irqsave(&ice->reg_lock, flags); 382 if (up) { 383 ice->midi_input = 1; 384 vt1724_midi_read(ice); 385 } else { 386 ice->midi_input = 0; 387 } 388 spin_unlock_irqrestore(&ice->reg_lock, flags); 389} 390 391static const struct snd_rawmidi_ops vt1724_midi_input_ops = { 392 .open = vt1724_midi_input_open, 393 .close = vt1724_midi_input_close, 394 .trigger = vt1724_midi_input_trigger, 395}; 396 397 398/* 399 * Interrupt handler 400 */ 401 402static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id) 403{ 404 struct snd_ice1712 *ice = dev_id; 405 unsigned char status; 406 unsigned char status_mask = 407 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM; 408 int handled = 0; 409 int timeout = 0; 410 411 while (1) { 412 status = inb(ICEREG1724(ice, IRQSTAT)); 413 status &= status_mask; 414 if (status == 0) 415 break; 416 spin_lock(&ice->reg_lock); 417 if (++timeout > 10) { 418 status = inb(ICEREG1724(ice, IRQSTAT)); 419 dev_err(ice->card->dev, 420 "Too long irq loop, status = 0x%x\n", status); 421 if (status & VT1724_IRQ_MPU_TX) { 422 dev_err(ice->card->dev, "Disabling MPU_TX\n"); 423 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 424 } 425 spin_unlock(&ice->reg_lock); 426 break; 427 } 428 handled = 1; 429 if (status & VT1724_IRQ_MPU_TX) { 430 if (ice->midi_output) 431 vt1724_midi_write(ice); 432 else 433 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 434 /* Due to mysterical reasons, MPU_TX is always 435 * generated (and can't be cleared) when a PCM 436 * playback is going. So let's ignore at the 437 * next loop. 438 */ 439 status_mask &= ~VT1724_IRQ_MPU_TX; 440 } 441 if (status & VT1724_IRQ_MPU_RX) { 442 if (ice->midi_input) 443 vt1724_midi_read(ice); 444 else 445 vt1724_midi_clear_rx(ice); 446 } 447 /* ack MPU irq */ 448 outb(status, ICEREG1724(ice, IRQSTAT)); 449 spin_unlock(&ice->reg_lock); 450 if (status & VT1724_IRQ_MTPCM) { 451 /* 452 * Multi-track PCM 453 * PCM assignment are: 454 * Playback DMA0 (M/C) = playback_pro_substream 455 * Playback DMA1 = playback_con_substream_ds[0] 456 * Playback DMA2 = playback_con_substream_ds[1] 457 * Playback DMA3 = playback_con_substream_ds[2] 458 * Playback DMA4 (SPDIF) = playback_con_substream 459 * Record DMA0 = capture_pro_substream 460 * Record DMA1 = capture_con_substream 461 */ 462 unsigned char mtstat = inb(ICEMT1724(ice, IRQ)); 463 if (mtstat & VT1724_MULTI_PDMA0) { 464 if (ice->playback_pro_substream) 465 snd_pcm_period_elapsed(ice->playback_pro_substream); 466 } 467 if (mtstat & VT1724_MULTI_RDMA0) { 468 if (ice->capture_pro_substream) 469 snd_pcm_period_elapsed(ice->capture_pro_substream); 470 } 471 if (mtstat & VT1724_MULTI_PDMA1) { 472 if (ice->playback_con_substream_ds[0]) 473 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]); 474 } 475 if (mtstat & VT1724_MULTI_PDMA2) { 476 if (ice->playback_con_substream_ds[1]) 477 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]); 478 } 479 if (mtstat & VT1724_MULTI_PDMA3) { 480 if (ice->playback_con_substream_ds[2]) 481 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]); 482 } 483 if (mtstat & VT1724_MULTI_PDMA4) { 484 if (ice->playback_con_substream) 485 snd_pcm_period_elapsed(ice->playback_con_substream); 486 } 487 if (mtstat & VT1724_MULTI_RDMA1) { 488 if (ice->capture_con_substream) 489 snd_pcm_period_elapsed(ice->capture_con_substream); 490 } 491 /* ack anyway to avoid freeze */ 492 outb(mtstat, ICEMT1724(ice, IRQ)); 493 /* ought to really handle this properly */ 494 if (mtstat & VT1724_MULTI_FIFO_ERR) { 495 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR)); 496 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR)); 497 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK)); 498 /* If I don't do this, I get machine lockup due to continual interrupts */ 499 } 500 501 } 502 } 503 return IRQ_RETVAL(handled); 504} 505 506/* 507 * PCM code - professional part (multitrack) 508 */ 509 510static const unsigned int rates[] = { 511 8000, 9600, 11025, 12000, 16000, 22050, 24000, 512 32000, 44100, 48000, 64000, 88200, 96000, 513 176400, 192000, 514}; 515 516static const struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = { 517 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */ 518 .list = rates, 519 .mask = 0, 520}; 521 522static const struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = { 523 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */ 524 .list = rates, 525 .mask = 0, 526}; 527 528static const struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = { 529 .count = ARRAY_SIZE(rates), 530 .list = rates, 531 .mask = 0, 532}; 533 534struct vt1724_pcm_reg { 535 unsigned int addr; /* ADDR register offset */ 536 unsigned int size; /* SIZE register offset */ 537 unsigned int count; /* COUNT register offset */ 538 unsigned int start; /* start & pause bit */ 539}; 540 541static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 542{ 543 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 544 unsigned char what; 545 unsigned char old; 546 struct snd_pcm_substream *s; 547 548 what = 0; 549 snd_pcm_group_for_each_entry(s, substream) { 550 if (snd_pcm_substream_chip(s) == ice) { 551 const struct vt1724_pcm_reg *reg; 552 reg = s->runtime->private_data; 553 what |= reg->start; 554 snd_pcm_trigger_done(s, substream); 555 } 556 } 557 558 switch (cmd) { 559 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 560 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 561 spin_lock(&ice->reg_lock); 562 old = inb(ICEMT1724(ice, DMA_PAUSE)); 563 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 564 old |= what; 565 else 566 old &= ~what; 567 outb(old, ICEMT1724(ice, DMA_PAUSE)); 568 spin_unlock(&ice->reg_lock); 569 break; 570 571 case SNDRV_PCM_TRIGGER_START: 572 case SNDRV_PCM_TRIGGER_STOP: 573 case SNDRV_PCM_TRIGGER_SUSPEND: 574 spin_lock(&ice->reg_lock); 575 old = inb(ICEMT1724(ice, DMA_CONTROL)); 576 if (cmd == SNDRV_PCM_TRIGGER_START) 577 old |= what; 578 else 579 old &= ~what; 580 outb(old, ICEMT1724(ice, DMA_CONTROL)); 581 spin_unlock(&ice->reg_lock); 582 break; 583 584 case SNDRV_PCM_TRIGGER_RESUME: 585 /* apps will have to restart stream */ 586 break; 587 588 default: 589 return -EINVAL; 590 } 591 return 0; 592} 593 594/* 595 */ 596 597#define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\ 598 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START) 599#define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\ 600 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE) 601 602static const unsigned int stdclock_rate_list[16] = { 603 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100, 604 22050, 11025, 88200, 176400, 0, 192000, 64000 605}; 606 607static unsigned int stdclock_get_rate(struct snd_ice1712 *ice) 608{ 609 return stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15]; 610} 611 612static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate) 613{ 614 int i; 615 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) { 616 if (stdclock_rate_list[i] == rate) { 617 outb(i, ICEMT1724(ice, RATE)); 618 return; 619 } 620 } 621} 622 623static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice, 624 unsigned int rate) 625{ 626 unsigned char val, old; 627 /* check MT02 */ 628 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 629 val = old = inb(ICEMT1724(ice, I2S_FORMAT)); 630 if (rate > 96000) 631 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */ 632 else 633 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */ 634 if (val != old) { 635 outb(val, ICEMT1724(ice, I2S_FORMAT)); 636 /* master clock changed */ 637 return 1; 638 } 639 } 640 /* no change in master clock */ 641 return 0; 642} 643 644static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, 645 int force) 646{ 647 unsigned long flags; 648 unsigned char mclk_change; 649 unsigned int i, old_rate; 650 bool call_set_rate = false; 651 652 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1]) 653 return -EINVAL; 654 655 spin_lock_irqsave(&ice->reg_lock, flags); 656 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) || 657 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) { 658 /* running? we cannot change the rate now... */ 659 spin_unlock_irqrestore(&ice->reg_lock, flags); 660 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY; 661 } 662 if (!force && is_pro_rate_locked(ice)) { 663 /* comparing required and current rate - makes sense for 664 * internal clock only */ 665 spin_unlock_irqrestore(&ice->reg_lock, flags); 666 return (rate == ice->cur_rate) ? 0 : -EBUSY; 667 } 668 669 if (force || !ice->is_spdif_master(ice)) { 670 /* force means the rate was switched by ucontrol, otherwise 671 * setting clock rate for internal clock mode */ 672 old_rate = ice->get_rate(ice); 673 if (force || (old_rate != rate)) 674 call_set_rate = true; 675 else if (rate == ice->cur_rate) { 676 spin_unlock_irqrestore(&ice->reg_lock, flags); 677 return 0; 678 } 679 } 680 681 ice->cur_rate = rate; 682 spin_unlock_irqrestore(&ice->reg_lock, flags); 683 684 if (call_set_rate) 685 ice->set_rate(ice, rate); 686 687 /* setting master clock */ 688 mclk_change = ice->set_mclk(ice, rate); 689 690 if (mclk_change && ice->gpio.i2s_mclk_changed) 691 ice->gpio.i2s_mclk_changed(ice); 692 if (ice->gpio.set_pro_rate) 693 ice->gpio.set_pro_rate(ice, rate); 694 695 /* set up codecs */ 696 for (i = 0; i < ice->akm_codecs; i++) { 697 if (ice->akm[i].ops.set_rate_val) 698 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 699 } 700 if (ice->spdif.ops.setup_rate) 701 ice->spdif.ops.setup_rate(ice, rate); 702 703 return 0; 704} 705 706static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream, 707 struct snd_pcm_hw_params *hw_params) 708{ 709 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 710 int i, chs; 711 712 chs = params_channels(hw_params); 713 mutex_lock(&ice->open_mutex); 714 /* mark surround channels */ 715 if (substream == ice->playback_pro_substream) { 716 /* PDMA0 can be multi-channel up to 8 */ 717 chs = chs / 2 - 1; 718 for (i = 0; i < chs; i++) { 719 if (ice->pcm_reserved[i] && 720 ice->pcm_reserved[i] != substream) { 721 mutex_unlock(&ice->open_mutex); 722 return -EBUSY; 723 } 724 ice->pcm_reserved[i] = substream; 725 } 726 for (; i < 3; i++) { 727 if (ice->pcm_reserved[i] == substream) 728 ice->pcm_reserved[i] = NULL; 729 } 730 } else { 731 for (i = 0; i < 3; i++) { 732 /* check individual playback stream */ 733 if (ice->playback_con_substream_ds[i] == substream) { 734 if (ice->pcm_reserved[i] && 735 ice->pcm_reserved[i] != substream) { 736 mutex_unlock(&ice->open_mutex); 737 return -EBUSY; 738 } 739 ice->pcm_reserved[i] = substream; 740 break; 741 } 742 } 743 } 744 mutex_unlock(&ice->open_mutex); 745 746 return snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0); 747} 748 749static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream) 750{ 751 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 752 int i; 753 754 mutex_lock(&ice->open_mutex); 755 /* unmark surround channels */ 756 for (i = 0; i < 3; i++) 757 if (ice->pcm_reserved[i] == substream) 758 ice->pcm_reserved[i] = NULL; 759 mutex_unlock(&ice->open_mutex); 760 return 0; 761} 762 763static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream) 764{ 765 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 766 unsigned char val; 767 unsigned int size; 768 769 spin_lock_irq(&ice->reg_lock); 770 val = (8 - substream->runtime->channels) >> 1; 771 outb(val, ICEMT1724(ice, BURST)); 772 773 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR)); 774 775 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1; 776 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */ 777 outw(size, ICEMT1724(ice, PLAYBACK_SIZE)); 778 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2); 779 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 780 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */ 781 outw(size, ICEMT1724(ice, PLAYBACK_COUNT)); 782 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2); 783 784 spin_unlock_irq(&ice->reg_lock); 785 786 /* 787 dev_dbg(ice->card->dev, "pro prepare: ch = %d, addr = 0x%x, " 788 "buffer = 0x%x, period = 0x%x\n", 789 substream->runtime->channels, 790 (unsigned int)substream->runtime->dma_addr, 791 snd_pcm_lib_buffer_bytes(substream), 792 snd_pcm_lib_period_bytes(substream)); 793 */ 794 return 0; 795} 796 797static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream) 798{ 799 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 800 size_t ptr; 801 802 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START)) 803 return 0; 804#if 0 /* read PLAYBACK_ADDR */ 805 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR)); 806 if (ptr < substream->runtime->dma_addr) { 807 dev_dbg(ice->card->dev, "invalid negative ptr\n"); 808 return 0; 809 } 810 ptr -= substream->runtime->dma_addr; 811 ptr = bytes_to_frames(substream->runtime, ptr); 812 if (ptr >= substream->runtime->buffer_size) { 813 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 814 (int)ptr, (int)substream->runtime->period_size); 815 return 0; 816 } 817#else /* read PLAYBACK_SIZE */ 818 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff; 819 ptr = (ptr + 1) << 2; 820 ptr = bytes_to_frames(substream->runtime, ptr); 821 if (!ptr) 822 ; 823 else if (ptr <= substream->runtime->buffer_size) 824 ptr = substream->runtime->buffer_size - ptr; 825 else { 826 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 827 (int)ptr, (int)substream->runtime->buffer_size); 828 ptr = 0; 829 } 830#endif 831 return ptr; 832} 833 834static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream) 835{ 836 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 837 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 838 839 spin_lock_irq(&ice->reg_lock); 840 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr); 841 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, 842 ice->profi_port + reg->size); 843 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, 844 ice->profi_port + reg->count); 845 spin_unlock_irq(&ice->reg_lock); 846 return 0; 847} 848 849static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream) 850{ 851 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 852 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 853 size_t ptr; 854 855 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start)) 856 return 0; 857#if 0 /* use ADDR register */ 858 ptr = inl(ice->profi_port + reg->addr); 859 ptr -= substream->runtime->dma_addr; 860 return bytes_to_frames(substream->runtime, ptr); 861#else /* use SIZE register */ 862 ptr = inw(ice->profi_port + reg->size); 863 ptr = (ptr + 1) << 2; 864 ptr = bytes_to_frames(substream->runtime, ptr); 865 if (!ptr) 866 ; 867 else if (ptr <= substream->runtime->buffer_size) 868 ptr = substream->runtime->buffer_size - ptr; 869 else { 870 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 871 (int)ptr, (int)substream->runtime->buffer_size); 872 ptr = 0; 873 } 874 return ptr; 875#endif 876} 877 878static const struct vt1724_pcm_reg vt1724_pdma0_reg = { 879 .addr = VT1724_MT_PLAYBACK_ADDR, 880 .size = VT1724_MT_PLAYBACK_SIZE, 881 .count = VT1724_MT_PLAYBACK_COUNT, 882 .start = VT1724_PDMA0_START, 883}; 884 885static const struct vt1724_pcm_reg vt1724_pdma4_reg = { 886 .addr = VT1724_MT_PDMA4_ADDR, 887 .size = VT1724_MT_PDMA4_SIZE, 888 .count = VT1724_MT_PDMA4_COUNT, 889 .start = VT1724_PDMA4_START, 890}; 891 892static const struct vt1724_pcm_reg vt1724_rdma0_reg = { 893 .addr = VT1724_MT_CAPTURE_ADDR, 894 .size = VT1724_MT_CAPTURE_SIZE, 895 .count = VT1724_MT_CAPTURE_COUNT, 896 .start = VT1724_RDMA0_START, 897}; 898 899static const struct vt1724_pcm_reg vt1724_rdma1_reg = { 900 .addr = VT1724_MT_RDMA1_ADDR, 901 .size = VT1724_MT_RDMA1_SIZE, 902 .count = VT1724_MT_RDMA1_COUNT, 903 .start = VT1724_RDMA1_START, 904}; 905 906#define vt1724_playback_pro_reg vt1724_pdma0_reg 907#define vt1724_playback_spdif_reg vt1724_pdma4_reg 908#define vt1724_capture_pro_reg vt1724_rdma0_reg 909#define vt1724_capture_spdif_reg vt1724_rdma1_reg 910 911static const struct snd_pcm_hardware snd_vt1724_playback_pro = { 912 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 913 SNDRV_PCM_INFO_BLOCK_TRANSFER | 914 SNDRV_PCM_INFO_MMAP_VALID | 915 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 916 .formats = SNDRV_PCM_FMTBIT_S32_LE, 917 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 918 .rate_min = 8000, 919 .rate_max = 192000, 920 .channels_min = 2, 921 .channels_max = 8, 922 .buffer_bytes_max = (1UL << 21), /* 19bits dword */ 923 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */ 924 .period_bytes_max = (1UL << 21), 925 .periods_min = 2, 926 .periods_max = 1024, 927}; 928 929static const struct snd_pcm_hardware snd_vt1724_spdif = { 930 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 931 SNDRV_PCM_INFO_BLOCK_TRANSFER | 932 SNDRV_PCM_INFO_MMAP_VALID | 933 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 934 .formats = SNDRV_PCM_FMTBIT_S32_LE, 935 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100| 936 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200| 937 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400| 938 SNDRV_PCM_RATE_192000), 939 .rate_min = 32000, 940 .rate_max = 192000, 941 .channels_min = 2, 942 .channels_max = 2, 943 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 944 .period_bytes_min = 2 * 4 * 2, 945 .period_bytes_max = (1UL << 18), 946 .periods_min = 2, 947 .periods_max = 1024, 948}; 949 950static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = { 951 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 952 SNDRV_PCM_INFO_BLOCK_TRANSFER | 953 SNDRV_PCM_INFO_MMAP_VALID | 954 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 955 .formats = SNDRV_PCM_FMTBIT_S32_LE, 956 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 957 .rate_min = 8000, 958 .rate_max = 192000, 959 .channels_min = 2, 960 .channels_max = 2, 961 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 962 .period_bytes_min = 2 * 4 * 2, 963 .period_bytes_max = (1UL << 18), 964 .periods_min = 2, 965 .periods_max = 1024, 966}; 967 968/* 969 * set rate constraints 970 */ 971static void set_std_hw_rates(struct snd_ice1712 *ice) 972{ 973 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 974 /* I2S */ 975 /* VT1720 doesn't support more than 96kHz */ 976 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) 977 ice->hw_rates = &hw_constraints_rates_192; 978 else 979 ice->hw_rates = &hw_constraints_rates_96; 980 } else { 981 /* ACLINK */ 982 ice->hw_rates = &hw_constraints_rates_48; 983 } 984} 985 986static int set_rate_constraints(struct snd_ice1712 *ice, 987 struct snd_pcm_substream *substream) 988{ 989 struct snd_pcm_runtime *runtime = substream->runtime; 990 991 runtime->hw.rate_min = ice->hw_rates->list[0]; 992 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1]; 993 runtime->hw.rates = SNDRV_PCM_RATE_KNOT; 994 return snd_pcm_hw_constraint_list(runtime, 0, 995 SNDRV_PCM_HW_PARAM_RATE, 996 ice->hw_rates); 997} 998 999/* if the card has the internal rate locked (is_pro_locked), limit runtime 1000 hw rates to the current internal rate only. 1001*/ 1002static void constrain_rate_if_locked(struct snd_pcm_substream *substream) 1003{ 1004 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1005 struct snd_pcm_runtime *runtime = substream->runtime; 1006 unsigned int rate; 1007 if (is_pro_rate_locked(ice)) { 1008 rate = ice->get_rate(ice); 1009 if (rate >= runtime->hw.rate_min 1010 && rate <= runtime->hw.rate_max) { 1011 runtime->hw.rate_min = rate; 1012 runtime->hw.rate_max = rate; 1013 } 1014 } 1015} 1016 1017 1018/* multi-channel playback needs alignment 8x32bit regardless of the channels 1019 * actually used 1020 */ 1021#define VT1724_BUFFER_ALIGN 0x20 1022 1023static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream) 1024{ 1025 struct snd_pcm_runtime *runtime = substream->runtime; 1026 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1027 int chs, num_indeps; 1028 1029 runtime->private_data = (void *)&vt1724_playback_pro_reg; 1030 ice->playback_pro_substream = substream; 1031 runtime->hw = snd_vt1724_playback_pro; 1032 snd_pcm_set_sync(substream); 1033 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1034 set_rate_constraints(ice, substream); 1035 mutex_lock(&ice->open_mutex); 1036 /* calculate the currently available channels */ 1037 num_indeps = ice->num_total_dacs / 2 - 1; 1038 for (chs = 0; chs < num_indeps; chs++) { 1039 if (ice->pcm_reserved[chs]) 1040 break; 1041 } 1042 chs = (chs + 1) * 2; 1043 runtime->hw.channels_max = chs; 1044 if (chs > 2) /* channels must be even */ 1045 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1046 mutex_unlock(&ice->open_mutex); 1047 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1048 VT1724_BUFFER_ALIGN); 1049 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1050 VT1724_BUFFER_ALIGN); 1051 constrain_rate_if_locked(substream); 1052 if (ice->pro_open) 1053 ice->pro_open(ice, substream); 1054 return 0; 1055} 1056 1057static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream) 1058{ 1059 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1060 struct snd_pcm_runtime *runtime = substream->runtime; 1061 1062 runtime->private_data = (void *)&vt1724_capture_pro_reg; 1063 ice->capture_pro_substream = substream; 1064 runtime->hw = snd_vt1724_2ch_stereo; 1065 snd_pcm_set_sync(substream); 1066 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1067 set_rate_constraints(ice, substream); 1068 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1069 VT1724_BUFFER_ALIGN); 1070 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1071 VT1724_BUFFER_ALIGN); 1072 constrain_rate_if_locked(substream); 1073 if (ice->pro_open) 1074 ice->pro_open(ice, substream); 1075 return 0; 1076} 1077 1078static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream) 1079{ 1080 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1081 1082 if (PRO_RATE_RESET) 1083 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1084 ice->playback_pro_substream = NULL; 1085 1086 return 0; 1087} 1088 1089static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream) 1090{ 1091 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1092 1093 if (PRO_RATE_RESET) 1094 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1095 ice->capture_pro_substream = NULL; 1096 return 0; 1097} 1098 1099static const struct snd_pcm_ops snd_vt1724_playback_pro_ops = { 1100 .open = snd_vt1724_playback_pro_open, 1101 .close = snd_vt1724_playback_pro_close, 1102 .hw_params = snd_vt1724_pcm_hw_params, 1103 .hw_free = snd_vt1724_pcm_hw_free, 1104 .prepare = snd_vt1724_playback_pro_prepare, 1105 .trigger = snd_vt1724_pcm_trigger, 1106 .pointer = snd_vt1724_playback_pro_pointer, 1107}; 1108 1109static const struct snd_pcm_ops snd_vt1724_capture_pro_ops = { 1110 .open = snd_vt1724_capture_pro_open, 1111 .close = snd_vt1724_capture_pro_close, 1112 .hw_params = snd_vt1724_pcm_hw_params, 1113 .hw_free = snd_vt1724_pcm_hw_free, 1114 .prepare = snd_vt1724_pcm_prepare, 1115 .trigger = snd_vt1724_pcm_trigger, 1116 .pointer = snd_vt1724_pcm_pointer, 1117}; 1118 1119static int snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device) 1120{ 1121 struct snd_pcm *pcm; 1122 int capt, err; 1123 1124 if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) == 1125 VT1724_CFG_ADC_NONE) 1126 capt = 0; 1127 else 1128 capt = 1; 1129 err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm); 1130 if (err < 0) 1131 return err; 1132 1133 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops); 1134 if (capt) 1135 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1136 &snd_vt1724_capture_pro_ops); 1137 1138 pcm->private_data = ice; 1139 pcm->info_flags = 0; 1140 strcpy(pcm->name, "ICE1724"); 1141 1142 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1143 &ice->pci->dev, 256*1024, 256*1024); 1144 1145 ice->pcm_pro = pcm; 1146 1147 return 0; 1148} 1149 1150 1151/* 1152 * SPDIF PCM 1153 */ 1154 1155/* update spdif control bits; call with reg_lock */ 1156static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val) 1157{ 1158 unsigned char cbit, disabled; 1159 1160 cbit = inb(ICEREG1724(ice, SPDIF_CFG)); 1161 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN; 1162 if (cbit != disabled) 1163 outb(disabled, ICEREG1724(ice, SPDIF_CFG)); 1164 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1165 if (cbit != disabled) 1166 outb(cbit, ICEREG1724(ice, SPDIF_CFG)); 1167 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1168} 1169 1170/* update SPDIF control bits according to the given rate */ 1171static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate) 1172{ 1173 unsigned int val, nval; 1174 unsigned long flags; 1175 1176 spin_lock_irqsave(&ice->reg_lock, flags); 1177 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1178 nval &= ~(7 << 12); 1179 switch (rate) { 1180 case 44100: break; 1181 case 48000: nval |= 2 << 12; break; 1182 case 32000: nval |= 3 << 12; break; 1183 case 88200: nval |= 4 << 12; break; 1184 case 96000: nval |= 5 << 12; break; 1185 case 192000: nval |= 6 << 12; break; 1186 case 176400: nval |= 7 << 12; break; 1187 } 1188 if (val != nval) 1189 update_spdif_bits(ice, nval); 1190 spin_unlock_irqrestore(&ice->reg_lock, flags); 1191} 1192 1193static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream) 1194{ 1195 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1196 if (!ice->force_pdma4) 1197 update_spdif_rate(ice, substream->runtime->rate); 1198 return snd_vt1724_pcm_prepare(substream); 1199} 1200 1201static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream) 1202{ 1203 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1204 struct snd_pcm_runtime *runtime = substream->runtime; 1205 1206 runtime->private_data = (void *)&vt1724_playback_spdif_reg; 1207 ice->playback_con_substream = substream; 1208 if (ice->force_pdma4) { 1209 runtime->hw = snd_vt1724_2ch_stereo; 1210 set_rate_constraints(ice, substream); 1211 } else 1212 runtime->hw = snd_vt1724_spdif; 1213 snd_pcm_set_sync(substream); 1214 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1215 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1216 VT1724_BUFFER_ALIGN); 1217 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1218 VT1724_BUFFER_ALIGN); 1219 constrain_rate_if_locked(substream); 1220 if (ice->spdif.ops.open) 1221 ice->spdif.ops.open(ice, substream); 1222 return 0; 1223} 1224 1225static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream) 1226{ 1227 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1228 1229 if (PRO_RATE_RESET) 1230 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1231 ice->playback_con_substream = NULL; 1232 if (ice->spdif.ops.close) 1233 ice->spdif.ops.close(ice, substream); 1234 1235 return 0; 1236} 1237 1238static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream) 1239{ 1240 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1241 struct snd_pcm_runtime *runtime = substream->runtime; 1242 1243 runtime->private_data = (void *)&vt1724_capture_spdif_reg; 1244 ice->capture_con_substream = substream; 1245 if (ice->force_rdma1) { 1246 runtime->hw = snd_vt1724_2ch_stereo; 1247 set_rate_constraints(ice, substream); 1248 } else 1249 runtime->hw = snd_vt1724_spdif; 1250 snd_pcm_set_sync(substream); 1251 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1252 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1253 VT1724_BUFFER_ALIGN); 1254 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1255 VT1724_BUFFER_ALIGN); 1256 constrain_rate_if_locked(substream); 1257 if (ice->spdif.ops.open) 1258 ice->spdif.ops.open(ice, substream); 1259 return 0; 1260} 1261 1262static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream) 1263{ 1264 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1265 1266 if (PRO_RATE_RESET) 1267 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1268 ice->capture_con_substream = NULL; 1269 if (ice->spdif.ops.close) 1270 ice->spdif.ops.close(ice, substream); 1271 1272 return 0; 1273} 1274 1275static const struct snd_pcm_ops snd_vt1724_playback_spdif_ops = { 1276 .open = snd_vt1724_playback_spdif_open, 1277 .close = snd_vt1724_playback_spdif_close, 1278 .hw_params = snd_vt1724_pcm_hw_params, 1279 .hw_free = snd_vt1724_pcm_hw_free, 1280 .prepare = snd_vt1724_playback_spdif_prepare, 1281 .trigger = snd_vt1724_pcm_trigger, 1282 .pointer = snd_vt1724_pcm_pointer, 1283}; 1284 1285static const struct snd_pcm_ops snd_vt1724_capture_spdif_ops = { 1286 .open = snd_vt1724_capture_spdif_open, 1287 .close = snd_vt1724_capture_spdif_close, 1288 .hw_params = snd_vt1724_pcm_hw_params, 1289 .hw_free = snd_vt1724_pcm_hw_free, 1290 .prepare = snd_vt1724_pcm_prepare, 1291 .trigger = snd_vt1724_pcm_trigger, 1292 .pointer = snd_vt1724_pcm_pointer, 1293}; 1294 1295 1296static int snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device) 1297{ 1298 char *name; 1299 struct snd_pcm *pcm; 1300 int play, capt; 1301 int err; 1302 1303 if (ice->force_pdma4 || 1304 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) { 1305 play = 1; 1306 ice->has_spdif = 1; 1307 } else 1308 play = 0; 1309 if (ice->force_rdma1 || 1310 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) { 1311 capt = 1; 1312 ice->has_spdif = 1; 1313 } else 1314 capt = 0; 1315 if (!play && !capt) 1316 return 0; /* no spdif device */ 1317 1318 if (ice->force_pdma4 || ice->force_rdma1) 1319 name = "ICE1724 Secondary"; 1320 else 1321 name = "ICE1724 IEC958"; 1322 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm); 1323 if (err < 0) 1324 return err; 1325 1326 if (play) 1327 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1328 &snd_vt1724_playback_spdif_ops); 1329 if (capt) 1330 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1331 &snd_vt1724_capture_spdif_ops); 1332 1333 pcm->private_data = ice; 1334 pcm->info_flags = 0; 1335 strcpy(pcm->name, name); 1336 1337 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1338 &ice->pci->dev, 256*1024, 256*1024); 1339 1340 ice->pcm = pcm; 1341 1342 return 0; 1343} 1344 1345 1346/* 1347 * independent surround PCMs 1348 */ 1349 1350static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = { 1351 { 1352 .addr = VT1724_MT_PDMA1_ADDR, 1353 .size = VT1724_MT_PDMA1_SIZE, 1354 .count = VT1724_MT_PDMA1_COUNT, 1355 .start = VT1724_PDMA1_START, 1356 }, 1357 { 1358 .addr = VT1724_MT_PDMA2_ADDR, 1359 .size = VT1724_MT_PDMA2_SIZE, 1360 .count = VT1724_MT_PDMA2_COUNT, 1361 .start = VT1724_PDMA2_START, 1362 }, 1363 { 1364 .addr = VT1724_MT_PDMA3_ADDR, 1365 .size = VT1724_MT_PDMA3_SIZE, 1366 .count = VT1724_MT_PDMA3_COUNT, 1367 .start = VT1724_PDMA3_START, 1368 }, 1369}; 1370 1371static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream) 1372{ 1373 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1374 unsigned char val; 1375 1376 spin_lock_irq(&ice->reg_lock); 1377 val = 3 - substream->number; 1378 if (inb(ICEMT1724(ice, BURST)) < val) 1379 outb(val, ICEMT1724(ice, BURST)); 1380 spin_unlock_irq(&ice->reg_lock); 1381 return snd_vt1724_pcm_prepare(substream); 1382} 1383 1384static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream) 1385{ 1386 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1387 struct snd_pcm_runtime *runtime = substream->runtime; 1388 1389 mutex_lock(&ice->open_mutex); 1390 /* already used by PDMA0? */ 1391 if (ice->pcm_reserved[substream->number]) { 1392 mutex_unlock(&ice->open_mutex); 1393 return -EBUSY; /* FIXME: should handle blocking mode properly */ 1394 } 1395 mutex_unlock(&ice->open_mutex); 1396 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number]; 1397 ice->playback_con_substream_ds[substream->number] = substream; 1398 runtime->hw = snd_vt1724_2ch_stereo; 1399 snd_pcm_set_sync(substream); 1400 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1401 set_rate_constraints(ice, substream); 1402 return 0; 1403} 1404 1405static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream) 1406{ 1407 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1408 1409 if (PRO_RATE_RESET) 1410 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1411 ice->playback_con_substream_ds[substream->number] = NULL; 1412 ice->pcm_reserved[substream->number] = NULL; 1413 1414 return 0; 1415} 1416 1417static const struct snd_pcm_ops snd_vt1724_playback_indep_ops = { 1418 .open = snd_vt1724_playback_indep_open, 1419 .close = snd_vt1724_playback_indep_close, 1420 .hw_params = snd_vt1724_pcm_hw_params, 1421 .hw_free = snd_vt1724_pcm_hw_free, 1422 .prepare = snd_vt1724_playback_indep_prepare, 1423 .trigger = snd_vt1724_pcm_trigger, 1424 .pointer = snd_vt1724_pcm_pointer, 1425}; 1426 1427 1428static int snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device) 1429{ 1430 struct snd_pcm *pcm; 1431 int play; 1432 int err; 1433 1434 play = ice->num_total_dacs / 2 - 1; 1435 if (play <= 0) 1436 return 0; 1437 1438 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm); 1439 if (err < 0) 1440 return err; 1441 1442 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1443 &snd_vt1724_playback_indep_ops); 1444 1445 pcm->private_data = ice; 1446 pcm->info_flags = 0; 1447 strcpy(pcm->name, "ICE1724 Surround PCM"); 1448 1449 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1450 &ice->pci->dev, 256*1024, 256*1024); 1451 1452 ice->pcm_ds = pcm; 1453 1454 return 0; 1455} 1456 1457 1458/* 1459 * Mixer section 1460 */ 1461 1462static int snd_vt1724_ac97_mixer(struct snd_ice1712 *ice) 1463{ 1464 int err; 1465 1466 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) { 1467 struct snd_ac97_bus *pbus; 1468 struct snd_ac97_template ac97; 1469 static const struct snd_ac97_bus_ops ops = { 1470 .write = snd_vt1724_ac97_write, 1471 .read = snd_vt1724_ac97_read, 1472 }; 1473 1474 /* cold reset */ 1475 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); 1476 mdelay(5); /* FIXME */ 1477 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); 1478 1479 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus); 1480 if (err < 0) 1481 return err; 1482 memset(&ac97, 0, sizeof(ac97)); 1483 ac97.private_data = ice; 1484 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1485 if (err < 0) 1486 dev_warn(ice->card->dev, 1487 "cannot initialize pro ac97, skipped\n"); 1488 else 1489 return 0; 1490 } 1491 /* I2S mixer only */ 1492 strcat(ice->card->mixername, "ICE1724 - multitrack"); 1493 return 0; 1494} 1495 1496/* 1497 * 1498 */ 1499 1500static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx) 1501{ 1502 return (unsigned int)ice->eeprom.data[idx] | \ 1503 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \ 1504 ((unsigned int)ice->eeprom.data[idx + 2] << 16); 1505} 1506 1507static void snd_vt1724_proc_read(struct snd_info_entry *entry, 1508 struct snd_info_buffer *buffer) 1509{ 1510 struct snd_ice1712 *ice = entry->private_data; 1511 unsigned int idx; 1512 1513 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1514 snd_iprintf(buffer, "EEPROM:\n"); 1515 1516 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1517 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1518 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1519 snd_iprintf(buffer, " System Config : 0x%x\n", 1520 ice->eeprom.data[ICE_EEP2_SYSCONF]); 1521 snd_iprintf(buffer, " ACLink : 0x%x\n", 1522 ice->eeprom.data[ICE_EEP2_ACLINK]); 1523 snd_iprintf(buffer, " I2S : 0x%x\n", 1524 ice->eeprom.data[ICE_EEP2_I2S]); 1525 snd_iprintf(buffer, " S/PDIF : 0x%x\n", 1526 ice->eeprom.data[ICE_EEP2_SPDIF]); 1527 snd_iprintf(buffer, " GPIO direction : 0x%x\n", 1528 ice->eeprom.gpiodir); 1529 snd_iprintf(buffer, " GPIO mask : 0x%x\n", 1530 ice->eeprom.gpiomask); 1531 snd_iprintf(buffer, " GPIO state : 0x%x\n", 1532 ice->eeprom.gpiostate); 1533 for (idx = 0x12; idx < ice->eeprom.size; idx++) 1534 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", 1535 idx, ice->eeprom.data[idx]); 1536 1537 snd_iprintf(buffer, "\nRegisters:\n"); 1538 1539 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", 1540 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK))); 1541 for (idx = 0x0; idx < 0x20 ; idx++) 1542 snd_iprintf(buffer, " CCS%02x : 0x%02x\n", 1543 idx, inb(ice->port+idx)); 1544 for (idx = 0x0; idx < 0x30 ; idx++) 1545 snd_iprintf(buffer, " MT%02x : 0x%02x\n", 1546 idx, inb(ice->profi_port+idx)); 1547} 1548 1549static void snd_vt1724_proc_init(struct snd_ice1712 *ice) 1550{ 1551 snd_card_ro_proc_new(ice->card, "ice1724", ice, snd_vt1724_proc_read); 1552} 1553 1554/* 1555 * 1556 */ 1557 1558static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol, 1559 struct snd_ctl_elem_info *uinfo) 1560{ 1561 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1562 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1563 return 0; 1564} 1565 1566static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol, 1567 struct snd_ctl_elem_value *ucontrol) 1568{ 1569 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1570 1571 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1572 return 0; 1573} 1574 1575static const struct snd_kcontrol_new snd_vt1724_eeprom = { 1576 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1577 .name = "ICE1724 EEPROM", 1578 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1579 .info = snd_vt1724_eeprom_info, 1580 .get = snd_vt1724_eeprom_get 1581}; 1582 1583/* 1584 */ 1585static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol, 1586 struct snd_ctl_elem_info *uinfo) 1587{ 1588 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1589 uinfo->count = 1; 1590 return 0; 1591} 1592 1593static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga) 1594{ 1595 unsigned int val, rbits; 1596 1597 val = diga->status[0] & 0x03; /* professional, non-audio */ 1598 if (val & 0x01) { 1599 /* professional */ 1600 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == 1601 IEC958_AES0_PRO_EMPHASIS_5015) 1602 val |= 1U << 3; 1603 rbits = (diga->status[4] >> 3) & 0x0f; 1604 if (rbits) { 1605 switch (rbits) { 1606 case 2: val |= 5 << 12; break; /* 96k */ 1607 case 3: val |= 6 << 12; break; /* 192k */ 1608 case 10: val |= 4 << 12; break; /* 88.2k */ 1609 case 11: val |= 7 << 12; break; /* 176.4k */ 1610 } 1611 } else { 1612 switch (diga->status[0] & IEC958_AES0_PRO_FS) { 1613 case IEC958_AES0_PRO_FS_44100: 1614 break; 1615 case IEC958_AES0_PRO_FS_32000: 1616 val |= 3U << 12; 1617 break; 1618 default: 1619 val |= 2U << 12; 1620 break; 1621 } 1622 } 1623 } else { 1624 /* consumer */ 1625 val |= diga->status[1] & 0x04; /* copyright */ 1626 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) == 1627 IEC958_AES0_CON_EMPHASIS_5015) 1628 val |= 1U << 3; 1629 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */ 1630 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */ 1631 } 1632 return val; 1633} 1634 1635static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val) 1636{ 1637 memset(diga->status, 0, sizeof(diga->status)); 1638 diga->status[0] = val & 0x03; /* professional, non-audio */ 1639 if (val & 0x01) { 1640 /* professional */ 1641 if (val & (1U << 3)) 1642 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; 1643 switch ((val >> 12) & 0x7) { 1644 case 0: 1645 break; 1646 case 2: 1647 diga->status[0] |= IEC958_AES0_PRO_FS_32000; 1648 break; 1649 default: 1650 diga->status[0] |= IEC958_AES0_PRO_FS_48000; 1651 break; 1652 } 1653 } else { 1654 /* consumer */ 1655 diga->status[0] |= val & (1U << 2); /* copyright */ 1656 if (val & (1U << 3)) 1657 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; 1658 diga->status[1] |= (val >> 4) & 0x3f; /* category */ 1659 diga->status[3] |= (val >> 12) & 0x07; /* fs */ 1660 } 1661} 1662 1663static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol, 1664 struct snd_ctl_elem_value *ucontrol) 1665{ 1666 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1667 unsigned int val; 1668 val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1669 decode_spdif_bits(&ucontrol->value.iec958, val); 1670 return 0; 1671} 1672 1673static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol, 1674 struct snd_ctl_elem_value *ucontrol) 1675{ 1676 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1677 unsigned int val, old; 1678 1679 val = encode_spdif_bits(&ucontrol->value.iec958); 1680 spin_lock_irq(&ice->reg_lock); 1681 old = inw(ICEMT1724(ice, SPDIF_CTRL)); 1682 if (val != old) 1683 update_spdif_bits(ice, val); 1684 spin_unlock_irq(&ice->reg_lock); 1685 return val != old; 1686} 1687 1688static const struct snd_kcontrol_new snd_vt1724_spdif_default = 1689{ 1690 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1691 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), 1692 .info = snd_vt1724_spdif_info, 1693 .get = snd_vt1724_spdif_default_get, 1694 .put = snd_vt1724_spdif_default_put 1695}; 1696 1697static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1698 struct snd_ctl_elem_value *ucontrol) 1699{ 1700 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1701 IEC958_AES0_PROFESSIONAL | 1702 IEC958_AES0_CON_NOT_COPYRIGHT | 1703 IEC958_AES0_CON_EMPHASIS; 1704 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1705 IEC958_AES1_CON_CATEGORY; 1706 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1707 return 0; 1708} 1709 1710static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1711 struct snd_ctl_elem_value *ucontrol) 1712{ 1713 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1714 IEC958_AES0_PROFESSIONAL | 1715 IEC958_AES0_PRO_FS | 1716 IEC958_AES0_PRO_EMPHASIS; 1717 return 0; 1718} 1719 1720static const struct snd_kcontrol_new snd_vt1724_spdif_maskc = 1721{ 1722 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1723 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1724 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), 1725 .info = snd_vt1724_spdif_info, 1726 .get = snd_vt1724_spdif_maskc_get, 1727}; 1728 1729static const struct snd_kcontrol_new snd_vt1724_spdif_maskp = 1730{ 1731 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1732 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1733 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK), 1734 .info = snd_vt1724_spdif_info, 1735 .get = snd_vt1724_spdif_maskp_get, 1736}; 1737 1738#define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info 1739 1740static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol, 1741 struct snd_ctl_elem_value *ucontrol) 1742{ 1743 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1744 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & 1745 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0; 1746 return 0; 1747} 1748 1749static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol, 1750 struct snd_ctl_elem_value *ucontrol) 1751{ 1752 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1753 unsigned char old, val; 1754 1755 spin_lock_irq(&ice->reg_lock); 1756 old = val = inb(ICEREG1724(ice, SPDIF_CFG)); 1757 val &= ~VT1724_CFG_SPDIF_OUT_EN; 1758 if (ucontrol->value.integer.value[0]) 1759 val |= VT1724_CFG_SPDIF_OUT_EN; 1760 if (old != val) 1761 outb(val, ICEREG1724(ice, SPDIF_CFG)); 1762 spin_unlock_irq(&ice->reg_lock); 1763 return old != val; 1764} 1765 1766static const struct snd_kcontrol_new snd_vt1724_spdif_switch = 1767{ 1768 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1769 /* FIXME: the following conflict with IEC958 Playback Route */ 1770 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */ 1771 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH), 1772 .info = snd_vt1724_spdif_sw_info, 1773 .get = snd_vt1724_spdif_sw_get, 1774 .put = snd_vt1724_spdif_sw_put 1775}; 1776 1777 1778#if 0 /* NOT USED YET */ 1779/* 1780 * GPIO access from extern 1781 */ 1782 1783#define snd_vt1724_gpio_info snd_ctl_boolean_mono_info 1784 1785int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol, 1786 struct snd_ctl_elem_value *ucontrol) 1787{ 1788 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1789 int shift = kcontrol->private_value & 0xff; 1790 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1791 1792 snd_ice1712_save_gpio_status(ice); 1793 ucontrol->value.integer.value[0] = 1794 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert; 1795 snd_ice1712_restore_gpio_status(ice); 1796 return 0; 1797} 1798 1799int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1800 struct snd_ctl_elem_value *ucontrol) 1801{ 1802 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1803 int shift = kcontrol->private_value & 0xff; 1804 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1805 unsigned int val, nval; 1806 1807 if (kcontrol->private_value & (1 << 31)) 1808 return -EPERM; 1809 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert; 1810 snd_ice1712_save_gpio_status(ice); 1811 val = snd_ice1712_gpio_read(ice); 1812 nval |= val & ~(1 << shift); 1813 if (val != nval) 1814 snd_ice1712_gpio_write(ice, nval); 1815 snd_ice1712_restore_gpio_status(ice); 1816 return val != nval; 1817} 1818#endif /* NOT USED YET */ 1819 1820/* 1821 * rate 1822 */ 1823static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1824 struct snd_ctl_elem_info *uinfo) 1825{ 1826 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1827 int hw_rates_count = ice->hw_rates->count; 1828 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1829 uinfo->count = 1; 1830 1831 /* internal clocks */ 1832 uinfo->value.enumerated.items = hw_rates_count; 1833 /* external clocks */ 1834 if (ice->force_rdma1 || 1835 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) 1836 uinfo->value.enumerated.items += ice->ext_clock_count; 1837 /* upper limit - keep at top */ 1838 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1839 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1840 if (uinfo->value.enumerated.item >= hw_rates_count) 1841 /* ext_clock items */ 1842 strcpy(uinfo->value.enumerated.name, 1843 ice->ext_clock_names[ 1844 uinfo->value.enumerated.item - hw_rates_count]); 1845 else 1846 /* int clock items */ 1847 sprintf(uinfo->value.enumerated.name, "%d", 1848 ice->hw_rates->list[uinfo->value.enumerated.item]); 1849 return 0; 1850} 1851 1852static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1853 struct snd_ctl_elem_value *ucontrol) 1854{ 1855 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1856 unsigned int i, rate; 1857 1858 spin_lock_irq(&ice->reg_lock); 1859 if (ice->is_spdif_master(ice)) { 1860 ucontrol->value.enumerated.item[0] = ice->hw_rates->count + 1861 ice->get_spdif_master_type(ice); 1862 } else { 1863 rate = ice->get_rate(ice); 1864 ucontrol->value.enumerated.item[0] = 0; 1865 for (i = 0; i < ice->hw_rates->count; i++) { 1866 if (ice->hw_rates->list[i] == rate) { 1867 ucontrol->value.enumerated.item[0] = i; 1868 break; 1869 } 1870 } 1871 } 1872 spin_unlock_irq(&ice->reg_lock); 1873 return 0; 1874} 1875 1876static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice) 1877{ 1878 /* standard external clock - only single type - SPDIF IN */ 1879 return 0; 1880} 1881 1882/* setting clock to external - SPDIF */ 1883static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type) 1884{ 1885 unsigned char oval; 1886 unsigned char i2s_oval; 1887 oval = inb(ICEMT1724(ice, RATE)); 1888 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); 1889 /* setting 256fs */ 1890 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT)); 1891 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT)); 1892 return 0; 1893} 1894 1895 1896static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1897 struct snd_ctl_elem_value *ucontrol) 1898{ 1899 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1900 unsigned int old_rate, new_rate; 1901 unsigned int item = ucontrol->value.enumerated.item[0]; 1902 unsigned int first_ext_clock = ice->hw_rates->count; 1903 1904 if (item > first_ext_clock + ice->ext_clock_count - 1) 1905 return -EINVAL; 1906 1907 /* if rate = 0 => external clock */ 1908 spin_lock_irq(&ice->reg_lock); 1909 if (ice->is_spdif_master(ice)) 1910 old_rate = 0; 1911 else 1912 old_rate = ice->get_rate(ice); 1913 if (item >= first_ext_clock) { 1914 /* switching to external clock */ 1915 ice->set_spdif_clock(ice, item - first_ext_clock); 1916 new_rate = 0; 1917 } else { 1918 /* internal on-card clock */ 1919 new_rate = ice->hw_rates->list[item]; 1920 ice->pro_rate_default = new_rate; 1921 spin_unlock_irq(&ice->reg_lock); 1922 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1); 1923 spin_lock_irq(&ice->reg_lock); 1924 } 1925 spin_unlock_irq(&ice->reg_lock); 1926 1927 /* the first switch to the ext. clock mode? */ 1928 if (old_rate != new_rate && !new_rate) { 1929 /* notify akm chips as well */ 1930 unsigned int i; 1931 if (ice->gpio.set_pro_rate) 1932 ice->gpio.set_pro_rate(ice, 0); 1933 for (i = 0; i < ice->akm_codecs; i++) { 1934 if (ice->akm[i].ops.set_rate_val) 1935 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 1936 } 1937 } 1938 return old_rate != new_rate; 1939} 1940 1941static const struct snd_kcontrol_new snd_vt1724_pro_internal_clock = { 1942 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1943 .name = "Multi Track Internal Clock", 1944 .info = snd_vt1724_pro_internal_clock_info, 1945 .get = snd_vt1724_pro_internal_clock_get, 1946 .put = snd_vt1724_pro_internal_clock_put 1947}; 1948 1949#define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info 1950 1951static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1952 struct snd_ctl_elem_value *ucontrol) 1953{ 1954 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1955 return 0; 1956} 1957 1958static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1959 struct snd_ctl_elem_value *ucontrol) 1960{ 1961 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1962 int change = 0, nval; 1963 1964 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1965 spin_lock_irq(&ice->reg_lock); 1966 change = PRO_RATE_LOCKED != nval; 1967 PRO_RATE_LOCKED = nval; 1968 spin_unlock_irq(&ice->reg_lock); 1969 return change; 1970} 1971 1972static const struct snd_kcontrol_new snd_vt1724_pro_rate_locking = { 1973 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1974 .name = "Multi Track Rate Locking", 1975 .info = snd_vt1724_pro_rate_locking_info, 1976 .get = snd_vt1724_pro_rate_locking_get, 1977 .put = snd_vt1724_pro_rate_locking_put 1978}; 1979 1980#define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info 1981 1982static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 1983 struct snd_ctl_elem_value *ucontrol) 1984{ 1985 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0; 1986 return 0; 1987} 1988 1989static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 1990 struct snd_ctl_elem_value *ucontrol) 1991{ 1992 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1993 int change = 0, nval; 1994 1995 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1996 spin_lock_irq(&ice->reg_lock); 1997 change = PRO_RATE_RESET != nval; 1998 PRO_RATE_RESET = nval; 1999 spin_unlock_irq(&ice->reg_lock); 2000 return change; 2001} 2002 2003static const struct snd_kcontrol_new snd_vt1724_pro_rate_reset = { 2004 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2005 .name = "Multi Track Rate Reset", 2006 .info = snd_vt1724_pro_rate_reset_info, 2007 .get = snd_vt1724_pro_rate_reset_get, 2008 .put = snd_vt1724_pro_rate_reset_put 2009}; 2010 2011 2012/* 2013 * routing 2014 */ 2015static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol, 2016 struct snd_ctl_elem_info *uinfo) 2017{ 2018 static const char * const texts[] = { 2019 "PCM Out", /* 0 */ 2020 "H/W In 0", "H/W In 1", /* 1-2 */ 2021 "IEC958 In L", "IEC958 In R", /* 3-4 */ 2022 }; 2023 2024 return snd_ctl_enum_info(uinfo, 1, 5, texts); 2025} 2026 2027static inline int analog_route_shift(int idx) 2028{ 2029 return (idx % 2) * 12 + ((idx / 2) * 3) + 8; 2030} 2031 2032static inline int digital_route_shift(int idx) 2033{ 2034 return idx * 3; 2035} 2036 2037int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift) 2038{ 2039 unsigned long val; 2040 unsigned char eitem; 2041 static const unsigned char xlate[8] = { 2042 0, 255, 1, 2, 255, 255, 3, 4, 2043 }; 2044 2045 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2046 val >>= shift; 2047 val &= 7; /* we now have 3 bits per output */ 2048 eitem = xlate[val]; 2049 if (eitem == 255) { 2050 snd_BUG(); 2051 return 0; 2052 } 2053 return eitem; 2054} 2055 2056int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val, 2057 int shift) 2058{ 2059 unsigned int old_val, nval; 2060 int change; 2061 static const unsigned char xroute[8] = { 2062 0, /* PCM */ 2063 2, /* PSDIN0 Left */ 2064 3, /* PSDIN0 Right */ 2065 6, /* SPDIN Left */ 2066 7, /* SPDIN Right */ 2067 }; 2068 2069 nval = xroute[val % 5]; 2070 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2071 val &= ~(0x07 << shift); 2072 val |= nval << shift; 2073 change = val != old_val; 2074 if (change) 2075 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK)); 2076 return change; 2077} 2078 2079static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol, 2080 struct snd_ctl_elem_value *ucontrol) 2081{ 2082 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2083 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2084 ucontrol->value.enumerated.item[0] = 2085 snd_ice1724_get_route_val(ice, analog_route_shift(idx)); 2086 return 0; 2087} 2088 2089static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2090 struct snd_ctl_elem_value *ucontrol) 2091{ 2092 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2093 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2094 return snd_ice1724_put_route_val(ice, 2095 ucontrol->value.enumerated.item[0], 2096 analog_route_shift(idx)); 2097} 2098 2099static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2100 struct snd_ctl_elem_value *ucontrol) 2101{ 2102 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2103 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2104 ucontrol->value.enumerated.item[0] = 2105 snd_ice1724_get_route_val(ice, digital_route_shift(idx)); 2106 return 0; 2107} 2108 2109static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2110 struct snd_ctl_elem_value *ucontrol) 2111{ 2112 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2113 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2114 return snd_ice1724_put_route_val(ice, 2115 ucontrol->value.enumerated.item[0], 2116 digital_route_shift(idx)); 2117} 2118 2119static const struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route = 2120{ 2121 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2122 .name = "H/W Playback Route", 2123 .info = snd_vt1724_pro_route_info, 2124 .get = snd_vt1724_pro_route_analog_get, 2125 .put = snd_vt1724_pro_route_analog_put, 2126}; 2127 2128static const struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route = { 2129 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2130 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route", 2131 .info = snd_vt1724_pro_route_info, 2132 .get = snd_vt1724_pro_route_spdif_get, 2133 .put = snd_vt1724_pro_route_spdif_put, 2134 .count = 2, 2135}; 2136 2137 2138static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol, 2139 struct snd_ctl_elem_info *uinfo) 2140{ 2141 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2142 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */ 2143 uinfo->value.integer.min = 0; 2144 uinfo->value.integer.max = 255; 2145 return 0; 2146} 2147 2148static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol, 2149 struct snd_ctl_elem_value *ucontrol) 2150{ 2151 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2152 int idx; 2153 2154 spin_lock_irq(&ice->reg_lock); 2155 for (idx = 0; idx < 22; idx++) { 2156 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX)); 2157 ucontrol->value.integer.value[idx] = 2158 inb(ICEMT1724(ice, MONITOR_PEAKDATA)); 2159 } 2160 spin_unlock_irq(&ice->reg_lock); 2161 return 0; 2162} 2163 2164static const struct snd_kcontrol_new snd_vt1724_mixer_pro_peak = { 2165 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 2166 .name = "Multi Track Peak", 2167 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2168 .info = snd_vt1724_pro_peak_info, 2169 .get = snd_vt1724_pro_peak_get 2170}; 2171 2172/* 2173 * 2174 */ 2175 2176static const struct snd_ice1712_card_info no_matched; 2177 2178 2179/* 2180 ooAoo cards with no controls 2181*/ 2182static const unsigned char ooaoo_sq210_eeprom[] = { 2183 [ICE_EEP2_SYSCONF] = 0x4c, /* 49MHz crystal, no mpu401, no ADC, 2184 1xDACs */ 2185 [ICE_EEP2_ACLINK] = 0x80, /* I2S */ 2186 [ICE_EEP2_I2S] = 0x78, /* no volume, 96k, 24bit, 192k */ 2187 [ICE_EEP2_SPDIF] = 0xc1, /* out-en, out-int, out-ext */ 2188 [ICE_EEP2_GPIO_DIR] = 0x00, /* no GPIOs are used */ 2189 [ICE_EEP2_GPIO_DIR1] = 0x00, 2190 [ICE_EEP2_GPIO_DIR2] = 0x00, 2191 [ICE_EEP2_GPIO_MASK] = 0xff, 2192 [ICE_EEP2_GPIO_MASK1] = 0xff, 2193 [ICE_EEP2_GPIO_MASK2] = 0xff, 2194 2195 [ICE_EEP2_GPIO_STATE] = 0x00, /* inputs */ 2196 [ICE_EEP2_GPIO_STATE1] = 0x00, /* all 1, but GPIO_CPLD_RW 2197 and GPIO15 always zero */ 2198 [ICE_EEP2_GPIO_STATE2] = 0x00, /* inputs */ 2199}; 2200 2201 2202static const struct snd_ice1712_card_info snd_vt1724_ooaoo_cards[] = { 2203 { 2204 .name = "ooAoo SQ210a", 2205 .model = "sq210a", 2206 .eeprom_size = sizeof(ooaoo_sq210_eeprom), 2207 .eeprom_data = ooaoo_sq210_eeprom, 2208 }, 2209 { } /* terminator */ 2210}; 2211 2212static const struct snd_ice1712_card_info *card_tables[] = { 2213 snd_vt1724_revo_cards, 2214 snd_vt1724_amp_cards, 2215 snd_vt1724_aureon_cards, 2216 snd_vt1720_mobo_cards, 2217 snd_vt1720_pontis_cards, 2218 snd_vt1724_prodigy_hifi_cards, 2219 snd_vt1724_prodigy192_cards, 2220 snd_vt1724_juli_cards, 2221 snd_vt1724_maya44_cards, 2222 snd_vt1724_phase_cards, 2223 snd_vt1724_wtm_cards, 2224 snd_vt1724_se_cards, 2225 snd_vt1724_qtet_cards, 2226 snd_vt1724_ooaoo_cards, 2227 snd_vt1724_psc724_cards, 2228 NULL, 2229}; 2230 2231 2232/* 2233 */ 2234 2235static void wait_i2c_busy(struct snd_ice1712 *ice) 2236{ 2237 int t = 0x10000; 2238 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--) 2239 ; 2240 if (t == -1) 2241 dev_err(ice->card->dev, "i2c busy timeout\n"); 2242} 2243 2244unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice, 2245 unsigned char dev, unsigned char addr) 2246{ 2247 unsigned char val; 2248 2249 mutex_lock(&ice->i2c_mutex); 2250 wait_i2c_busy(ice); 2251 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2252 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2253 wait_i2c_busy(ice); 2254 val = inb(ICEREG1724(ice, I2C_DATA)); 2255 mutex_unlock(&ice->i2c_mutex); 2256 /* 2257 dev_dbg(ice->card->dev, "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); 2258 */ 2259 return val; 2260} 2261 2262void snd_vt1724_write_i2c(struct snd_ice1712 *ice, 2263 unsigned char dev, unsigned char addr, unsigned char data) 2264{ 2265 mutex_lock(&ice->i2c_mutex); 2266 wait_i2c_busy(ice); 2267 /* 2268 dev_dbg(ice->card->dev, "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); 2269 */ 2270 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2271 outb(data, ICEREG1724(ice, I2C_DATA)); 2272 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2273 wait_i2c_busy(ice); 2274 mutex_unlock(&ice->i2c_mutex); 2275} 2276 2277static int snd_vt1724_read_eeprom(struct snd_ice1712 *ice, 2278 const char *modelname) 2279{ 2280 const int dev = 0xa0; /* EEPROM device address */ 2281 unsigned int i, size; 2282 const struct snd_ice1712_card_info * const *tbl, *c; 2283 2284 if (!modelname || !*modelname) { 2285 ice->eeprom.subvendor = 0; 2286 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0) 2287 ice->eeprom.subvendor = 2288 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) | 2289 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) | 2290 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) | 2291 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24); 2292 if (ice->eeprom.subvendor == 0 || 2293 ice->eeprom.subvendor == (unsigned int)-1) { 2294 /* invalid subvendor from EEPROM, try the PCI 2295 * subststem ID instead 2296 */ 2297 u16 vendor, device; 2298 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, 2299 &vendor); 2300 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2301 ice->eeprom.subvendor = 2302 ((unsigned int)swab16(vendor) << 16) | swab16(device); 2303 if (ice->eeprom.subvendor == 0 || 2304 ice->eeprom.subvendor == (unsigned int)-1) { 2305 dev_err(ice->card->dev, 2306 "No valid ID is found\n"); 2307 return -ENXIO; 2308 } 2309 } 2310 } 2311 for (tbl = card_tables; *tbl; tbl++) { 2312 for (c = *tbl; c->name; c++) { 2313 if (modelname && c->model && 2314 !strcmp(modelname, c->model)) { 2315 dev_info(ice->card->dev, 2316 "Using board model %s\n", 2317 c->name); 2318 ice->eeprom.subvendor = c->subvendor; 2319 } else if (c->subvendor != ice->eeprom.subvendor) 2320 continue; 2321 ice->card_info = c; 2322 if (!c->eeprom_size || !c->eeprom_data) 2323 goto found; 2324 /* if the EEPROM is given by the driver, use it */ 2325 dev_dbg(ice->card->dev, "using the defined eeprom..\n"); 2326 ice->eeprom.version = 2; 2327 ice->eeprom.size = c->eeprom_size + 6; 2328 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2329 goto read_skipped; 2330 } 2331 } 2332 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n", 2333 ice->eeprom.subvendor); 2334#ifdef CONFIG_PM_SLEEP 2335 /* assume AC97-only card which can suspend without additional code */ 2336 ice->pm_suspend_enabled = 1; 2337#endif 2338 2339 found: 2340 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04); 2341 if (ice->eeprom.size < 6) 2342 ice->eeprom.size = 32; 2343 else if (ice->eeprom.size > 32) { 2344 dev_err(ice->card->dev, "Invalid EEPROM (size = %i)\n", 2345 ice->eeprom.size); 2346 return -EIO; 2347 } 2348 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05); 2349 if (ice->eeprom.version != 1 && ice->eeprom.version != 2) 2350 dev_warn(ice->card->dev, "Invalid EEPROM version %i\n", 2351 ice->eeprom.version); 2352 size = ice->eeprom.size - 6; 2353 for (i = 0; i < size; i++) 2354 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6); 2355 2356 read_skipped: 2357 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK); 2358 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE); 2359 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR); 2360 2361 return 0; 2362} 2363 2364 2365 2366static void snd_vt1724_chip_reset(struct snd_ice1712 *ice) 2367{ 2368 outb(VT1724_RESET , ICEREG1724(ice, CONTROL)); 2369 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2370 msleep(10); 2371 outb(0, ICEREG1724(ice, CONTROL)); 2372 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2373 msleep(10); 2374} 2375 2376static int snd_vt1724_chip_init(struct snd_ice1712 *ice) 2377{ 2378 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG)); 2379 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG)); 2380 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES)); 2381 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG)); 2382 2383 ice->gpio.write_mask = ice->eeprom.gpiomask; 2384 ice->gpio.direction = ice->eeprom.gpiodir; 2385 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask); 2386 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir); 2387 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate); 2388 2389 outb(0, ICEREG1724(ice, POWERDOWN)); 2390 2391 /* MPU_RX and TX irq masks are cleared later dynamically */ 2392 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK)); 2393 2394 /* don't handle FIFO overrun/underruns (just yet), 2395 * since they cause machine lockups 2396 */ 2397 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK)); 2398 2399 return 0; 2400} 2401 2402static int snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice) 2403{ 2404 int err; 2405 struct snd_kcontrol *kctl; 2406 2407 if (snd_BUG_ON(!ice->pcm)) 2408 return -EIO; 2409 2410 if (!ice->own_routing) { 2411 err = snd_ctl_add(ice->card, 2412 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice)); 2413 if (err < 0) 2414 return err; 2415 } 2416 2417 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice)); 2418 if (err < 0) 2419 return err; 2420 2421 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice)); 2422 if (err < 0) 2423 return err; 2424 kctl->id.device = ice->pcm->device; 2425 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice)); 2426 if (err < 0) 2427 return err; 2428 kctl->id.device = ice->pcm->device; 2429 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice)); 2430 if (err < 0) 2431 return err; 2432 kctl->id.device = ice->pcm->device; 2433#if 0 /* use default only */ 2434 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice)); 2435 if (err < 0) 2436 return err; 2437 kctl->id.device = ice->pcm->device; 2438 ice->spdif.stream_ctl = kctl; 2439#endif 2440 return 0; 2441} 2442 2443 2444static int snd_vt1724_build_controls(struct snd_ice1712 *ice) 2445{ 2446 int err; 2447 2448 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice)); 2449 if (err < 0) 2450 return err; 2451 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice)); 2452 if (err < 0) 2453 return err; 2454 2455 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice)); 2456 if (err < 0) 2457 return err; 2458 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice)); 2459 if (err < 0) 2460 return err; 2461 2462 if (!ice->own_routing && ice->num_total_dacs > 0) { 2463 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route; 2464 tmp.count = ice->num_total_dacs; 2465 if (ice->vt1720 && tmp.count > 2) 2466 tmp.count = 2; 2467 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2468 if (err < 0) 2469 return err; 2470 } 2471 2472 return snd_ctl_add(ice->card, 2473 snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice)); 2474} 2475 2476static int snd_vt1724_free(struct snd_ice1712 *ice) 2477{ 2478 if (!ice->port) 2479 goto __hw_end; 2480 /* mask all interrupts */ 2481 outb(0xff, ICEMT1724(ice, DMA_INT_MASK)); 2482 outb(0xff, ICEREG1724(ice, IRQMASK)); 2483 /* --- */ 2484__hw_end: 2485 if (ice->irq >= 0) 2486 free_irq(ice->irq, ice); 2487 pci_release_regions(ice->pci); 2488 snd_ice1712_akm4xxx_free(ice); 2489 pci_disable_device(ice->pci); 2490 kfree(ice->spec); 2491 kfree(ice); 2492 return 0; 2493} 2494 2495static int snd_vt1724_dev_free(struct snd_device *device) 2496{ 2497 struct snd_ice1712 *ice = device->device_data; 2498 return snd_vt1724_free(ice); 2499} 2500 2501static int snd_vt1724_create(struct snd_card *card, 2502 struct pci_dev *pci, 2503 const char *modelname, 2504 struct snd_ice1712 **r_ice1712) 2505{ 2506 struct snd_ice1712 *ice; 2507 int err; 2508 static const struct snd_device_ops ops = { 2509 .dev_free = snd_vt1724_dev_free, 2510 }; 2511 2512 *r_ice1712 = NULL; 2513 2514 /* enable PCI device */ 2515 err = pci_enable_device(pci); 2516 if (err < 0) 2517 return err; 2518 2519 ice = kzalloc(sizeof(*ice), GFP_KERNEL); 2520 if (ice == NULL) { 2521 pci_disable_device(pci); 2522 return -ENOMEM; 2523 } 2524 ice->vt1724 = 1; 2525 spin_lock_init(&ice->reg_lock); 2526 mutex_init(&ice->gpio_mutex); 2527 mutex_init(&ice->open_mutex); 2528 mutex_init(&ice->i2c_mutex); 2529 ice->gpio.set_mask = snd_vt1724_set_gpio_mask; 2530 ice->gpio.get_mask = snd_vt1724_get_gpio_mask; 2531 ice->gpio.set_dir = snd_vt1724_set_gpio_dir; 2532 ice->gpio.get_dir = snd_vt1724_get_gpio_dir; 2533 ice->gpio.set_data = snd_vt1724_set_gpio_data; 2534 ice->gpio.get_data = snd_vt1724_get_gpio_data; 2535 ice->card = card; 2536 ice->pci = pci; 2537 ice->irq = -1; 2538 pci_set_master(pci); 2539 snd_vt1724_proc_init(ice); 2540 2541 card->private_data = ice; 2542 2543 err = pci_request_regions(pci, "ICE1724"); 2544 if (err < 0) { 2545 kfree(ice); 2546 pci_disable_device(pci); 2547 return err; 2548 } 2549 ice->port = pci_resource_start(pci, 0); 2550 ice->profi_port = pci_resource_start(pci, 1); 2551 2552 if (request_irq(pci->irq, snd_vt1724_interrupt, 2553 IRQF_SHARED, KBUILD_MODNAME, ice)) { 2554 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 2555 snd_vt1724_free(ice); 2556 return -EIO; 2557 } 2558 2559 ice->irq = pci->irq; 2560 card->sync_irq = ice->irq; 2561 2562 snd_vt1724_chip_reset(ice); 2563 if (snd_vt1724_read_eeprom(ice, modelname) < 0) { 2564 snd_vt1724_free(ice); 2565 return -EIO; 2566 } 2567 if (snd_vt1724_chip_init(ice) < 0) { 2568 snd_vt1724_free(ice); 2569 return -EIO; 2570 } 2571 2572 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops); 2573 if (err < 0) { 2574 snd_vt1724_free(ice); 2575 return err; 2576 } 2577 2578 *r_ice1712 = ice; 2579 return 0; 2580} 2581 2582 2583/* 2584 * 2585 * Registration 2586 * 2587 */ 2588 2589static int snd_vt1724_probe(struct pci_dev *pci, 2590 const struct pci_device_id *pci_id) 2591{ 2592 static int dev; 2593 struct snd_card *card; 2594 struct snd_ice1712 *ice; 2595 int pcm_dev = 0, err; 2596 const struct snd_ice1712_card_info * const *tbl, *c; 2597 2598 if (dev >= SNDRV_CARDS) 2599 return -ENODEV; 2600 if (!enable[dev]) { 2601 dev++; 2602 return -ENOENT; 2603 } 2604 2605 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 2606 0, &card); 2607 if (err < 0) 2608 return err; 2609 2610 strcpy(card->driver, "ICE1724"); 2611 strcpy(card->shortname, "ICEnsemble ICE1724"); 2612 2613 err = snd_vt1724_create(card, pci, model[dev], &ice); 2614 if (err < 0) { 2615 snd_card_free(card); 2616 return err; 2617 } 2618 2619 /* field init before calling chip_init */ 2620 ice->ext_clock_count = 0; 2621 2622 for (tbl = card_tables; *tbl; tbl++) { 2623 for (c = *tbl; c->name; c++) { 2624 if ((model[dev] && c->model && 2625 !strcmp(model[dev], c->model)) || 2626 (c->subvendor == ice->eeprom.subvendor)) { 2627 strcpy(card->shortname, c->name); 2628 if (c->driver) /* specific driver? */ 2629 strcpy(card->driver, c->driver); 2630 if (c->chip_init) { 2631 err = c->chip_init(ice); 2632 if (err < 0) { 2633 snd_card_free(card); 2634 return err; 2635 } 2636 } 2637 goto __found; 2638 } 2639 } 2640 } 2641 c = &no_matched; 2642__found: 2643 /* 2644 * VT1724 has separate DMAs for the analog and the SPDIF streams while 2645 * ICE1712 has only one for both (mixed up). 2646 * 2647 * Confusingly the analog PCM is named "professional" here because it 2648 * was called so in ice1712 driver, and vt1724 driver is derived from 2649 * ice1712 driver. 2650 */ 2651 ice->pro_rate_default = PRO_RATE_DEFAULT; 2652 if (!ice->is_spdif_master) 2653 ice->is_spdif_master = stdclock_is_spdif_master; 2654 if (!ice->get_rate) 2655 ice->get_rate = stdclock_get_rate; 2656 if (!ice->set_rate) 2657 ice->set_rate = stdclock_set_rate; 2658 if (!ice->set_mclk) 2659 ice->set_mclk = stdclock_set_mclk; 2660 if (!ice->set_spdif_clock) 2661 ice->set_spdif_clock = stdclock_set_spdif_clock; 2662 if (!ice->get_spdif_master_type) 2663 ice->get_spdif_master_type = stdclock_get_spdif_master_type; 2664 if (!ice->ext_clock_names) 2665 ice->ext_clock_names = ext_clock_names; 2666 if (!ice->ext_clock_count) 2667 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names); 2668 2669 if (!ice->hw_rates) 2670 set_std_hw_rates(ice); 2671 2672 err = snd_vt1724_pcm_profi(ice, pcm_dev++); 2673 if (err < 0) { 2674 snd_card_free(card); 2675 return err; 2676 } 2677 2678 err = snd_vt1724_pcm_spdif(ice, pcm_dev++); 2679 if (err < 0) { 2680 snd_card_free(card); 2681 return err; 2682 } 2683 2684 err = snd_vt1724_pcm_indep(ice, pcm_dev++); 2685 if (err < 0) { 2686 snd_card_free(card); 2687 return err; 2688 } 2689 2690 err = snd_vt1724_ac97_mixer(ice); 2691 if (err < 0) { 2692 snd_card_free(card); 2693 return err; 2694 } 2695 2696 err = snd_vt1724_build_controls(ice); 2697 if (err < 0) { 2698 snd_card_free(card); 2699 return err; 2700 } 2701 2702 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */ 2703 err = snd_vt1724_spdif_build_controls(ice); 2704 if (err < 0) { 2705 snd_card_free(card); 2706 return err; 2707 } 2708 } 2709 2710 if (c->build_controls) { 2711 err = c->build_controls(ice); 2712 if (err < 0) { 2713 snd_card_free(card); 2714 return err; 2715 } 2716 } 2717 2718 if (!c->no_mpu401) { 2719 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) { 2720 struct snd_rawmidi *rmidi; 2721 2722 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi); 2723 if (err < 0) { 2724 snd_card_free(card); 2725 return err; 2726 } 2727 ice->rmidi[0] = rmidi; 2728 rmidi->private_data = ice; 2729 strcpy(rmidi->name, "ICE1724 MIDI"); 2730 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT | 2731 SNDRV_RAWMIDI_INFO_INPUT | 2732 SNDRV_RAWMIDI_INFO_DUPLEX; 2733 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, 2734 &vt1724_midi_output_ops); 2735 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, 2736 &vt1724_midi_input_ops); 2737 2738 /* set watermarks */ 2739 outb(VT1724_MPU_RX_FIFO | 0x1, 2740 ICEREG1724(ice, MPU_FIFO_WM)); 2741 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM)); 2742 /* set UART mode */ 2743 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL)); 2744 } 2745 } 2746 2747 sprintf(card->longname, "%s at 0x%lx, irq %i", 2748 card->shortname, ice->port, ice->irq); 2749 2750 err = snd_card_register(card); 2751 if (err < 0) { 2752 snd_card_free(card); 2753 return err; 2754 } 2755 pci_set_drvdata(pci, card); 2756 dev++; 2757 return 0; 2758} 2759 2760static void snd_vt1724_remove(struct pci_dev *pci) 2761{ 2762 struct snd_card *card = pci_get_drvdata(pci); 2763 struct snd_ice1712 *ice = card->private_data; 2764 2765 if (ice->card_info && ice->card_info->chip_exit) 2766 ice->card_info->chip_exit(ice); 2767 snd_card_free(card); 2768} 2769 2770#ifdef CONFIG_PM_SLEEP 2771static int snd_vt1724_suspend(struct device *dev) 2772{ 2773 struct snd_card *card = dev_get_drvdata(dev); 2774 struct snd_ice1712 *ice = card->private_data; 2775 2776 if (!ice->pm_suspend_enabled) 2777 return 0; 2778 2779 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2780 2781 snd_ac97_suspend(ice->ac97); 2782 2783 spin_lock_irq(&ice->reg_lock); 2784 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice); 2785 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL)); 2786 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG)); 2787 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2788 spin_unlock_irq(&ice->reg_lock); 2789 2790 if (ice->pm_suspend) 2791 ice->pm_suspend(ice); 2792 return 0; 2793} 2794 2795static int snd_vt1724_resume(struct device *dev) 2796{ 2797 struct snd_card *card = dev_get_drvdata(dev); 2798 struct snd_ice1712 *ice = card->private_data; 2799 2800 if (!ice->pm_suspend_enabled) 2801 return 0; 2802 2803 snd_vt1724_chip_reset(ice); 2804 2805 if (snd_vt1724_chip_init(ice) < 0) { 2806 snd_card_disconnect(card); 2807 return -EIO; 2808 } 2809 2810 if (ice->pm_resume) 2811 ice->pm_resume(ice); 2812 2813 if (ice->pm_saved_is_spdif_master) { 2814 /* switching to external clock via SPDIF */ 2815 ice->set_spdif_clock(ice, 0); 2816 } else { 2817 /* internal on-card clock */ 2818 int rate; 2819 if (ice->cur_rate) 2820 rate = ice->cur_rate; 2821 else 2822 rate = ice->pro_rate_default; 2823 snd_vt1724_set_pro_rate(ice, rate, 1); 2824 } 2825 2826 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl); 2827 2828 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG)); 2829 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK)); 2830 2831 snd_ac97_resume(ice->ac97); 2832 2833 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2834 return 0; 2835} 2836 2837static SIMPLE_DEV_PM_OPS(snd_vt1724_pm, snd_vt1724_suspend, snd_vt1724_resume); 2838#define SND_VT1724_PM_OPS &snd_vt1724_pm 2839#else 2840#define SND_VT1724_PM_OPS NULL 2841#endif /* CONFIG_PM_SLEEP */ 2842 2843static struct pci_driver vt1724_driver = { 2844 .name = KBUILD_MODNAME, 2845 .id_table = snd_vt1724_ids, 2846 .probe = snd_vt1724_probe, 2847 .remove = snd_vt1724_remove, 2848 .driver = { 2849 .pm = SND_VT1724_PM_OPS, 2850 }, 2851}; 2852 2853module_pci_driver(vt1724_driver); 2854