1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Common functionality for the alsa driver code base for HD Audio. 4 */ 5 6#ifndef __SOUND_HDA_CONTROLLER_H 7#define __SOUND_HDA_CONTROLLER_H 8 9#include <linux/timecounter.h> 10#include <linux/interrupt.h> 11#include <sound/core.h> 12#include <sound/pcm.h> 13#include <sound/initval.h> 14#include <sound/hda_codec.h> 15#include <sound/hda_register.h> 16 17#define AZX_MAX_CODECS HDA_MAX_CODECS 18#define AZX_DEFAULT_CODECS 4 19 20/* driver quirks (capabilities) */ 21/* bits 0-7 are used for indicating driver type */ 22#define AZX_DCAPS_NO_TCSEL (1 << 8) /* No Intel TCSEL bit */ 23#define AZX_DCAPS_NO_MSI (1 << 9) /* No MSI support */ 24#define AZX_DCAPS_SNOOP_MASK (3 << 10) /* snoop type mask */ 25#define AZX_DCAPS_SNOOP_OFF (1 << 12) /* snoop default off */ 26#ifdef CONFIG_SND_HDA_I915 27#define AZX_DCAPS_I915_COMPONENT (1 << 13) /* bind with i915 gfx */ 28#else 29#define AZX_DCAPS_I915_COMPONENT 0 /* NOP */ 30#endif 31/* 14 unused */ 32#define AZX_DCAPS_CTX_WORKAROUND (1 << 15) /* X-Fi workaround */ 33#define AZX_DCAPS_POSFIX_LPIB (1 << 16) /* Use LPIB as default */ 34#define AZX_DCAPS_AMD_WORKAROUND (1 << 17) /* AMD-specific workaround */ 35#define AZX_DCAPS_NO_64BIT (1 << 18) /* No 64bit address */ 36/* 19 unused */ 37#define AZX_DCAPS_OLD_SSYNC (1 << 20) /* Old SSYNC reg for ICH */ 38#define AZX_DCAPS_NO_ALIGN_BUFSIZE (1 << 21) /* no buffer size alignment */ 39/* 22 unused */ 40#define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23) /* BDLE in 4k boundary */ 41/* 24 unused */ 42#define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */ 43#define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */ 44#define AZX_DCAPS_RETRY_PROBE (1 << 27) /* retry probe if no codec is configured */ 45#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */ 46#define AZX_DCAPS_NO_MSI64 (1 << 29) /* Stick to 32-bit MSIs */ 47#define AZX_DCAPS_SEPARATE_STREAM_TAG (1 << 30) /* capture and playback use separate stream tag */ 48#define AZX_DCAPS_LS2X_WORKAROUND (1 << 31) /* Loongson-2H workaround */ 49 50enum { 51 AZX_SNOOP_TYPE_NONE, 52 AZX_SNOOP_TYPE_SCH, 53 AZX_SNOOP_TYPE_ATI, 54 AZX_SNOOP_TYPE_NVIDIA, 55}; 56 57struct azx_dev { 58 struct hdac_stream core; 59 60 unsigned int irq_pending:1; 61 /* 62 * For VIA: 63 * A flag to ensure DMA position is 0 64 * when link position is not greater than FIFO size 65 */ 66 unsigned int insufficient:1; 67 68 /* For Loongson */ 69 unsigned int fix_prvpos; 70}; 71 72#define azx_stream(dev) (&(dev)->core) 73#define stream_to_azx_dev(s) container_of(s, struct azx_dev, core) 74 75struct azx; 76 77/* Functions to read/write to hda registers. */ 78struct hda_controller_ops { 79 /* Disable msi if supported, PCI only */ 80 int (*disable_msi_reset_irq)(struct azx *); 81 void (*pcm_mmap_prepare)(struct snd_pcm_substream *substream, 82 struct vm_area_struct *area); 83 /* Check if current position is acceptable */ 84 int (*position_check)(struct azx *chip, struct azx_dev *azx_dev); 85 /* enable/disable the link power */ 86 int (*link_power)(struct azx *chip, bool enable); 87}; 88 89struct azx_pcm { 90 struct azx *chip; 91 struct snd_pcm *pcm; 92 struct hda_codec *codec; 93 struct hda_pcm *info; 94 struct list_head list; 95}; 96 97typedef unsigned int (*azx_get_pos_callback_t)(struct azx *, struct azx_dev *); 98typedef int (*azx_get_delay_callback_t)(struct azx *, struct azx_dev *, unsigned int pos); 99 100struct azx { 101 struct hda_bus bus; 102 103 struct snd_card *card; 104 struct pci_dev *pci; 105 int dev_index; 106 107 /* chip type specific */ 108 int driver_type; 109 unsigned int driver_caps; 110 int playback_streams; 111 int playback_index_offset; 112 int capture_streams; 113 int capture_index_offset; 114 int num_streams; 115 int jackpoll_interval; /* jack poll interval in jiffies */ 116 117 /* Register interaction. */ 118 const struct hda_controller_ops *ops; 119 120 /* position adjustment callbacks */ 121 azx_get_pos_callback_t get_position[2]; 122 azx_get_delay_callback_t get_delay[2]; 123 124 /* locks */ 125 struct mutex open_mutex; /* Prevents concurrent open/close operations */ 126 127 /* PCM */ 128 struct list_head pcm_list; /* azx_pcm list */ 129 130 /* HD codec */ 131 int codec_probe_mask; /* copied from probe_mask option */ 132 unsigned int beep_mode; 133 134#ifdef CONFIG_SND_HDA_PATCH_LOADER 135 const struct firmware *fw; 136#endif 137 138 /* flags */ 139 int bdl_pos_adj; 140 unsigned int running:1; 141 unsigned int fallback_to_single_cmd:1; 142 unsigned int single_cmd:1; 143 unsigned int msi:1; 144 unsigned int probing:1; /* codec probing phase */ 145 unsigned int snoop:1; 146 unsigned int uc_buffer:1; /* non-cached pages for stream buffers */ 147 unsigned int align_buffer_size:1; 148 unsigned int region_requested:1; 149 unsigned int disabled:1; /* disabled by vga_switcheroo */ 150 unsigned int pm_prepared:1; 151 152 /* GTS present */ 153 unsigned int gts_present:1; 154 155#ifdef CONFIG_SND_HDA_DSP_LOADER 156 struct azx_dev saved_azx_dev; 157#endif 158}; 159 160#define azx_bus(chip) (&(chip)->bus.core) 161#define bus_to_azx(_bus) container_of(_bus, struct azx, bus.core) 162 163static inline bool azx_snoop(struct azx *chip) 164{ 165 return !IS_ENABLED(CONFIG_X86) || chip->snoop; 166} 167 168/* 169 * macros for easy use 170 */ 171 172#define azx_writel(chip, reg, value) \ 173 snd_hdac_chip_writel(azx_bus(chip), reg, value) 174#define azx_readl(chip, reg) \ 175 snd_hdac_chip_readl(azx_bus(chip), reg) 176#define azx_writew(chip, reg, value) \ 177 snd_hdac_chip_writew(azx_bus(chip), reg, value) 178#define azx_readw(chip, reg) \ 179 snd_hdac_chip_readw(azx_bus(chip), reg) 180#define azx_writeb(chip, reg, value) \ 181 snd_hdac_chip_writeb(azx_bus(chip), reg, value) 182#define azx_readb(chip, reg) \ 183 snd_hdac_chip_readb(azx_bus(chip), reg) 184 185#define azx_has_pm_runtime(chip) \ 186 ((chip)->driver_caps & AZX_DCAPS_PM_RUNTIME) 187 188/* PCM setup */ 189static inline struct azx_dev *get_azx_dev(struct snd_pcm_substream *substream) 190{ 191 return substream->runtime->private_data; 192} 193unsigned int azx_get_position(struct azx *chip, struct azx_dev *azx_dev); 194unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev); 195unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev); 196 197/* Stream control. */ 198void azx_stop_all_streams(struct azx *chip); 199 200/* Allocation functions. */ 201#define azx_alloc_stream_pages(chip) \ 202 snd_hdac_bus_alloc_stream_pages(azx_bus(chip)) 203#define azx_free_stream_pages(chip) \ 204 snd_hdac_bus_free_stream_pages(azx_bus(chip)) 205 206/* Low level azx interface */ 207void azx_init_chip(struct azx *chip, bool full_reset); 208void azx_stop_chip(struct azx *chip); 209#define azx_enter_link_reset(chip) \ 210 snd_hdac_bus_enter_link_reset(azx_bus(chip)) 211irqreturn_t azx_interrupt(int irq, void *dev_id); 212 213/* Codec interface */ 214int azx_bus_init(struct azx *chip, const char *model); 215int azx_probe_codecs(struct azx *chip, unsigned int max_slots); 216int azx_codec_configure(struct azx *chip); 217int azx_init_streams(struct azx *chip); 218void azx_free_streams(struct azx *chip); 219 220#endif /* __SOUND_HDA_CONTROLLER_H */ 221