18c2ecf20Sopenharmony_ci/*************************************************************************** 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ci Copyright Echo Digital Audio Corporation (c) 1998 - 2004 48c2ecf20Sopenharmony_ci All rights reserved 58c2ecf20Sopenharmony_ci www.echoaudio.com 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci This file is part of Echo Digital Audio's generic driver library. 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci Echo Digital Audio's generic driver library is free software; 108c2ecf20Sopenharmony_ci you can redistribute it and/or modify it under the terms of 118c2ecf20Sopenharmony_ci the GNU General Public License as published by the Free Software 128c2ecf20Sopenharmony_ci Foundation. 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci This program is distributed in the hope that it will be useful, 158c2ecf20Sopenharmony_ci but WITHOUT ANY WARRANTY; without even the implied warranty of 168c2ecf20Sopenharmony_ci MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 178c2ecf20Sopenharmony_ci GNU General Public License for more details. 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci You should have received a copy of the GNU General Public License 208c2ecf20Sopenharmony_ci along with this program; if not, write to the Free Software 218c2ecf20Sopenharmony_ci Foundation, Inc., 59 Temple Place - Suite 330, Boston, 228c2ecf20Sopenharmony_ci MA 02111-1307, USA. 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci ************************************************************************* 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci Translation from C++ and adaptation for use in ALSA-Driver 278c2ecf20Sopenharmony_ci were made by Giuliano Pochini <pochini@shiny.it> 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci****************************************************************************/ 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_cistatic int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) 338c2ecf20Sopenharmony_ci{ 348c2ecf20Sopenharmony_ci int err; 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA24)) 378c2ecf20Sopenharmony_ci return -ENODEV; 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci if ((err = init_dsp_comm_page(chip))) { 408c2ecf20Sopenharmony_ci dev_err(chip->card->dev, 418c2ecf20Sopenharmony_ci "init_hw: could not initialize DSP comm page\n"); 428c2ecf20Sopenharmony_ci return err; 438c2ecf20Sopenharmony_ci } 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci chip->device_id = device_id; 468c2ecf20Sopenharmony_ci chip->subdevice_id = subdevice_id; 478c2ecf20Sopenharmony_ci chip->bad_board = true; 488c2ecf20Sopenharmony_ci chip->dsp_code_to_load = FW_DARLA24_DSP; 498c2ecf20Sopenharmony_ci /* Since this card has no ASIC, mark it as loaded so everything 508c2ecf20Sopenharmony_ci works OK */ 518c2ecf20Sopenharmony_ci chip->asic_loaded = true; 528c2ecf20Sopenharmony_ci chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL | 538c2ecf20Sopenharmony_ci ECHO_CLOCK_BIT_ESYNC; 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci if ((err = load_firmware(chip)) < 0) 568c2ecf20Sopenharmony_ci return err; 578c2ecf20Sopenharmony_ci chip->bad_board = false; 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci return err; 608c2ecf20Sopenharmony_ci} 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_cistatic int set_mixer_defaults(struct echoaudio *chip) 658c2ecf20Sopenharmony_ci{ 668c2ecf20Sopenharmony_ci return init_line_levels(chip); 678c2ecf20Sopenharmony_ci} 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_cistatic u32 detect_input_clocks(const struct echoaudio *chip) 728c2ecf20Sopenharmony_ci{ 738c2ecf20Sopenharmony_ci u32 clocks_from_dsp, clock_bits; 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ci /* Map the DSP clock detect bits to the generic driver clock 768c2ecf20Sopenharmony_ci detect bits */ 778c2ecf20Sopenharmony_ci clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks); 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_ci clock_bits = ECHO_CLOCK_BIT_INTERNAL; 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_ci if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_ESYNC) 828c2ecf20Sopenharmony_ci clock_bits |= ECHO_CLOCK_BIT_ESYNC; 838c2ecf20Sopenharmony_ci 848c2ecf20Sopenharmony_ci return clock_bits; 858c2ecf20Sopenharmony_ci} 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_ci 888c2ecf20Sopenharmony_ci 898c2ecf20Sopenharmony_ci/* The Darla24 has no ASIC. Just do nothing */ 908c2ecf20Sopenharmony_cistatic int load_asic(struct echoaudio *chip) 918c2ecf20Sopenharmony_ci{ 928c2ecf20Sopenharmony_ci return 0; 938c2ecf20Sopenharmony_ci} 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_cistatic int set_sample_rate(struct echoaudio *chip, u32 rate) 988c2ecf20Sopenharmony_ci{ 998c2ecf20Sopenharmony_ci u8 clock; 1008c2ecf20Sopenharmony_ci 1018c2ecf20Sopenharmony_ci switch (rate) { 1028c2ecf20Sopenharmony_ci case 96000: 1038c2ecf20Sopenharmony_ci clock = GD24_96000; 1048c2ecf20Sopenharmony_ci break; 1058c2ecf20Sopenharmony_ci case 88200: 1068c2ecf20Sopenharmony_ci clock = GD24_88200; 1078c2ecf20Sopenharmony_ci break; 1088c2ecf20Sopenharmony_ci case 48000: 1098c2ecf20Sopenharmony_ci clock = GD24_48000; 1108c2ecf20Sopenharmony_ci break; 1118c2ecf20Sopenharmony_ci case 44100: 1128c2ecf20Sopenharmony_ci clock = GD24_44100; 1138c2ecf20Sopenharmony_ci break; 1148c2ecf20Sopenharmony_ci case 32000: 1158c2ecf20Sopenharmony_ci clock = GD24_32000; 1168c2ecf20Sopenharmony_ci break; 1178c2ecf20Sopenharmony_ci case 22050: 1188c2ecf20Sopenharmony_ci clock = GD24_22050; 1198c2ecf20Sopenharmony_ci break; 1208c2ecf20Sopenharmony_ci case 16000: 1218c2ecf20Sopenharmony_ci clock = GD24_16000; 1228c2ecf20Sopenharmony_ci break; 1238c2ecf20Sopenharmony_ci case 11025: 1248c2ecf20Sopenharmony_ci clock = GD24_11025; 1258c2ecf20Sopenharmony_ci break; 1268c2ecf20Sopenharmony_ci case 8000: 1278c2ecf20Sopenharmony_ci clock = GD24_8000; 1288c2ecf20Sopenharmony_ci break; 1298c2ecf20Sopenharmony_ci default: 1308c2ecf20Sopenharmony_ci dev_err(chip->card->dev, 1318c2ecf20Sopenharmony_ci "set_sample_rate: Error, invalid sample rate %d\n", 1328c2ecf20Sopenharmony_ci rate); 1338c2ecf20Sopenharmony_ci return -EINVAL; 1348c2ecf20Sopenharmony_ci } 1358c2ecf20Sopenharmony_ci 1368c2ecf20Sopenharmony_ci if (wait_handshake(chip)) 1378c2ecf20Sopenharmony_ci return -EIO; 1388c2ecf20Sopenharmony_ci 1398c2ecf20Sopenharmony_ci dev_dbg(chip->card->dev, 1408c2ecf20Sopenharmony_ci "set_sample_rate: %d clock %d\n", rate, clock); 1418c2ecf20Sopenharmony_ci chip->sample_rate = rate; 1428c2ecf20Sopenharmony_ci 1438c2ecf20Sopenharmony_ci /* Override the sample rate if this card is set to Echo sync. */ 1448c2ecf20Sopenharmony_ci if (chip->input_clock == ECHO_CLOCK_ESYNC) 1458c2ecf20Sopenharmony_ci clock = GD24_EXT_SYNC; 1468c2ecf20Sopenharmony_ci 1478c2ecf20Sopenharmony_ci chip->comm_page->sample_rate = cpu_to_le32(rate); /* ignored by the DSP ? */ 1488c2ecf20Sopenharmony_ci chip->comm_page->gd_clock_state = clock; 1498c2ecf20Sopenharmony_ci clear_handshake(chip); 1508c2ecf20Sopenharmony_ci return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE); 1518c2ecf20Sopenharmony_ci} 1528c2ecf20Sopenharmony_ci 1538c2ecf20Sopenharmony_ci 1548c2ecf20Sopenharmony_ci 1558c2ecf20Sopenharmony_cistatic int set_input_clock(struct echoaudio *chip, u16 clock) 1568c2ecf20Sopenharmony_ci{ 1578c2ecf20Sopenharmony_ci if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL && 1588c2ecf20Sopenharmony_ci clock != ECHO_CLOCK_ESYNC)) 1598c2ecf20Sopenharmony_ci return -EINVAL; 1608c2ecf20Sopenharmony_ci chip->input_clock = clock; 1618c2ecf20Sopenharmony_ci return set_sample_rate(chip, chip->sample_rate); 1628c2ecf20Sopenharmony_ci} 1638c2ecf20Sopenharmony_ci 164