18c2ecf20Sopenharmony_ci/*************************************************************************** 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ci Copyright Echo Digital Audio Corporation (c) 1998 - 2004 48c2ecf20Sopenharmony_ci All rights reserved 58c2ecf20Sopenharmony_ci www.echoaudio.com 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci This file is part of Echo Digital Audio's generic driver library. 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci Echo Digital Audio's generic driver library is free software; 108c2ecf20Sopenharmony_ci you can redistribute it and/or modify it under the terms of 118c2ecf20Sopenharmony_ci the GNU General Public License as published by the Free Software 128c2ecf20Sopenharmony_ci Foundation. 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci This program is distributed in the hope that it will be useful, 158c2ecf20Sopenharmony_ci but WITHOUT ANY WARRANTY; without even the implied warranty of 168c2ecf20Sopenharmony_ci MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 178c2ecf20Sopenharmony_ci GNU General Public License for more details. 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci You should have received a copy of the GNU General Public License 208c2ecf20Sopenharmony_ci along with this program; if not, write to the Free Software 218c2ecf20Sopenharmony_ci Foundation, Inc., 59 Temple Place - Suite 330, Boston, 228c2ecf20Sopenharmony_ci MA 02111-1307, USA. 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci ************************************************************************* 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci Translation from C++ and adaptation for use in ALSA-Driver 278c2ecf20Sopenharmony_ci were made by Giuliano Pochini <pochini@shiny.it> 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci****************************************************************************/ 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_cistatic int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id) 338c2ecf20Sopenharmony_ci{ 348c2ecf20Sopenharmony_ci int err; 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA20)) 378c2ecf20Sopenharmony_ci return -ENODEV; 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci if ((err = init_dsp_comm_page(chip))) { 408c2ecf20Sopenharmony_ci dev_err(chip->card->dev, 418c2ecf20Sopenharmony_ci "init_hw: could not initialize DSP comm page\n"); 428c2ecf20Sopenharmony_ci return err; 438c2ecf20Sopenharmony_ci } 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci chip->device_id = device_id; 468c2ecf20Sopenharmony_ci chip->subdevice_id = subdevice_id; 478c2ecf20Sopenharmony_ci chip->bad_board = true; 488c2ecf20Sopenharmony_ci chip->dsp_code_to_load = FW_DARLA20_DSP; 498c2ecf20Sopenharmony_ci chip->spdif_status = GD_SPDIF_STATUS_UNDEF; 508c2ecf20Sopenharmony_ci chip->clock_state = GD_CLOCK_UNDEF; 518c2ecf20Sopenharmony_ci /* Since this card has no ASIC, mark it as loaded so everything 528c2ecf20Sopenharmony_ci works OK */ 538c2ecf20Sopenharmony_ci chip->asic_loaded = true; 548c2ecf20Sopenharmony_ci chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL; 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci if ((err = load_firmware(chip)) < 0) 578c2ecf20Sopenharmony_ci return err; 588c2ecf20Sopenharmony_ci chip->bad_board = false; 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci return err; 618c2ecf20Sopenharmony_ci} 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_cistatic int set_mixer_defaults(struct echoaudio *chip) 668c2ecf20Sopenharmony_ci{ 678c2ecf20Sopenharmony_ci return init_line_levels(chip); 688c2ecf20Sopenharmony_ci} 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ci/* The Darla20 has no external clock sources */ 738c2ecf20Sopenharmony_cistatic u32 detect_input_clocks(const struct echoaudio *chip) 748c2ecf20Sopenharmony_ci{ 758c2ecf20Sopenharmony_ci return ECHO_CLOCK_BIT_INTERNAL; 768c2ecf20Sopenharmony_ci} 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_ci/* The Darla20 has no ASIC. Just do nothing */ 818c2ecf20Sopenharmony_cistatic int load_asic(struct echoaudio *chip) 828c2ecf20Sopenharmony_ci{ 838c2ecf20Sopenharmony_ci return 0; 848c2ecf20Sopenharmony_ci} 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_ci 888c2ecf20Sopenharmony_cistatic int set_sample_rate(struct echoaudio *chip, u32 rate) 898c2ecf20Sopenharmony_ci{ 908c2ecf20Sopenharmony_ci u8 clock_state, spdif_status; 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci if (wait_handshake(chip)) 938c2ecf20Sopenharmony_ci return -EIO; 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci switch (rate) { 968c2ecf20Sopenharmony_ci case 44100: 978c2ecf20Sopenharmony_ci clock_state = GD_CLOCK_44; 988c2ecf20Sopenharmony_ci spdif_status = GD_SPDIF_STATUS_44; 998c2ecf20Sopenharmony_ci break; 1008c2ecf20Sopenharmony_ci case 48000: 1018c2ecf20Sopenharmony_ci clock_state = GD_CLOCK_48; 1028c2ecf20Sopenharmony_ci spdif_status = GD_SPDIF_STATUS_48; 1038c2ecf20Sopenharmony_ci break; 1048c2ecf20Sopenharmony_ci default: 1058c2ecf20Sopenharmony_ci clock_state = GD_CLOCK_NOCHANGE; 1068c2ecf20Sopenharmony_ci spdif_status = GD_SPDIF_STATUS_NOCHANGE; 1078c2ecf20Sopenharmony_ci break; 1088c2ecf20Sopenharmony_ci } 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_ci if (chip->clock_state == clock_state) 1118c2ecf20Sopenharmony_ci clock_state = GD_CLOCK_NOCHANGE; 1128c2ecf20Sopenharmony_ci if (spdif_status == chip->spdif_status) 1138c2ecf20Sopenharmony_ci spdif_status = GD_SPDIF_STATUS_NOCHANGE; 1148c2ecf20Sopenharmony_ci 1158c2ecf20Sopenharmony_ci chip->comm_page->sample_rate = cpu_to_le32(rate); 1168c2ecf20Sopenharmony_ci chip->comm_page->gd_clock_state = clock_state; 1178c2ecf20Sopenharmony_ci chip->comm_page->gd_spdif_status = spdif_status; 1188c2ecf20Sopenharmony_ci chip->comm_page->gd_resampler_state = 3; /* magic number - should always be 3 */ 1198c2ecf20Sopenharmony_ci 1208c2ecf20Sopenharmony_ci /* Save the new audio state if it changed */ 1218c2ecf20Sopenharmony_ci if (clock_state != GD_CLOCK_NOCHANGE) 1228c2ecf20Sopenharmony_ci chip->clock_state = clock_state; 1238c2ecf20Sopenharmony_ci if (spdif_status != GD_SPDIF_STATUS_NOCHANGE) 1248c2ecf20Sopenharmony_ci chip->spdif_status = spdif_status; 1258c2ecf20Sopenharmony_ci chip->sample_rate = rate; 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_ci clear_handshake(chip); 1288c2ecf20Sopenharmony_ci return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE); 1298c2ecf20Sopenharmony_ci} 130