1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * card-als4000.c - driver for Avance Logic ALS4000 based soundcards. 4 * Copyright (C) 2000 by Bart Hartgers <bart@etpmod.phys.tue.nl>, 5 * Jaroslav Kysela <perex@perex.cz> 6 * Copyright (C) 2002, 2008 by Andreas Mohr <hw7oshyuv3001@sneakemail.com> 7 * 8 * Framework borrowed from Massimo Piccioni's card-als100.c. 9 * 10 * NOTES 11 * 12 * Since Avance does not provide any meaningful documentation, and I 13 * bought an ALS4000 based soundcard, I was forced to base this driver 14 * on reverse engineering. 15 * 16 * Note: this is no longer true (thank you!): 17 * pretty verbose chip docu (ALS4000a.PDF) can be found on the ALSA web site. 18 * Page numbers stated anywhere below with the "SPECS_PAGE:" tag 19 * refer to: ALS4000a.PDF specs Ver 1.0, May 28th, 1998. 20 * 21 * The ALS4000 seems to be the PCI-cousin of the ALS100. It contains an 22 * ALS100-like SB DSP/mixer, an OPL3 synth, a MPU401 and a gameport 23 * interface. These subsystems can be mapped into ISA io-port space, 24 * using the PCI-interface. In addition, the PCI-bit provides DMA and IRQ 25 * services to the subsystems. 26 * 27 * While ALS4000 is very similar to a SoundBlaster, the differences in 28 * DMA and capturing require more changes to the SoundBlaster than 29 * desirable, so I made this separate driver. 30 * 31 * The ALS4000 can do real full duplex playback/capture. 32 * 33 * FMDAC: 34 * - 0x4f -> port 0x14 35 * - port 0x15 |= 1 36 * 37 * Enable/disable 3D sound: 38 * - 0x50 -> port 0x14 39 * - change bit 6 (0x40) of port 0x15 40 * 41 * Set QSound: 42 * - 0xdb -> port 0x14 43 * - set port 0x15: 44 * 0x3e (mode 3), 0x3c (mode 2), 0x3a (mode 1), 0x38 (mode 0) 45 * 46 * Set KSound: 47 * - value -> some port 0x0c0d 48 * 49 * ToDo: 50 * - by default, don't enable legacy game and use PCI game I/O 51 * - power management? (card can do voice wakeup according to datasheet!!) 52 */ 53 54#include <linux/io.h> 55#include <linux/init.h> 56#include <linux/pci.h> 57#include <linux/gameport.h> 58#include <linux/module.h> 59#include <linux/dma-mapping.h> 60#include <sound/core.h> 61#include <sound/pcm.h> 62#include <sound/rawmidi.h> 63#include <sound/mpu401.h> 64#include <sound/opl3.h> 65#include <sound/sb.h> 66#include <sound/initval.h> 67 68MODULE_AUTHOR("Bart Hartgers <bart@etpmod.phys.tue.nl>, Andreas Mohr"); 69MODULE_DESCRIPTION("Avance Logic ALS4000"); 70MODULE_LICENSE("GPL"); 71MODULE_SUPPORTED_DEVICE("{{Avance Logic,ALS4000}}"); 72 73#if IS_REACHABLE(CONFIG_GAMEPORT) 74#define SUPPORT_JOYSTICK 1 75#endif 76 77static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 78static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 79static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 80#ifdef SUPPORT_JOYSTICK 81static int joystick_port[SNDRV_CARDS]; 82#endif 83 84module_param_array(index, int, NULL, 0444); 85MODULE_PARM_DESC(index, "Index value for ALS4000 soundcard."); 86module_param_array(id, charp, NULL, 0444); 87MODULE_PARM_DESC(id, "ID string for ALS4000 soundcard."); 88module_param_array(enable, bool, NULL, 0444); 89MODULE_PARM_DESC(enable, "Enable ALS4000 soundcard."); 90#ifdef SUPPORT_JOYSTICK 91module_param_hw_array(joystick_port, int, ioport, NULL, 0444); 92MODULE_PARM_DESC(joystick_port, "Joystick port address for ALS4000 soundcard. (0 = disabled)"); 93#endif 94 95struct snd_card_als4000 { 96 /* most frequent access first */ 97 unsigned long iobase; 98 struct pci_dev *pci; 99 struct snd_sb *chip; 100#ifdef SUPPORT_JOYSTICK 101 struct gameport *gameport; 102#endif 103}; 104 105static const struct pci_device_id snd_als4000_ids[] = { 106 { 0x4005, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ALS4000 */ 107 { 0, } 108}; 109 110MODULE_DEVICE_TABLE(pci, snd_als4000_ids); 111 112enum als4k_iobase_t { 113 /* IOx: B == Byte, W = Word, D = DWord; SPECS_PAGE: 37 */ 114 ALS4K_IOD_00_AC97_ACCESS = 0x00, 115 ALS4K_IOW_04_AC97_READ = 0x04, 116 ALS4K_IOB_06_AC97_STATUS = 0x06, 117 ALS4K_IOB_07_IRQSTATUS = 0x07, 118 ALS4K_IOD_08_GCR_DATA = 0x08, 119 ALS4K_IOB_0C_GCR_INDEX = 0x0c, 120 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU = 0x0e, 121 ALS4K_IOB_10_ADLIB_ADDR0 = 0x10, 122 ALS4K_IOB_11_ADLIB_ADDR1 = 0x11, 123 ALS4K_IOB_12_ADLIB_ADDR2 = 0x12, 124 ALS4K_IOB_13_ADLIB_ADDR3 = 0x13, 125 ALS4K_IOB_14_MIXER_INDEX = 0x14, 126 ALS4K_IOB_15_MIXER_DATA = 0x15, 127 ALS4K_IOB_16_ESP_RESET = 0x16, 128 ALS4K_IOB_16_ACK_FOR_CR1E = 0x16, /* 2nd function */ 129 ALS4K_IOB_18_OPL_ADDR0 = 0x18, 130 ALS4K_IOB_19_OPL_ADDR1 = 0x19, 131 ALS4K_IOB_1A_ESP_RD_DATA = 0x1a, 132 ALS4K_IOB_1C_ESP_CMD_DATA = 0x1c, 133 ALS4K_IOB_1C_ESP_WR_STATUS = 0x1c, /* 2nd function */ 134 ALS4K_IOB_1E_ESP_RD_STATUS8 = 0x1e, 135 ALS4K_IOB_1F_ESP_RD_STATUS16 = 0x1f, 136 ALS4K_IOB_20_ESP_GAMEPORT_200 = 0x20, 137 ALS4K_IOB_21_ESP_GAMEPORT_201 = 0x21, 138 ALS4K_IOB_30_MIDI_DATA = 0x30, 139 ALS4K_IOB_31_MIDI_STATUS = 0x31, 140 ALS4K_IOB_31_MIDI_COMMAND = 0x31, /* 2nd function */ 141}; 142 143enum als4k_iobase_0e_t { 144 ALS4K_IOB_0E_MPU_IRQ = 0x10, 145 ALS4K_IOB_0E_CR1E_IRQ = 0x40, 146 ALS4K_IOB_0E_SB_DMA_IRQ = 0x80, 147}; 148 149enum als4k_gcr_t { /* all registers 32bit wide; SPECS_PAGE: 38 to 42 */ 150 ALS4K_GCR8C_MISC_CTRL = 0x8c, 151 ALS4K_GCR90_TEST_MODE_REG = 0x90, 152 ALS4K_GCR91_DMA0_ADDR = 0x91, 153 ALS4K_GCR92_DMA0_MODE_COUNT = 0x92, 154 ALS4K_GCR93_DMA1_ADDR = 0x93, 155 ALS4K_GCR94_DMA1_MODE_COUNT = 0x94, 156 ALS4K_GCR95_DMA3_ADDR = 0x95, 157 ALS4K_GCR96_DMA3_MODE_COUNT = 0x96, 158 ALS4K_GCR99_DMA_EMULATION_CTRL = 0x99, 159 ALS4K_GCRA0_FIFO1_CURRENT_ADDR = 0xa0, 160 ALS4K_GCRA1_FIFO1_STATUS_BYTECOUNT = 0xa1, 161 ALS4K_GCRA2_FIFO2_PCIADDR = 0xa2, 162 ALS4K_GCRA3_FIFO2_COUNT = 0xa3, 163 ALS4K_GCRA4_FIFO2_CURRENT_ADDR = 0xa4, 164 ALS4K_GCRA5_FIFO1_STATUS_BYTECOUNT = 0xa5, 165 ALS4K_GCRA6_PM_CTRL = 0xa6, 166 ALS4K_GCRA7_PCI_ACCESS_STORAGE = 0xa7, 167 ALS4K_GCRA8_LEGACY_CFG1 = 0xa8, 168 ALS4K_GCRA9_LEGACY_CFG2 = 0xa9, 169 ALS4K_GCRFF_DUMMY_SCRATCH = 0xff, 170}; 171 172enum als4k_gcr8c_t { 173 ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE = 0x8000, 174 ALS4K_GCR8C_CHIP_REV_MASK = 0xf0000 175}; 176 177static inline void snd_als4k_iobase_writeb(unsigned long iobase, 178 enum als4k_iobase_t reg, 179 u8 val) 180{ 181 outb(val, iobase + reg); 182} 183 184static inline void snd_als4k_iobase_writel(unsigned long iobase, 185 enum als4k_iobase_t reg, 186 u32 val) 187{ 188 outl(val, iobase + reg); 189} 190 191static inline u8 snd_als4k_iobase_readb(unsigned long iobase, 192 enum als4k_iobase_t reg) 193{ 194 return inb(iobase + reg); 195} 196 197static inline u32 snd_als4k_iobase_readl(unsigned long iobase, 198 enum als4k_iobase_t reg) 199{ 200 return inl(iobase + reg); 201} 202 203static inline void snd_als4k_gcr_write_addr(unsigned long iobase, 204 enum als4k_gcr_t reg, 205 u32 val) 206{ 207 snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg); 208 snd_als4k_iobase_writel(iobase, ALS4K_IOD_08_GCR_DATA, val); 209} 210 211static inline void snd_als4k_gcr_write(struct snd_sb *sb, 212 enum als4k_gcr_t reg, 213 u32 val) 214{ 215 snd_als4k_gcr_write_addr(sb->alt_port, reg, val); 216} 217 218static inline u32 snd_als4k_gcr_read_addr(unsigned long iobase, 219 enum als4k_gcr_t reg) 220{ 221 /* SPECS_PAGE: 37/38 */ 222 snd_als4k_iobase_writeb(iobase, ALS4K_IOB_0C_GCR_INDEX, reg); 223 return snd_als4k_iobase_readl(iobase, ALS4K_IOD_08_GCR_DATA); 224} 225 226static inline u32 snd_als4k_gcr_read(struct snd_sb *sb, enum als4k_gcr_t reg) 227{ 228 return snd_als4k_gcr_read_addr(sb->alt_port, reg); 229} 230 231enum als4k_cr_t { /* all registers 8bit wide; SPECS_PAGE: 20 to 23 */ 232 ALS4K_CR0_SB_CONFIG = 0x00, 233 ALS4K_CR2_MISC_CONTROL = 0x02, 234 ALS4K_CR3_CONFIGURATION = 0x03, 235 ALS4K_CR17_FIFO_STATUS = 0x17, 236 ALS4K_CR18_ESP_MAJOR_VERSION = 0x18, 237 ALS4K_CR19_ESP_MINOR_VERSION = 0x19, 238 ALS4K_CR1A_MPU401_UART_MODE_CONTROL = 0x1a, 239 ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO = 0x1c, 240 ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI = 0x1d, 241 ALS4K_CR1E_FIFO2_CONTROL = 0x1e, /* secondary PCM FIFO (recording) */ 242 ALS4K_CR3A_MISC_CONTROL = 0x3a, 243 ALS4K_CR3B_CRC32_BYTE0 = 0x3b, /* for testing, activate via CR3A */ 244 ALS4K_CR3C_CRC32_BYTE1 = 0x3c, 245 ALS4K_CR3D_CRC32_BYTE2 = 0x3d, 246 ALS4K_CR3E_CRC32_BYTE3 = 0x3e, 247}; 248 249enum als4k_cr0_t { 250 ALS4K_CR0_DMA_CONTIN_MODE_CTRL = 0x02, /* IRQ/FIFO controlled for 0/1 */ 251 ALS4K_CR0_DMA_90H_MODE_CTRL = 0x04, /* IRQ/FIFO controlled for 0/1 */ 252 ALS4K_CR0_MX80_81_REG_WRITE_ENABLE = 0x80, 253}; 254 255static inline void snd_als4_cr_write(struct snd_sb *chip, 256 enum als4k_cr_t reg, 257 u8 data) 258{ 259 /* Control Register is reg | 0xc0 (bit 7, 6 set) on sbmixer_index 260 * NOTE: assumes chip->mixer_lock to be locked externally already! 261 * SPECS_PAGE: 6 */ 262 snd_sbmixer_write(chip, reg | 0xc0, data); 263} 264 265static inline u8 snd_als4_cr_read(struct snd_sb *chip, 266 enum als4k_cr_t reg) 267{ 268 /* NOTE: assumes chip->mixer_lock to be locked externally already! */ 269 return snd_sbmixer_read(chip, reg | 0xc0); 270} 271 272 273 274static void snd_als4000_set_rate(struct snd_sb *chip, unsigned int rate) 275{ 276 if (!(chip->mode & SB_RATE_LOCK)) { 277 snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT); 278 snd_sbdsp_command(chip, rate>>8); 279 snd_sbdsp_command(chip, rate); 280 } 281} 282 283static inline void snd_als4000_set_capture_dma(struct snd_sb *chip, 284 dma_addr_t addr, unsigned size) 285{ 286 /* SPECS_PAGE: 40 */ 287 snd_als4k_gcr_write(chip, ALS4K_GCRA2_FIFO2_PCIADDR, addr); 288 snd_als4k_gcr_write(chip, ALS4K_GCRA3_FIFO2_COUNT, (size-1)); 289} 290 291static inline void snd_als4000_set_playback_dma(struct snd_sb *chip, 292 dma_addr_t addr, 293 unsigned size) 294{ 295 /* SPECS_PAGE: 38 */ 296 snd_als4k_gcr_write(chip, ALS4K_GCR91_DMA0_ADDR, addr); 297 snd_als4k_gcr_write(chip, ALS4K_GCR92_DMA0_MODE_COUNT, 298 (size-1)|0x180000); 299} 300 301#define ALS4000_FORMAT_SIGNED (1<<0) 302#define ALS4000_FORMAT_16BIT (1<<1) 303#define ALS4000_FORMAT_STEREO (1<<2) 304 305static int snd_als4000_get_format(struct snd_pcm_runtime *runtime) 306{ 307 int result; 308 309 result = 0; 310 if (snd_pcm_format_signed(runtime->format)) 311 result |= ALS4000_FORMAT_SIGNED; 312 if (snd_pcm_format_physical_width(runtime->format) == 16) 313 result |= ALS4000_FORMAT_16BIT; 314 if (runtime->channels > 1) 315 result |= ALS4000_FORMAT_STEREO; 316 return result; 317} 318 319/* structure for setting up playback */ 320static const struct { 321 unsigned char dsp_cmd, dma_on, dma_off, format; 322} playback_cmd_vals[]={ 323/* ALS4000_FORMAT_U8_MONO */ 324{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_MONO }, 325/* ALS4000_FORMAT_S8_MONO */ 326{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_MONO }, 327/* ALS4000_FORMAT_U16L_MONO */ 328{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_MONO }, 329/* ALS4000_FORMAT_S16L_MONO */ 330{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_MONO }, 331/* ALS4000_FORMAT_U8_STEREO */ 332{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_STEREO }, 333/* ALS4000_FORMAT_S8_STEREO */ 334{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_STEREO }, 335/* ALS4000_FORMAT_U16L_STEREO */ 336{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_STEREO }, 337/* ALS4000_FORMAT_S16L_STEREO */ 338{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_STEREO }, 339}; 340#define playback_cmd(chip) (playback_cmd_vals[(chip)->playback_format]) 341 342/* structure for setting up capture */ 343enum { CMD_WIDTH8=0x04, CMD_SIGNED=0x10, CMD_MONO=0x80, CMD_STEREO=0xA0 }; 344static const unsigned char capture_cmd_vals[]= 345{ 346CMD_WIDTH8|CMD_MONO, /* ALS4000_FORMAT_U8_MONO */ 347CMD_WIDTH8|CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S8_MONO */ 348CMD_MONO, /* ALS4000_FORMAT_U16L_MONO */ 349CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S16L_MONO */ 350CMD_WIDTH8|CMD_STEREO, /* ALS4000_FORMAT_U8_STEREO */ 351CMD_WIDTH8|CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S8_STEREO */ 352CMD_STEREO, /* ALS4000_FORMAT_U16L_STEREO */ 353CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S16L_STEREO */ 354}; 355#define capture_cmd(chip) (capture_cmd_vals[(chip)->capture_format]) 356 357static int snd_als4000_capture_prepare(struct snd_pcm_substream *substream) 358{ 359 struct snd_sb *chip = snd_pcm_substream_chip(substream); 360 struct snd_pcm_runtime *runtime = substream->runtime; 361 unsigned long size; 362 unsigned count; 363 364 chip->capture_format = snd_als4000_get_format(runtime); 365 366 size = snd_pcm_lib_buffer_bytes(substream); 367 count = snd_pcm_lib_period_bytes(substream); 368 369 if (chip->capture_format & ALS4000_FORMAT_16BIT) 370 count >>= 1; 371 count--; 372 373 spin_lock_irq(&chip->reg_lock); 374 snd_als4000_set_rate(chip, runtime->rate); 375 snd_als4000_set_capture_dma(chip, runtime->dma_addr, size); 376 spin_unlock_irq(&chip->reg_lock); 377 spin_lock_irq(&chip->mixer_lock); 378 snd_als4_cr_write(chip, ALS4K_CR1C_FIFO2_BLOCK_LENGTH_LO, count & 0xff); 379 snd_als4_cr_write(chip, ALS4K_CR1D_FIFO2_BLOCK_LENGTH_HI, count >> 8); 380 spin_unlock_irq(&chip->mixer_lock); 381 return 0; 382} 383 384static int snd_als4000_playback_prepare(struct snd_pcm_substream *substream) 385{ 386 struct snd_sb *chip = snd_pcm_substream_chip(substream); 387 struct snd_pcm_runtime *runtime = substream->runtime; 388 unsigned long size; 389 unsigned count; 390 391 chip->playback_format = snd_als4000_get_format(runtime); 392 393 size = snd_pcm_lib_buffer_bytes(substream); 394 count = snd_pcm_lib_period_bytes(substream); 395 396 if (chip->playback_format & ALS4000_FORMAT_16BIT) 397 count >>= 1; 398 count--; 399 400 /* FIXME: from second playback on, there's a lot more clicks and pops 401 * involved here than on first playback. Fiddling with 402 * tons of different settings didn't help (DMA, speaker on/off, 403 * reordering, ...). Something seems to get enabled on playback 404 * that I haven't found out how to disable again, which then causes 405 * the switching pops to reach the speakers the next time here. */ 406 spin_lock_irq(&chip->reg_lock); 407 snd_als4000_set_rate(chip, runtime->rate); 408 snd_als4000_set_playback_dma(chip, runtime->dma_addr, size); 409 410 /* SPEAKER_ON not needed, since dma_on seems to also enable speaker */ 411 /* snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON); */ 412 snd_sbdsp_command(chip, playback_cmd(chip).dsp_cmd); 413 snd_sbdsp_command(chip, playback_cmd(chip).format); 414 snd_sbdsp_command(chip, count & 0xff); 415 snd_sbdsp_command(chip, count >> 8); 416 snd_sbdsp_command(chip, playback_cmd(chip).dma_off); 417 spin_unlock_irq(&chip->reg_lock); 418 419 return 0; 420} 421 422static int snd_als4000_capture_trigger(struct snd_pcm_substream *substream, int cmd) 423{ 424 struct snd_sb *chip = snd_pcm_substream_chip(substream); 425 int result = 0; 426 427 /* FIXME race condition in here!!! 428 chip->mode non-atomic update gets consistently protected 429 by reg_lock always, _except_ for this place!! 430 Probably need to take reg_lock as outer (or inner??) lock, too. 431 (or serialize both lock operations? probably not, though... - racy?) 432 */ 433 spin_lock(&chip->mixer_lock); 434 switch (cmd) { 435 case SNDRV_PCM_TRIGGER_START: 436 case SNDRV_PCM_TRIGGER_RESUME: 437 chip->mode |= SB_RATE_LOCK_CAPTURE; 438 snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL, 439 capture_cmd(chip)); 440 break; 441 case SNDRV_PCM_TRIGGER_STOP: 442 case SNDRV_PCM_TRIGGER_SUSPEND: 443 chip->mode &= ~SB_RATE_LOCK_CAPTURE; 444 snd_als4_cr_write(chip, ALS4K_CR1E_FIFO2_CONTROL, 445 capture_cmd(chip)); 446 break; 447 default: 448 result = -EINVAL; 449 break; 450 } 451 spin_unlock(&chip->mixer_lock); 452 return result; 453} 454 455static int snd_als4000_playback_trigger(struct snd_pcm_substream *substream, int cmd) 456{ 457 struct snd_sb *chip = snd_pcm_substream_chip(substream); 458 int result = 0; 459 460 spin_lock(&chip->reg_lock); 461 switch (cmd) { 462 case SNDRV_PCM_TRIGGER_START: 463 case SNDRV_PCM_TRIGGER_RESUME: 464 chip->mode |= SB_RATE_LOCK_PLAYBACK; 465 snd_sbdsp_command(chip, playback_cmd(chip).dma_on); 466 break; 467 case SNDRV_PCM_TRIGGER_STOP: 468 case SNDRV_PCM_TRIGGER_SUSPEND: 469 snd_sbdsp_command(chip, playback_cmd(chip).dma_off); 470 chip->mode &= ~SB_RATE_LOCK_PLAYBACK; 471 break; 472 default: 473 result = -EINVAL; 474 break; 475 } 476 spin_unlock(&chip->reg_lock); 477 return result; 478} 479 480static snd_pcm_uframes_t snd_als4000_capture_pointer(struct snd_pcm_substream *substream) 481{ 482 struct snd_sb *chip = snd_pcm_substream_chip(substream); 483 unsigned int result; 484 485 spin_lock(&chip->reg_lock); 486 result = snd_als4k_gcr_read(chip, ALS4K_GCRA4_FIFO2_CURRENT_ADDR); 487 spin_unlock(&chip->reg_lock); 488 result &= 0xffff; 489 return bytes_to_frames( substream->runtime, result ); 490} 491 492static snd_pcm_uframes_t snd_als4000_playback_pointer(struct snd_pcm_substream *substream) 493{ 494 struct snd_sb *chip = snd_pcm_substream_chip(substream); 495 unsigned result; 496 497 spin_lock(&chip->reg_lock); 498 result = snd_als4k_gcr_read(chip, ALS4K_GCRA0_FIFO1_CURRENT_ADDR); 499 spin_unlock(&chip->reg_lock); 500 result &= 0xffff; 501 return bytes_to_frames( substream->runtime, result ); 502} 503 504/* FIXME: this IRQ routine doesn't really support IRQ sharing (we always 505 * return IRQ_HANDLED no matter whether we actually had an IRQ flag or not). 506 * ALS4000a.PDF writes that while ACKing IRQ in PCI block will *not* ACK 507 * the IRQ in the SB core, ACKing IRQ in SB block *will* ACK the PCI IRQ 508 * register (alt_port + ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU). Probably something 509 * could be optimized here to query/write one register only... 510 * And even if both registers need to be queried, then there's still the 511 * question of whether it's actually correct to ACK PCI IRQ before reading 512 * SB IRQ like we do now, since ALS4000a.PDF mentions that PCI IRQ will *clear* 513 * SB IRQ status. 514 * (hmm, SPECS_PAGE: 38 mentions it the other way around!) 515 * And do we *really* need the lock here for *reading* SB_DSP4_IRQSTATUS?? 516 * */ 517static irqreturn_t snd_als4000_interrupt(int irq, void *dev_id) 518{ 519 struct snd_sb *chip = dev_id; 520 unsigned pci_irqstatus; 521 unsigned sb_irqstatus; 522 523 /* find out which bit of the ALS4000 PCI block produced the interrupt, 524 SPECS_PAGE: 38, 5 */ 525 pci_irqstatus = snd_als4k_iobase_readb(chip->alt_port, 526 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU); 527 if ((pci_irqstatus & ALS4K_IOB_0E_SB_DMA_IRQ) 528 && (chip->playback_substream)) /* playback */ 529 snd_pcm_period_elapsed(chip->playback_substream); 530 if ((pci_irqstatus & ALS4K_IOB_0E_CR1E_IRQ) 531 && (chip->capture_substream)) /* capturing */ 532 snd_pcm_period_elapsed(chip->capture_substream); 533 if ((pci_irqstatus & ALS4K_IOB_0E_MPU_IRQ) 534 && (chip->rmidi)) /* MPU401 interrupt */ 535 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); 536 /* ACK the PCI block IRQ */ 537 snd_als4k_iobase_writeb(chip->alt_port, 538 ALS4K_IOB_0E_IRQTYPE_SB_CR1E_MPU, pci_irqstatus); 539 540 spin_lock(&chip->mixer_lock); 541 /* SPECS_PAGE: 20 */ 542 sb_irqstatus = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS); 543 spin_unlock(&chip->mixer_lock); 544 545 if (sb_irqstatus & SB_IRQTYPE_8BIT) 546 snd_sb_ack_8bit(chip); 547 if (sb_irqstatus & SB_IRQTYPE_16BIT) 548 snd_sb_ack_16bit(chip); 549 if (sb_irqstatus & SB_IRQTYPE_MPUIN) 550 inb(chip->mpu_port); 551 if (sb_irqstatus & ALS4K_IRQTYPE_CR1E_DMA) 552 snd_als4k_iobase_readb(chip->alt_port, 553 ALS4K_IOB_16_ACK_FOR_CR1E); 554 555 /* dev_dbg(chip->card->dev, "als4000: irq 0x%04x 0x%04x\n", 556 pci_irqstatus, sb_irqstatus); */ 557 558 /* only ack the things we actually handled above */ 559 return IRQ_RETVAL( 560 (pci_irqstatus & (ALS4K_IOB_0E_SB_DMA_IRQ|ALS4K_IOB_0E_CR1E_IRQ| 561 ALS4K_IOB_0E_MPU_IRQ)) 562 || (sb_irqstatus & (SB_IRQTYPE_8BIT|SB_IRQTYPE_16BIT| 563 SB_IRQTYPE_MPUIN|ALS4K_IRQTYPE_CR1E_DMA)) 564 ); 565} 566 567/*****************************************************************/ 568 569static const struct snd_pcm_hardware snd_als4000_playback = 570{ 571 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 572 SNDRV_PCM_INFO_MMAP_VALID), 573 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | 574 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */ 575 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 576 .rate_min = 4000, 577 .rate_max = 48000, 578 .channels_min = 1, 579 .channels_max = 2, 580 .buffer_bytes_max = 65536, 581 .period_bytes_min = 64, 582 .period_bytes_max = 65536, 583 .periods_min = 1, 584 .periods_max = 1024, 585 .fifo_size = 0 586}; 587 588static const struct snd_pcm_hardware snd_als4000_capture = 589{ 590 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 591 SNDRV_PCM_INFO_MMAP_VALID), 592 .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | 593 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */ 594 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 595 .rate_min = 4000, 596 .rate_max = 48000, 597 .channels_min = 1, 598 .channels_max = 2, 599 .buffer_bytes_max = 65536, 600 .period_bytes_min = 64, 601 .period_bytes_max = 65536, 602 .periods_min = 1, 603 .periods_max = 1024, 604 .fifo_size = 0 605}; 606 607/*****************************************************************/ 608 609static int snd_als4000_playback_open(struct snd_pcm_substream *substream) 610{ 611 struct snd_sb *chip = snd_pcm_substream_chip(substream); 612 struct snd_pcm_runtime *runtime = substream->runtime; 613 614 chip->playback_substream = substream; 615 runtime->hw = snd_als4000_playback; 616 return 0; 617} 618 619static int snd_als4000_playback_close(struct snd_pcm_substream *substream) 620{ 621 struct snd_sb *chip = snd_pcm_substream_chip(substream); 622 623 chip->playback_substream = NULL; 624 return 0; 625} 626 627static int snd_als4000_capture_open(struct snd_pcm_substream *substream) 628{ 629 struct snd_sb *chip = snd_pcm_substream_chip(substream); 630 struct snd_pcm_runtime *runtime = substream->runtime; 631 632 chip->capture_substream = substream; 633 runtime->hw = snd_als4000_capture; 634 return 0; 635} 636 637static int snd_als4000_capture_close(struct snd_pcm_substream *substream) 638{ 639 struct snd_sb *chip = snd_pcm_substream_chip(substream); 640 641 chip->capture_substream = NULL; 642 return 0; 643} 644 645/******************************************************************/ 646 647static const struct snd_pcm_ops snd_als4000_playback_ops = { 648 .open = snd_als4000_playback_open, 649 .close = snd_als4000_playback_close, 650 .prepare = snd_als4000_playback_prepare, 651 .trigger = snd_als4000_playback_trigger, 652 .pointer = snd_als4000_playback_pointer 653}; 654 655static const struct snd_pcm_ops snd_als4000_capture_ops = { 656 .open = snd_als4000_capture_open, 657 .close = snd_als4000_capture_close, 658 .prepare = snd_als4000_capture_prepare, 659 .trigger = snd_als4000_capture_trigger, 660 .pointer = snd_als4000_capture_pointer 661}; 662 663static int snd_als4000_pcm(struct snd_sb *chip, int device) 664{ 665 struct snd_pcm *pcm; 666 int err; 667 668 err = snd_pcm_new(chip->card, "ALS4000 DSP", device, 1, 1, &pcm); 669 if (err < 0) 670 return err; 671 pcm->private_data = chip; 672 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; 673 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_als4000_playback_ops); 674 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_als4000_capture_ops); 675 676 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 677 &chip->pci->dev, 64*1024, 64*1024); 678 679 chip->pcm = pcm; 680 681 return 0; 682} 683 684/******************************************************************/ 685 686static void snd_als4000_set_addr(unsigned long iobase, 687 unsigned int sb_io, 688 unsigned int mpu_io, 689 unsigned int opl_io, 690 unsigned int game_io) 691{ 692 u32 cfg1 = 0; 693 u32 cfg2 = 0; 694 695 if (mpu_io > 0) 696 cfg2 |= (mpu_io | 1) << 16; 697 if (sb_io > 0) 698 cfg2 |= (sb_io | 1); 699 if (game_io > 0) 700 cfg1 |= (game_io | 1) << 16; 701 if (opl_io > 0) 702 cfg1 |= (opl_io | 1); 703 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA8_LEGACY_CFG1, cfg1); 704 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA9_LEGACY_CFG2, cfg2); 705} 706 707static void snd_als4000_configure(struct snd_sb *chip) 708{ 709 u8 tmp; 710 int i; 711 712 /* do some more configuration */ 713 spin_lock_irq(&chip->mixer_lock); 714 tmp = snd_als4_cr_read(chip, ALS4K_CR0_SB_CONFIG); 715 snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG, 716 tmp|ALS4K_CR0_MX80_81_REG_WRITE_ENABLE); 717 /* always select DMA channel 0, since we do not actually use DMA 718 * SPECS_PAGE: 19/20 */ 719 snd_sbmixer_write(chip, SB_DSP4_DMASETUP, SB_DMASETUP_DMA0); 720 snd_als4_cr_write(chip, ALS4K_CR0_SB_CONFIG, 721 tmp & ~ALS4K_CR0_MX80_81_REG_WRITE_ENABLE); 722 spin_unlock_irq(&chip->mixer_lock); 723 724 spin_lock_irq(&chip->reg_lock); 725 /* enable interrupts */ 726 snd_als4k_gcr_write(chip, ALS4K_GCR8C_MISC_CTRL, 727 ALS4K_GCR8C_IRQ_MASK_CTRL_ENABLE); 728 729 /* SPECS_PAGE: 39 */ 730 for (i = ALS4K_GCR91_DMA0_ADDR; i <= ALS4K_GCR96_DMA3_MODE_COUNT; ++i) 731 snd_als4k_gcr_write(chip, i, 0); 732 /* enable burst mode to prevent dropouts during high PCI bus usage */ 733 snd_als4k_gcr_write(chip, ALS4K_GCR99_DMA_EMULATION_CTRL, 734 (snd_als4k_gcr_read(chip, ALS4K_GCR99_DMA_EMULATION_CTRL) & ~0x07) | 0x04); 735 spin_unlock_irq(&chip->reg_lock); 736} 737 738#ifdef SUPPORT_JOYSTICK 739static int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) 740{ 741 struct gameport *gp; 742 struct resource *r; 743 int io_port; 744 745 if (joystick_port[dev] == 0) 746 return -ENODEV; 747 748 if (joystick_port[dev] == 1) { /* auto-detect */ 749 for (io_port = 0x200; io_port <= 0x218; io_port += 8) { 750 r = request_region(io_port, 8, "ALS4000 gameport"); 751 if (r) 752 break; 753 } 754 } else { 755 io_port = joystick_port[dev]; 756 r = request_region(io_port, 8, "ALS4000 gameport"); 757 } 758 759 if (!r) { 760 dev_warn(&acard->pci->dev, "cannot reserve joystick ports\n"); 761 return -EBUSY; 762 } 763 764 acard->gameport = gp = gameport_allocate_port(); 765 if (!gp) { 766 dev_err(&acard->pci->dev, "cannot allocate memory for gameport\n"); 767 release_and_free_resource(r); 768 return -ENOMEM; 769 } 770 771 gameport_set_name(gp, "ALS4000 Gameport"); 772 gameport_set_phys(gp, "pci%s/gameport0", pci_name(acard->pci)); 773 gameport_set_dev_parent(gp, &acard->pci->dev); 774 gp->io = io_port; 775 gameport_set_port_data(gp, r); 776 777 /* Enable legacy joystick port */ 778 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1); 779 780 gameport_register_port(acard->gameport); 781 782 return 0; 783} 784 785static void snd_als4000_free_gameport(struct snd_card_als4000 *acard) 786{ 787 if (acard->gameport) { 788 struct resource *r = gameport_get_port_data(acard->gameport); 789 790 gameport_unregister_port(acard->gameport); 791 acard->gameport = NULL; 792 793 /* disable joystick */ 794 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0); 795 796 release_and_free_resource(r); 797 } 798} 799#else 800static inline int snd_als4000_create_gameport(struct snd_card_als4000 *acard, int dev) { return -ENOSYS; } 801static inline void snd_als4000_free_gameport(struct snd_card_als4000 *acard) { } 802#endif 803 804static void snd_card_als4000_free( struct snd_card *card ) 805{ 806 struct snd_card_als4000 *acard = card->private_data; 807 808 /* make sure that interrupts are disabled */ 809 snd_als4k_gcr_write_addr(acard->iobase, ALS4K_GCR8C_MISC_CTRL, 0); 810 /* free resources */ 811 snd_als4000_free_gameport(acard); 812 pci_release_regions(acard->pci); 813 pci_disable_device(acard->pci); 814} 815 816static int snd_card_als4000_probe(struct pci_dev *pci, 817 const struct pci_device_id *pci_id) 818{ 819 static int dev; 820 struct snd_card *card; 821 struct snd_card_als4000 *acard; 822 unsigned long iobase; 823 struct snd_sb *chip; 824 struct snd_opl3 *opl3; 825 unsigned short word; 826 int err; 827 828 if (dev >= SNDRV_CARDS) 829 return -ENODEV; 830 if (!enable[dev]) { 831 dev++; 832 return -ENOENT; 833 } 834 835 /* enable PCI device */ 836 if ((err = pci_enable_device(pci)) < 0) { 837 return err; 838 } 839 /* check, if we can restrict PCI DMA transfers to 24 bits */ 840 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(24)) < 0 || 841 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(24)) < 0) { 842 dev_err(&pci->dev, "architecture does not support 24bit PCI busmaster DMA\n"); 843 pci_disable_device(pci); 844 return -ENXIO; 845 } 846 847 if ((err = pci_request_regions(pci, "ALS4000")) < 0) { 848 pci_disable_device(pci); 849 return err; 850 } 851 iobase = pci_resource_start(pci, 0); 852 853 pci_read_config_word(pci, PCI_COMMAND, &word); 854 pci_write_config_word(pci, PCI_COMMAND, word | PCI_COMMAND_IO); 855 pci_set_master(pci); 856 857 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 858 sizeof(*acard) /* private_data: acard */, 859 &card); 860 if (err < 0) { 861 pci_release_regions(pci); 862 pci_disable_device(pci); 863 return err; 864 } 865 866 acard = card->private_data; 867 acard->pci = pci; 868 acard->iobase = iobase; 869 card->private_free = snd_card_als4000_free; 870 871 /* disable all legacy ISA stuff */ 872 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 0); 873 874 if ((err = snd_sbdsp_create(card, 875 iobase + ALS4K_IOB_10_ADLIB_ADDR0, 876 pci->irq, 877 /* internally registered as IRQF_SHARED in case of ALS4000 SB */ 878 snd_als4000_interrupt, 879 -1, 880 -1, 881 SB_HW_ALS4000, 882 &chip)) < 0) { 883 goto out_err; 884 } 885 acard->chip = chip; 886 887 chip->pci = pci; 888 chip->alt_port = iobase; 889 890 snd_als4000_configure(chip); 891 892 strcpy(card->driver, "ALS4000"); 893 strcpy(card->shortname, "Avance Logic ALS4000"); 894 sprintf(card->longname, "%s at 0x%lx, irq %i", 895 card->shortname, chip->alt_port, chip->irq); 896 897 if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_ALS4000, 898 iobase + ALS4K_IOB_30_MIDI_DATA, 899 MPU401_INFO_INTEGRATED | 900 MPU401_INFO_IRQ_HOOK, 901 -1, &chip->rmidi)) < 0) { 902 dev_err(&pci->dev, "no MPU-401 device at 0x%lx?\n", 903 iobase + ALS4K_IOB_30_MIDI_DATA); 904 goto out_err; 905 } 906 /* FIXME: ALS4000 has interesting MPU401 configuration features 907 * at ALS4K_CR1A_MPU401_UART_MODE_CONTROL 908 * (pass-thru / UART switching, fast MIDI clock, etc.), 909 * however there doesn't seem to be an ALSA API for this... 910 * SPECS_PAGE: 21 */ 911 912 if ((err = snd_als4000_pcm(chip, 0)) < 0) { 913 goto out_err; 914 } 915 if ((err = snd_sbmixer_new(chip)) < 0) { 916 goto out_err; 917 } 918 919 if (snd_opl3_create(card, 920 iobase + ALS4K_IOB_10_ADLIB_ADDR0, 921 iobase + ALS4K_IOB_12_ADLIB_ADDR2, 922 OPL3_HW_AUTO, 1, &opl3) < 0) { 923 dev_err(&pci->dev, "no OPL device at 0x%lx-0x%lx?\n", 924 iobase + ALS4K_IOB_10_ADLIB_ADDR0, 925 iobase + ALS4K_IOB_12_ADLIB_ADDR2); 926 } else { 927 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { 928 goto out_err; 929 } 930 } 931 932 snd_als4000_create_gameport(acard, dev); 933 934 if ((err = snd_card_register(card)) < 0) { 935 goto out_err; 936 } 937 pci_set_drvdata(pci, card); 938 dev++; 939 err = 0; 940 goto out; 941 942out_err: 943 snd_card_free(card); 944 945out: 946 return err; 947} 948 949static void snd_card_als4000_remove(struct pci_dev *pci) 950{ 951 snd_card_free(pci_get_drvdata(pci)); 952} 953 954#ifdef CONFIG_PM_SLEEP 955static int snd_als4000_suspend(struct device *dev) 956{ 957 struct snd_card *card = dev_get_drvdata(dev); 958 struct snd_card_als4000 *acard = card->private_data; 959 struct snd_sb *chip = acard->chip; 960 961 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 962 963 snd_sbmixer_suspend(chip); 964 return 0; 965} 966 967static int snd_als4000_resume(struct device *dev) 968{ 969 struct snd_card *card = dev_get_drvdata(dev); 970 struct snd_card_als4000 *acard = card->private_data; 971 struct snd_sb *chip = acard->chip; 972 973 snd_als4000_configure(chip); 974 snd_sbdsp_reset(chip); 975 snd_sbmixer_resume(chip); 976 977#ifdef SUPPORT_JOYSTICK 978 if (acard->gameport) 979 snd_als4000_set_addr(acard->iobase, 0, 0, 0, 1); 980#endif 981 982 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 983 return 0; 984} 985 986static SIMPLE_DEV_PM_OPS(snd_als4000_pm, snd_als4000_suspend, snd_als4000_resume); 987#define SND_ALS4000_PM_OPS &snd_als4000_pm 988#else 989#define SND_ALS4000_PM_OPS NULL 990#endif /* CONFIG_PM_SLEEP */ 991 992static struct pci_driver als4000_driver = { 993 .name = KBUILD_MODNAME, 994 .id_table = snd_als4000_ids, 995 .probe = snd_card_als4000_probe, 996 .remove = snd_card_als4000_remove, 997 .driver = { 998 .pm = SND_ALS4000_PM_OPS, 999 }, 1000}; 1001 1002module_pci_driver(als4000_driver); 1003