18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * Device Tree Source for AMCC Redwood(460SX) 38c2ecf20Sopenharmony_ci * 48c2ecf20Sopenharmony_ci * Copyright 2008 AMCC <tmarri@amcc.com> 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * This file is licensed under the terms of the GNU General Public 78c2ecf20Sopenharmony_ci * License version 2. This program is licensed "as is" without 88c2ecf20Sopenharmony_ci * any warranty of any kind, whether express or implied. 98c2ecf20Sopenharmony_ci */ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci/dts-v1/; 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci/ { 148c2ecf20Sopenharmony_ci #address-cells = <2>; 158c2ecf20Sopenharmony_ci #size-cells = <1>; 168c2ecf20Sopenharmony_ci model = "amcc,redwood"; 178c2ecf20Sopenharmony_ci compatible = "amcc,redwood"; 188c2ecf20Sopenharmony_ci dcr-parent = <&{/cpus/cpu@0}>; 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci aliases { 218c2ecf20Sopenharmony_ci ethernet0 = &EMAC0; 228c2ecf20Sopenharmony_ci serial0 = &UART0; 238c2ecf20Sopenharmony_ci }; 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci cpus { 268c2ecf20Sopenharmony_ci #address-cells = <1>; 278c2ecf20Sopenharmony_ci #size-cells = <0>; 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci cpu@0 { 308c2ecf20Sopenharmony_ci device_type = "cpu"; 318c2ecf20Sopenharmony_ci model = "PowerPC,460SX"; 328c2ecf20Sopenharmony_ci reg = <0x00000000>; 338c2ecf20Sopenharmony_ci clock-frequency = <0>; /* Filled in by U-Boot */ 348c2ecf20Sopenharmony_ci timebase-frequency = <0>; /* Filled in by U-Boot */ 358c2ecf20Sopenharmony_ci i-cache-line-size = <32>; 368c2ecf20Sopenharmony_ci d-cache-line-size = <32>; 378c2ecf20Sopenharmony_ci i-cache-size = <32768>; 388c2ecf20Sopenharmony_ci d-cache-size = <32768>; 398c2ecf20Sopenharmony_ci dcr-controller; 408c2ecf20Sopenharmony_ci dcr-access-method = "native"; 418c2ecf20Sopenharmony_ci }; 428c2ecf20Sopenharmony_ci }; 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ci memory { 458c2ecf20Sopenharmony_ci device_type = "memory"; 468c2ecf20Sopenharmony_ci reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ 478c2ecf20Sopenharmony_ci }; 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci UIC0: interrupt-controller0 { 508c2ecf20Sopenharmony_ci compatible = "ibm,uic-460sx","ibm,uic"; 518c2ecf20Sopenharmony_ci interrupt-controller; 528c2ecf20Sopenharmony_ci cell-index = <0>; 538c2ecf20Sopenharmony_ci dcr-reg = <0x0c0 0x009>; 548c2ecf20Sopenharmony_ci #address-cells = <0>; 558c2ecf20Sopenharmony_ci #size-cells = <0>; 568c2ecf20Sopenharmony_ci #interrupt-cells = <2>; 578c2ecf20Sopenharmony_ci }; 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci UIC1: interrupt-controller1 { 608c2ecf20Sopenharmony_ci compatible = "ibm,uic-460sx","ibm,uic"; 618c2ecf20Sopenharmony_ci interrupt-controller; 628c2ecf20Sopenharmony_ci cell-index = <1>; 638c2ecf20Sopenharmony_ci dcr-reg = <0x0d0 0x009>; 648c2ecf20Sopenharmony_ci #address-cells = <0>; 658c2ecf20Sopenharmony_ci #size-cells = <0>; 668c2ecf20Sopenharmony_ci #interrupt-cells = <2>; 678c2ecf20Sopenharmony_ci interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 688c2ecf20Sopenharmony_ci interrupt-parent = <&UIC0>; 698c2ecf20Sopenharmony_ci }; 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci UIC2: interrupt-controller2 { 728c2ecf20Sopenharmony_ci compatible = "ibm,uic-460sx","ibm,uic"; 738c2ecf20Sopenharmony_ci interrupt-controller; 748c2ecf20Sopenharmony_ci cell-index = <2>; 758c2ecf20Sopenharmony_ci dcr-reg = <0x0e0 0x009>; 768c2ecf20Sopenharmony_ci #address-cells = <0>; 778c2ecf20Sopenharmony_ci #size-cells = <0>; 788c2ecf20Sopenharmony_ci #interrupt-cells = <2>; 798c2ecf20Sopenharmony_ci interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ 808c2ecf20Sopenharmony_ci interrupt-parent = <&UIC0>; 818c2ecf20Sopenharmony_ci }; 828c2ecf20Sopenharmony_ci 838c2ecf20Sopenharmony_ci UIC3: interrupt-controller3 { 848c2ecf20Sopenharmony_ci compatible = "ibm,uic-460sx","ibm,uic"; 858c2ecf20Sopenharmony_ci interrupt-controller; 868c2ecf20Sopenharmony_ci cell-index = <3>; 878c2ecf20Sopenharmony_ci dcr-reg = <0x0f0 0x009>; 888c2ecf20Sopenharmony_ci #address-cells = <0>; 898c2ecf20Sopenharmony_ci #size-cells = <0>; 908c2ecf20Sopenharmony_ci #interrupt-cells = <2>; 918c2ecf20Sopenharmony_ci interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ 928c2ecf20Sopenharmony_ci interrupt-parent = <&UIC0>; 938c2ecf20Sopenharmony_ci }; 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci SDR0: sdr { 968c2ecf20Sopenharmony_ci compatible = "ibm,sdr-460sx"; 978c2ecf20Sopenharmony_ci dcr-reg = <0x00e 0x002>; 988c2ecf20Sopenharmony_ci }; 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ci CPR0: cpr { 1018c2ecf20Sopenharmony_ci compatible = "ibm,cpr-460sx"; 1028c2ecf20Sopenharmony_ci dcr-reg = <0x00c 0x002>; 1038c2ecf20Sopenharmony_ci }; 1048c2ecf20Sopenharmony_ci 1058c2ecf20Sopenharmony_ci plb { 1068c2ecf20Sopenharmony_ci compatible = "ibm,plb-460sx", "ibm,plb4"; 1078c2ecf20Sopenharmony_ci #address-cells = <2>; 1088c2ecf20Sopenharmony_ci #size-cells = <1>; 1098c2ecf20Sopenharmony_ci ranges; 1108c2ecf20Sopenharmony_ci clock-frequency = <0>; /* Filled in by U-Boot */ 1118c2ecf20Sopenharmony_ci 1128c2ecf20Sopenharmony_ci SDRAM0: sdram { 1138c2ecf20Sopenharmony_ci compatible = "ibm,sdram-460sx", "ibm,sdram-405gp"; 1148c2ecf20Sopenharmony_ci dcr-reg = <0x010 0x002>; 1158c2ecf20Sopenharmony_ci }; 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_ci MAL0: mcmal { 1188c2ecf20Sopenharmony_ci compatible = "ibm,mcmal-460sx", "ibm,mcmal2"; 1198c2ecf20Sopenharmony_ci dcr-reg = <0x180 0x62>; 1208c2ecf20Sopenharmony_ci num-tx-chans = <4>; 1218c2ecf20Sopenharmony_ci num-rx-chans = <32>; 1228c2ecf20Sopenharmony_ci #address-cells = <1>; 1238c2ecf20Sopenharmony_ci #size-cells = <1>; 1248c2ecf20Sopenharmony_ci interrupt-parent = <&UIC1>; 1258c2ecf20Sopenharmony_ci interrupts = < /*TXEOB*/ 0x6 0x4 1268c2ecf20Sopenharmony_ci /*RXEOB*/ 0x7 0x4 1278c2ecf20Sopenharmony_ci /*SERR*/ 0x1 0x4 1288c2ecf20Sopenharmony_ci /*TXDE*/ 0x2 0x4 1298c2ecf20Sopenharmony_ci /*RXDE*/ 0x3 0x4 1308c2ecf20Sopenharmony_ci /*COAL TX0*/ 0x18 0x2 1318c2ecf20Sopenharmony_ci /*COAL TX1*/ 0x19 0x2 1328c2ecf20Sopenharmony_ci /*COAL TX2*/ 0x1a 0x2 1338c2ecf20Sopenharmony_ci /*COAL TX3*/ 0x1b 0x2 1348c2ecf20Sopenharmony_ci /*COAL RX0*/ 0x1c 0x2 1358c2ecf20Sopenharmony_ci /*COAL RX1*/ 0x1d 0x2 1368c2ecf20Sopenharmony_ci /*COAL RX2*/ 0x1e 0x2 1378c2ecf20Sopenharmony_ci /*COAL RX3*/ 0x1f 0x2>; 1388c2ecf20Sopenharmony_ci }; 1398c2ecf20Sopenharmony_ci 1408c2ecf20Sopenharmony_ci POB0: opb { 1418c2ecf20Sopenharmony_ci compatible = "ibm,opb-460sx", "ibm,opb"; 1428c2ecf20Sopenharmony_ci #address-cells = <1>; 1438c2ecf20Sopenharmony_ci #size-cells = <1>; 1448c2ecf20Sopenharmony_ci ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; 1458c2ecf20Sopenharmony_ci clock-frequency = <0>; /* Filled in by U-Boot */ 1468c2ecf20Sopenharmony_ci 1478c2ecf20Sopenharmony_ci EBC0: ebc { 1488c2ecf20Sopenharmony_ci compatible = "ibm,ebc-460sx", "ibm,ebc"; 1498c2ecf20Sopenharmony_ci dcr-reg = <0x012 0x002>; 1508c2ecf20Sopenharmony_ci #address-cells = <2>; 1518c2ecf20Sopenharmony_ci #size-cells = <1>; 1528c2ecf20Sopenharmony_ci clock-frequency = <0>; /* Filled in by U-Boot */ 1538c2ecf20Sopenharmony_ci /* ranges property is supplied by U-Boot */ 1548c2ecf20Sopenharmony_ci interrupts = <0x6 0x4>; 1558c2ecf20Sopenharmony_ci interrupt-parent = <&UIC1>; 1568c2ecf20Sopenharmony_ci 1578c2ecf20Sopenharmony_ci nor_flash@0,0 { 1588c2ecf20Sopenharmony_ci compatible = "amd,s29gl512n", "cfi-flash"; 1598c2ecf20Sopenharmony_ci bank-width = <2>; 1608c2ecf20Sopenharmony_ci reg = <0x0000000 0x00000000 0x04000000>; 1618c2ecf20Sopenharmony_ci #address-cells = <1>; 1628c2ecf20Sopenharmony_ci #size-cells = <1>; 1638c2ecf20Sopenharmony_ci partition@0 { 1648c2ecf20Sopenharmony_ci label = "kernel"; 1658c2ecf20Sopenharmony_ci reg = <0x00000000 0x001e0000>; 1668c2ecf20Sopenharmony_ci }; 1678c2ecf20Sopenharmony_ci partition@1e0000 { 1688c2ecf20Sopenharmony_ci label = "dtb"; 1698c2ecf20Sopenharmony_ci reg = <0x001e0000 0x00020000>; 1708c2ecf20Sopenharmony_ci }; 1718c2ecf20Sopenharmony_ci partition@200000 { 1728c2ecf20Sopenharmony_ci label = "ramdisk"; 1738c2ecf20Sopenharmony_ci reg = <0x00200000 0x01400000>; 1748c2ecf20Sopenharmony_ci }; 1758c2ecf20Sopenharmony_ci partition@1600000 { 1768c2ecf20Sopenharmony_ci label = "jffs2"; 1778c2ecf20Sopenharmony_ci reg = <0x01600000 0x00400000>; 1788c2ecf20Sopenharmony_ci }; 1798c2ecf20Sopenharmony_ci partition@1a00000 { 1808c2ecf20Sopenharmony_ci label = "user"; 1818c2ecf20Sopenharmony_ci reg = <0x01a00000 0x02560000>; 1828c2ecf20Sopenharmony_ci }; 1838c2ecf20Sopenharmony_ci partition@3f60000 { 1848c2ecf20Sopenharmony_ci label = "env"; 1858c2ecf20Sopenharmony_ci reg = <0x03f60000 0x00040000>; 1868c2ecf20Sopenharmony_ci }; 1878c2ecf20Sopenharmony_ci partition@3fa0000 { 1888c2ecf20Sopenharmony_ci label = "u-boot"; 1898c2ecf20Sopenharmony_ci reg = <0x03fa0000 0x00060000>; 1908c2ecf20Sopenharmony_ci }; 1918c2ecf20Sopenharmony_ci }; 1928c2ecf20Sopenharmony_ci }; 1938c2ecf20Sopenharmony_ci 1948c2ecf20Sopenharmony_ci UART0: serial@ef600200 { 1958c2ecf20Sopenharmony_ci device_type = "serial"; 1968c2ecf20Sopenharmony_ci compatible = "ns16550"; 1978c2ecf20Sopenharmony_ci reg = <0xef600200 0x00000008>; 1988c2ecf20Sopenharmony_ci virtual-reg = <0xef600200>; 1998c2ecf20Sopenharmony_ci clock-frequency = <0>; /* Filled in by U-Boot */ 2008c2ecf20Sopenharmony_ci current-speed = <0>; /* Filled in by U-Boot */ 2018c2ecf20Sopenharmony_ci interrupt-parent = <&UIC0>; 2028c2ecf20Sopenharmony_ci interrupts = <0x0 0x4>; 2038c2ecf20Sopenharmony_ci }; 2048c2ecf20Sopenharmony_ci 2058c2ecf20Sopenharmony_ci RGMII0: emac-rgmii@ef600900 { 2068c2ecf20Sopenharmony_ci compatible = "ibm,rgmii-460sx", "ibm,rgmii"; 2078c2ecf20Sopenharmony_ci reg = <0xef600900 0x00000008>; 2088c2ecf20Sopenharmony_ci }; 2098c2ecf20Sopenharmony_ci 2108c2ecf20Sopenharmony_ci EMAC0: ethernet@ef600a00 { 2118c2ecf20Sopenharmony_ci device_type = "network"; 2128c2ecf20Sopenharmony_ci compatible = "ibm,emac-460sx", "ibm,emac4"; 2138c2ecf20Sopenharmony_ci interrupt-parent = <&EMAC0>; 2148c2ecf20Sopenharmony_ci interrupts = <0x0 0x1>; 2158c2ecf20Sopenharmony_ci #interrupt-cells = <1>; 2168c2ecf20Sopenharmony_ci #address-cells = <0>; 2178c2ecf20Sopenharmony_ci #size-cells = <0>; 2188c2ecf20Sopenharmony_ci interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4 2198c2ecf20Sopenharmony_ci /*Wake*/ 0x1 &UIC2 0x1d 0x4>; 2208c2ecf20Sopenharmony_ci reg = <0xef600a00 0x00000070>; 2218c2ecf20Sopenharmony_ci local-mac-address = [000000000000]; /* Filled in by U-Boot */ 2228c2ecf20Sopenharmony_ci mal-device = <&MAL0>; 2238c2ecf20Sopenharmony_ci mal-tx-channel = <0>; 2248c2ecf20Sopenharmony_ci mal-rx-channel = <0>; 2258c2ecf20Sopenharmony_ci cell-index = <0>; 2268c2ecf20Sopenharmony_ci max-frame-size = <9000>; 2278c2ecf20Sopenharmony_ci rx-fifo-size = <4096>; 2288c2ecf20Sopenharmony_ci tx-fifo-size = <2048>; 2298c2ecf20Sopenharmony_ci rx-fifo-size-gige = <16384>; 2308c2ecf20Sopenharmony_ci phy-mode = "rgmii"; 2318c2ecf20Sopenharmony_ci phy-map = <0x00000000>; 2328c2ecf20Sopenharmony_ci rgmii-device = <&RGMII0>; 2338c2ecf20Sopenharmony_ci rgmii-channel = <0>; 2348c2ecf20Sopenharmony_ci has-inverted-stacr-oc; 2358c2ecf20Sopenharmony_ci has-new-stacr-staopc; 2368c2ecf20Sopenharmony_ci }; 2378c2ecf20Sopenharmony_ci }; 2388c2ecf20Sopenharmony_ci PCIE0: pcie@d00000000 { 2398c2ecf20Sopenharmony_ci device_type = "pci"; 2408c2ecf20Sopenharmony_ci #interrupt-cells = <1>; 2418c2ecf20Sopenharmony_ci #size-cells = <2>; 2428c2ecf20Sopenharmony_ci #address-cells = <3>; 2438c2ecf20Sopenharmony_ci compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; 2448c2ecf20Sopenharmony_ci primary; 2458c2ecf20Sopenharmony_ci port = <0x0>; /* port number */ 2468c2ecf20Sopenharmony_ci reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ 2478c2ecf20Sopenharmony_ci 0x0000000c 0x10000000 0x00001000>; /* Registers */ 2488c2ecf20Sopenharmony_ci dcr-reg = <0x100 0x020>; 2498c2ecf20Sopenharmony_ci sdr-base = <0x300>; 2508c2ecf20Sopenharmony_ci 2518c2ecf20Sopenharmony_ci /* Outbound ranges, one memory and one IO, 2528c2ecf20Sopenharmony_ci * later cannot be changed 2538c2ecf20Sopenharmony_ci */ 2548c2ecf20Sopenharmony_ci ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 2558c2ecf20Sopenharmony_ci 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; 2568c2ecf20Sopenharmony_ci 2578c2ecf20Sopenharmony_ci /* Inbound 2GB range starting at 0 */ 2588c2ecf20Sopenharmony_ci dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; 2598c2ecf20Sopenharmony_ci 2608c2ecf20Sopenharmony_ci /* This drives busses 10 to 0x1f */ 2618c2ecf20Sopenharmony_ci bus-range = <0x10 0x1f>; 2628c2ecf20Sopenharmony_ci 2638c2ecf20Sopenharmony_ci /* Legacy interrupts (note the weird polarity, the bridge seems 2648c2ecf20Sopenharmony_ci * to invert PCIe legacy interrupts). 2658c2ecf20Sopenharmony_ci * We are de-swizzling here because the numbers are actually for 2668c2ecf20Sopenharmony_ci * port of the root complex virtual P2P bridge. But I want 2678c2ecf20Sopenharmony_ci * to avoid putting a node for it in the tree, so the numbers 2688c2ecf20Sopenharmony_ci * below are basically de-swizzled numbers. 2698c2ecf20Sopenharmony_ci * The real slot is on idsel 0, so the swizzling is 1:1 2708c2ecf20Sopenharmony_ci */ 2718c2ecf20Sopenharmony_ci interrupt-map-mask = <0x0 0x0 0x0 0x7>; 2728c2ecf20Sopenharmony_ci interrupt-map = < 2738c2ecf20Sopenharmony_ci 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ 2748c2ecf20Sopenharmony_ci 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ 2758c2ecf20Sopenharmony_ci 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ 2768c2ecf20Sopenharmony_ci 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; 2778c2ecf20Sopenharmony_ci }; 2788c2ecf20Sopenharmony_ci 2798c2ecf20Sopenharmony_ci PCIE1: pcie@d20000000 { 2808c2ecf20Sopenharmony_ci device_type = "pci"; 2818c2ecf20Sopenharmony_ci #interrupt-cells = <1>; 2828c2ecf20Sopenharmony_ci #size-cells = <2>; 2838c2ecf20Sopenharmony_ci #address-cells = <3>; 2848c2ecf20Sopenharmony_ci compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; 2858c2ecf20Sopenharmony_ci primary; 2868c2ecf20Sopenharmony_ci port = <0x1>; /* port number */ 2878c2ecf20Sopenharmony_ci reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ 2888c2ecf20Sopenharmony_ci 0x0000000c 0x10001000 0x00001000>; /* Registers */ 2898c2ecf20Sopenharmony_ci dcr-reg = <0x120 0x020>; 2908c2ecf20Sopenharmony_ci sdr-base = <0x340>; 2918c2ecf20Sopenharmony_ci 2928c2ecf20Sopenharmony_ci /* Outbound ranges, one memory and one IO, 2938c2ecf20Sopenharmony_ci * later cannot be changed 2948c2ecf20Sopenharmony_ci */ 2958c2ecf20Sopenharmony_ci ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 2968c2ecf20Sopenharmony_ci 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; 2978c2ecf20Sopenharmony_ci 2988c2ecf20Sopenharmony_ci /* Inbound 2GB range starting at 0 */ 2998c2ecf20Sopenharmony_ci dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; 3008c2ecf20Sopenharmony_ci 3018c2ecf20Sopenharmony_ci /* This drives busses 10 to 0x1f */ 3028c2ecf20Sopenharmony_ci bus-range = <0x20 0x2f>; 3038c2ecf20Sopenharmony_ci 3048c2ecf20Sopenharmony_ci /* Legacy interrupts (note the weird polarity, the bridge seems 3058c2ecf20Sopenharmony_ci * to invert PCIe legacy interrupts). 3068c2ecf20Sopenharmony_ci * We are de-swizzling here because the numbers are actually for 3078c2ecf20Sopenharmony_ci * port of the root complex virtual P2P bridge. But I want 3088c2ecf20Sopenharmony_ci * to avoid putting a node for it in the tree, so the numbers 3098c2ecf20Sopenharmony_ci * below are basically de-swizzled numbers. 3108c2ecf20Sopenharmony_ci * The real slot is on idsel 0, so the swizzling is 1:1 3118c2ecf20Sopenharmony_ci */ 3128c2ecf20Sopenharmony_ci interrupt-map-mask = <0x0 0x0 0x0 0x7>; 3138c2ecf20Sopenharmony_ci interrupt-map = < 3148c2ecf20Sopenharmony_ci 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ 3158c2ecf20Sopenharmony_ci 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ 3168c2ecf20Sopenharmony_ci 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ 3178c2ecf20Sopenharmony_ci 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; 3188c2ecf20Sopenharmony_ci }; 3198c2ecf20Sopenharmony_ci 3208c2ecf20Sopenharmony_ci PCIE2: pcie@d40000000 { 3218c2ecf20Sopenharmony_ci device_type = "pci"; 3228c2ecf20Sopenharmony_ci #interrupt-cells = <1>; 3238c2ecf20Sopenharmony_ci #size-cells = <2>; 3248c2ecf20Sopenharmony_ci #address-cells = <3>; 3258c2ecf20Sopenharmony_ci compatible = "ibm,plb-pciex-460sx", "ibm,plb-pciex"; 3268c2ecf20Sopenharmony_ci primary; 3278c2ecf20Sopenharmony_ci port = <0x2>; /* port number */ 3288c2ecf20Sopenharmony_ci reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ 3298c2ecf20Sopenharmony_ci 0x0000000c 0x10002000 0x00001000>; /* Registers */ 3308c2ecf20Sopenharmony_ci dcr-reg = <0x140 0x020>; 3318c2ecf20Sopenharmony_ci sdr-base = <0x370>; 3328c2ecf20Sopenharmony_ci 3338c2ecf20Sopenharmony_ci /* Outbound ranges, one memory and one IO, 3348c2ecf20Sopenharmony_ci * later cannot be changed 3358c2ecf20Sopenharmony_ci */ 3368c2ecf20Sopenharmony_ci ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000 3378c2ecf20Sopenharmony_ci 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>; 3388c2ecf20Sopenharmony_ci 3398c2ecf20Sopenharmony_ci /* Inbound 2GB range starting at 0 */ 3408c2ecf20Sopenharmony_ci dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; 3418c2ecf20Sopenharmony_ci 3428c2ecf20Sopenharmony_ci /* This drives busses 10 to 0x1f */ 3438c2ecf20Sopenharmony_ci bus-range = <0x30 0x3f>; 3448c2ecf20Sopenharmony_ci 3458c2ecf20Sopenharmony_ci /* Legacy interrupts (note the weird polarity, the bridge seems 3468c2ecf20Sopenharmony_ci * to invert PCIe legacy interrupts). 3478c2ecf20Sopenharmony_ci * We are de-swizzling here because the numbers are actually for 3488c2ecf20Sopenharmony_ci * port of the root complex virtual P2P bridge. But I want 3498c2ecf20Sopenharmony_ci * to avoid putting a node for it in the tree, so the numbers 3508c2ecf20Sopenharmony_ci * below are basically de-swizzled numbers. 3518c2ecf20Sopenharmony_ci * The real slot is on idsel 0, so the swizzling is 1:1 3528c2ecf20Sopenharmony_ci */ 3538c2ecf20Sopenharmony_ci interrupt-map-mask = <0x0 0x0 0x0 0x7>; 3548c2ecf20Sopenharmony_ci interrupt-map = < 3558c2ecf20Sopenharmony_ci 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */ 3568c2ecf20Sopenharmony_ci 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */ 3578c2ecf20Sopenharmony_ci 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */ 3588c2ecf20Sopenharmony_ci 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; 3598c2ecf20Sopenharmony_ci }; 3608c2ecf20Sopenharmony_ci 3618c2ecf20Sopenharmony_ci MSI: ppc4xx-msi@400300000 { 3628c2ecf20Sopenharmony_ci compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; 3638c2ecf20Sopenharmony_ci reg = < 0x4 0x00300000 0x100 3648c2ecf20Sopenharmony_ci 0x4 0x00300000 0x100>; 3658c2ecf20Sopenharmony_ci sdr-base = <0x3B0>; 3668c2ecf20Sopenharmony_ci msi-data = <0x00000000>; 3678c2ecf20Sopenharmony_ci msi-mask = <0x44440000>; 3688c2ecf20Sopenharmony_ci interrupt-count = <3>; 3698c2ecf20Sopenharmony_ci interrupts =<0 1 2 3>; 3708c2ecf20Sopenharmony_ci interrupt-parent = <&UIC0>; 3718c2ecf20Sopenharmony_ci #interrupt-cells = <1>; 3728c2ecf20Sopenharmony_ci #address-cells = <0>; 3738c2ecf20Sopenharmony_ci #size-cells = <0>; 3748c2ecf20Sopenharmony_ci interrupt-map = <0 &UIC0 0xC 1 3758c2ecf20Sopenharmony_ci 1 &UIC0 0x0D 1 3768c2ecf20Sopenharmony_ci 2 &UIC0 0x0E 1 3778c2ecf20Sopenharmony_ci 3 &UIC0 0x0F 1>; 3788c2ecf20Sopenharmony_ci }; 3798c2ecf20Sopenharmony_ci 3808c2ecf20Sopenharmony_ci }; 3818c2ecf20Sopenharmony_ci 3828c2ecf20Sopenharmony_ci 3838c2ecf20Sopenharmony_ci chosen { 3848c2ecf20Sopenharmony_ci stdout-path = "/plb/opb/serial@ef600200"; 3858c2ecf20Sopenharmony_ci }; 3868c2ecf20Sopenharmony_ci 3878c2ecf20Sopenharmony_ci}; 388