18c2ecf20Sopenharmony_ci/*
28c2ecf20Sopenharmony_ci * Device Tree Source for AMCC Makalu (405EX)
38c2ecf20Sopenharmony_ci *
48c2ecf20Sopenharmony_ci * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
58c2ecf20Sopenharmony_ci *
68c2ecf20Sopenharmony_ci * This file is licensed under the terms of the GNU General Public
78c2ecf20Sopenharmony_ci * License version 2.  This program is licensed "as is" without
88c2ecf20Sopenharmony_ci * any warranty of any kind, whether express or implied.
98c2ecf20Sopenharmony_ci */
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci/dts-v1/;
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci/ {
148c2ecf20Sopenharmony_ci	#address-cells = <1>;
158c2ecf20Sopenharmony_ci	#size-cells = <1>;
168c2ecf20Sopenharmony_ci	model = "amcc,makalu";
178c2ecf20Sopenharmony_ci	compatible = "amcc,makalu";
188c2ecf20Sopenharmony_ci	dcr-parent = <&{/cpus/cpu@0}>;
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci	aliases {
218c2ecf20Sopenharmony_ci		ethernet0 = &EMAC0;
228c2ecf20Sopenharmony_ci		ethernet1 = &EMAC1;
238c2ecf20Sopenharmony_ci		serial0 = &UART0;
248c2ecf20Sopenharmony_ci		serial1 = &UART1;
258c2ecf20Sopenharmony_ci	};
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci	cpus {
288c2ecf20Sopenharmony_ci		#address-cells = <1>;
298c2ecf20Sopenharmony_ci		#size-cells = <0>;
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ci		cpu@0 {
328c2ecf20Sopenharmony_ci			device_type = "cpu";
338c2ecf20Sopenharmony_ci			model = "PowerPC,405EX";
348c2ecf20Sopenharmony_ci			reg = <0x00000000>;
358c2ecf20Sopenharmony_ci			clock-frequency = <0>; /* Filled in by U-Boot */
368c2ecf20Sopenharmony_ci			timebase-frequency = <0>; /* Filled in by U-Boot */
378c2ecf20Sopenharmony_ci			i-cache-line-size = <32>;
388c2ecf20Sopenharmony_ci			d-cache-line-size = <32>;
398c2ecf20Sopenharmony_ci			i-cache-size = <16384>; /* 16 kB */
408c2ecf20Sopenharmony_ci			d-cache-size = <16384>; /* 16 kB */
418c2ecf20Sopenharmony_ci			dcr-controller;
428c2ecf20Sopenharmony_ci			dcr-access-method = "native";
438c2ecf20Sopenharmony_ci		};
448c2ecf20Sopenharmony_ci	};
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci	memory {
478c2ecf20Sopenharmony_ci		device_type = "memory";
488c2ecf20Sopenharmony_ci		reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
498c2ecf20Sopenharmony_ci	};
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_ci	UIC0: interrupt-controller {
528c2ecf20Sopenharmony_ci		compatible = "ibm,uic-405ex", "ibm,uic";
538c2ecf20Sopenharmony_ci		interrupt-controller;
548c2ecf20Sopenharmony_ci		cell-index = <0>;
558c2ecf20Sopenharmony_ci		dcr-reg = <0x0c0 0x009>;
568c2ecf20Sopenharmony_ci		#address-cells = <0>;
578c2ecf20Sopenharmony_ci		#size-cells = <0>;
588c2ecf20Sopenharmony_ci		#interrupt-cells = <2>;
598c2ecf20Sopenharmony_ci	};
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_ci	UIC1: interrupt-controller1 {
628c2ecf20Sopenharmony_ci		compatible = "ibm,uic-405ex","ibm,uic";
638c2ecf20Sopenharmony_ci		interrupt-controller;
648c2ecf20Sopenharmony_ci		cell-index = <1>;
658c2ecf20Sopenharmony_ci		dcr-reg = <0x0d0 0x009>;
668c2ecf20Sopenharmony_ci		#address-cells = <0>;
678c2ecf20Sopenharmony_ci		#size-cells = <0>;
688c2ecf20Sopenharmony_ci		#interrupt-cells = <2>;
698c2ecf20Sopenharmony_ci		interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
708c2ecf20Sopenharmony_ci		interrupt-parent = <&UIC0>;
718c2ecf20Sopenharmony_ci	};
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci	UIC2: interrupt-controller2 {
748c2ecf20Sopenharmony_ci		compatible = "ibm,uic-405ex","ibm,uic";
758c2ecf20Sopenharmony_ci		interrupt-controller;
768c2ecf20Sopenharmony_ci		cell-index = <2>;
778c2ecf20Sopenharmony_ci		dcr-reg = <0x0e0 0x009>;
788c2ecf20Sopenharmony_ci		#address-cells = <0>;
798c2ecf20Sopenharmony_ci		#size-cells = <0>;
808c2ecf20Sopenharmony_ci		#interrupt-cells = <2>;
818c2ecf20Sopenharmony_ci		interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
828c2ecf20Sopenharmony_ci		interrupt-parent = <&UIC0>;
838c2ecf20Sopenharmony_ci	};
848c2ecf20Sopenharmony_ci
858c2ecf20Sopenharmony_ci	plb {
868c2ecf20Sopenharmony_ci		compatible = "ibm,plb-405ex", "ibm,plb4";
878c2ecf20Sopenharmony_ci		#address-cells = <1>;
888c2ecf20Sopenharmony_ci		#size-cells = <1>;
898c2ecf20Sopenharmony_ci		ranges;
908c2ecf20Sopenharmony_ci		clock-frequency = <0>; /* Filled in by U-Boot */
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_ci		SDRAM0: memory-controller {
938c2ecf20Sopenharmony_ci			compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
948c2ecf20Sopenharmony_ci			dcr-reg = <0x010 0x002>;
958c2ecf20Sopenharmony_ci			interrupt-parent = <&UIC2>;
968c2ecf20Sopenharmony_ci			interrupts = <0x5 0x4 /* ECC DED Error */
978c2ecf20Sopenharmony_ci			              0x6 0x4 /* ECC SEC Error */ >;
988c2ecf20Sopenharmony_ci		};
998c2ecf20Sopenharmony_ci
1008c2ecf20Sopenharmony_ci		MAL0: mcmal {
1018c2ecf20Sopenharmony_ci			compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
1028c2ecf20Sopenharmony_ci			dcr-reg = <0x180 0x062>;
1038c2ecf20Sopenharmony_ci			num-tx-chans = <2>;
1048c2ecf20Sopenharmony_ci			num-rx-chans = <2>;
1058c2ecf20Sopenharmony_ci			interrupt-parent = <&MAL0>;
1068c2ecf20Sopenharmony_ci			interrupts = <0x0 0x1 0x2 0x3 0x4>;
1078c2ecf20Sopenharmony_ci			#interrupt-cells = <1>;
1088c2ecf20Sopenharmony_ci			#address-cells = <0>;
1098c2ecf20Sopenharmony_ci			#size-cells = <0>;
1108c2ecf20Sopenharmony_ci			interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
1118c2ecf20Sopenharmony_ci					/*RXEOB*/ 0x1 &UIC0 0xb 0x4
1128c2ecf20Sopenharmony_ci					/*SERR*/  0x2 &UIC1 0x0 0x4
1138c2ecf20Sopenharmony_ci					/*TXDE*/  0x3 &UIC1 0x1 0x4
1148c2ecf20Sopenharmony_ci					/*RXDE*/  0x4 &UIC1 0x2 0x4>;
1158c2ecf20Sopenharmony_ci			interrupt-map-mask = <0xffffffff>;
1168c2ecf20Sopenharmony_ci		};
1178c2ecf20Sopenharmony_ci
1188c2ecf20Sopenharmony_ci		POB0: opb {
1198c2ecf20Sopenharmony_ci			compatible = "ibm,opb-405ex", "ibm,opb";
1208c2ecf20Sopenharmony_ci			#address-cells = <1>;
1218c2ecf20Sopenharmony_ci			#size-cells = <1>;
1228c2ecf20Sopenharmony_ci			ranges = <0x80000000 0x80000000 0x10000000
1238c2ecf20Sopenharmony_ci				  0xef600000 0xef600000 0x00a00000
1248c2ecf20Sopenharmony_ci				  0xf0000000 0xf0000000 0x10000000>;
1258c2ecf20Sopenharmony_ci			dcr-reg = <0x0a0 0x005>;
1268c2ecf20Sopenharmony_ci			clock-frequency = <0>; /* Filled in by U-Boot */
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_ci			EBC0: ebc {
1298c2ecf20Sopenharmony_ci				compatible = "ibm,ebc-405ex", "ibm,ebc";
1308c2ecf20Sopenharmony_ci				dcr-reg = <0x012 0x002>;
1318c2ecf20Sopenharmony_ci				#address-cells = <2>;
1328c2ecf20Sopenharmony_ci				#size-cells = <1>;
1338c2ecf20Sopenharmony_ci				clock-frequency = <0>; /* Filled in by U-Boot */
1348c2ecf20Sopenharmony_ci				/* ranges property is supplied by U-Boot */
1358c2ecf20Sopenharmony_ci				interrupts = <0x5 0x1>;
1368c2ecf20Sopenharmony_ci				interrupt-parent = <&UIC1>;
1378c2ecf20Sopenharmony_ci
1388c2ecf20Sopenharmony_ci				nor_flash@0,0 {
1398c2ecf20Sopenharmony_ci					compatible = "amd,s29gl512n", "cfi-flash";
1408c2ecf20Sopenharmony_ci					bank-width = <2>;
1418c2ecf20Sopenharmony_ci					reg = <0x00000000 0x00000000 0x04000000>;
1428c2ecf20Sopenharmony_ci					#address-cells = <1>;
1438c2ecf20Sopenharmony_ci					#size-cells = <1>;
1448c2ecf20Sopenharmony_ci					partition@0 {
1458c2ecf20Sopenharmony_ci						label = "kernel";
1468c2ecf20Sopenharmony_ci						reg = <0x00000000 0x00200000>;
1478c2ecf20Sopenharmony_ci					};
1488c2ecf20Sopenharmony_ci					partition@200000 {
1498c2ecf20Sopenharmony_ci						label = "root";
1508c2ecf20Sopenharmony_ci						reg = <0x00200000 0x00200000>;
1518c2ecf20Sopenharmony_ci					};
1528c2ecf20Sopenharmony_ci					partition@400000 {
1538c2ecf20Sopenharmony_ci						label = "user";
1548c2ecf20Sopenharmony_ci						reg = <0x00400000 0x03b60000>;
1558c2ecf20Sopenharmony_ci					};
1568c2ecf20Sopenharmony_ci					partition@3f60000 {
1578c2ecf20Sopenharmony_ci						label = "env";
1588c2ecf20Sopenharmony_ci						reg = <0x03f60000 0x00040000>;
1598c2ecf20Sopenharmony_ci					};
1608c2ecf20Sopenharmony_ci					partition@3fa0000 {
1618c2ecf20Sopenharmony_ci						label = "u-boot";
1628c2ecf20Sopenharmony_ci						reg = <0x03fa0000 0x00060000>;
1638c2ecf20Sopenharmony_ci					};
1648c2ecf20Sopenharmony_ci				};
1658c2ecf20Sopenharmony_ci			};
1668c2ecf20Sopenharmony_ci
1678c2ecf20Sopenharmony_ci			UART0: serial@ef600200 {
1688c2ecf20Sopenharmony_ci				device_type = "serial";
1698c2ecf20Sopenharmony_ci				compatible = "ns16550";
1708c2ecf20Sopenharmony_ci				reg = <0xef600200 0x00000008>;
1718c2ecf20Sopenharmony_ci				virtual-reg = <0xef600200>;
1728c2ecf20Sopenharmony_ci				clock-frequency = <0>; /* Filled in by U-Boot */
1738c2ecf20Sopenharmony_ci				current-speed = <0>;
1748c2ecf20Sopenharmony_ci				interrupt-parent = <&UIC0>;
1758c2ecf20Sopenharmony_ci				interrupts = <0x1a 0x4>;
1768c2ecf20Sopenharmony_ci			};
1778c2ecf20Sopenharmony_ci
1788c2ecf20Sopenharmony_ci			UART1: serial@ef600300 {
1798c2ecf20Sopenharmony_ci				device_type = "serial";
1808c2ecf20Sopenharmony_ci				compatible = "ns16550";
1818c2ecf20Sopenharmony_ci				reg = <0xef600300 0x00000008>;
1828c2ecf20Sopenharmony_ci				virtual-reg = <0xef600300>;
1838c2ecf20Sopenharmony_ci				clock-frequency = <0>; /* Filled in by U-Boot */
1848c2ecf20Sopenharmony_ci				current-speed = <0>;
1858c2ecf20Sopenharmony_ci				interrupt-parent = <&UIC0>;
1868c2ecf20Sopenharmony_ci				interrupts = <0x1 0x4>;
1878c2ecf20Sopenharmony_ci			};
1888c2ecf20Sopenharmony_ci
1898c2ecf20Sopenharmony_ci			IIC0: i2c@ef600400 {
1908c2ecf20Sopenharmony_ci				compatible = "ibm,iic-405ex", "ibm,iic";
1918c2ecf20Sopenharmony_ci				reg = <0xef600400 0x00000014>;
1928c2ecf20Sopenharmony_ci				interrupt-parent = <&UIC0>;
1938c2ecf20Sopenharmony_ci				interrupts = <0x2 0x4>;
1948c2ecf20Sopenharmony_ci			};
1958c2ecf20Sopenharmony_ci
1968c2ecf20Sopenharmony_ci			IIC1: i2c@ef600500 {
1978c2ecf20Sopenharmony_ci				compatible = "ibm,iic-405ex", "ibm,iic";
1988c2ecf20Sopenharmony_ci				reg = <0xef600500 0x00000014>;
1998c2ecf20Sopenharmony_ci				interrupt-parent = <&UIC0>;
2008c2ecf20Sopenharmony_ci				interrupts = <0x7 0x4>;
2018c2ecf20Sopenharmony_ci			};
2028c2ecf20Sopenharmony_ci
2038c2ecf20Sopenharmony_ci
2048c2ecf20Sopenharmony_ci			RGMII0: emac-rgmii@ef600b00 {
2058c2ecf20Sopenharmony_ci				compatible = "ibm,rgmii-405ex", "ibm,rgmii";
2068c2ecf20Sopenharmony_ci				reg = <0xef600b00 0x00000104>;
2078c2ecf20Sopenharmony_ci				has-mdio;
2088c2ecf20Sopenharmony_ci			};
2098c2ecf20Sopenharmony_ci
2108c2ecf20Sopenharmony_ci			EMAC0: ethernet@ef600900 {
2118c2ecf20Sopenharmony_ci				linux,network-index = <0x0>;
2128c2ecf20Sopenharmony_ci				device_type = "network";
2138c2ecf20Sopenharmony_ci				compatible = "ibm,emac-405ex", "ibm,emac4sync";
2148c2ecf20Sopenharmony_ci				interrupt-parent = <&EMAC0>;
2158c2ecf20Sopenharmony_ci				interrupts = <0x0 0x1>;
2168c2ecf20Sopenharmony_ci				#interrupt-cells = <1>;
2178c2ecf20Sopenharmony_ci				#address-cells = <0>;
2188c2ecf20Sopenharmony_ci				#size-cells = <0>;
2198c2ecf20Sopenharmony_ci				interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
2208c2ecf20Sopenharmony_ci						/*Wake*/  0x1 &UIC1 0x1d 0x4>;
2218c2ecf20Sopenharmony_ci				reg = <0xef600900 0x000000c4>;
2228c2ecf20Sopenharmony_ci				local-mac-address = [000000000000]; /* Filled in by U-Boot */
2238c2ecf20Sopenharmony_ci				mal-device = <&MAL0>;
2248c2ecf20Sopenharmony_ci				mal-tx-channel = <0>;
2258c2ecf20Sopenharmony_ci				mal-rx-channel = <0>;
2268c2ecf20Sopenharmony_ci				cell-index = <0>;
2278c2ecf20Sopenharmony_ci				max-frame-size = <9000>;
2288c2ecf20Sopenharmony_ci				rx-fifo-size = <4096>;
2298c2ecf20Sopenharmony_ci				tx-fifo-size = <2048>;
2308c2ecf20Sopenharmony_ci				rx-fifo-size-gige = <16384>;
2318c2ecf20Sopenharmony_ci				tx-fifo-size-gige = <16384>;
2328c2ecf20Sopenharmony_ci				phy-mode = "rgmii";
2338c2ecf20Sopenharmony_ci				phy-map = <0x0000003f>;	/* Start at 6 */
2348c2ecf20Sopenharmony_ci				rgmii-device = <&RGMII0>;
2358c2ecf20Sopenharmony_ci				rgmii-channel = <0>;
2368c2ecf20Sopenharmony_ci				has-inverted-stacr-oc;
2378c2ecf20Sopenharmony_ci				has-new-stacr-staopc;
2388c2ecf20Sopenharmony_ci			};
2398c2ecf20Sopenharmony_ci
2408c2ecf20Sopenharmony_ci			EMAC1: ethernet@ef600a00 {
2418c2ecf20Sopenharmony_ci				linux,network-index = <0x1>;
2428c2ecf20Sopenharmony_ci				device_type = "network";
2438c2ecf20Sopenharmony_ci				compatible = "ibm,emac-405ex", "ibm,emac4sync";
2448c2ecf20Sopenharmony_ci				interrupt-parent = <&EMAC1>;
2458c2ecf20Sopenharmony_ci				interrupts = <0x0 0x1>;
2468c2ecf20Sopenharmony_ci				#interrupt-cells = <1>;
2478c2ecf20Sopenharmony_ci				#address-cells = <0>;
2488c2ecf20Sopenharmony_ci				#size-cells = <0>;
2498c2ecf20Sopenharmony_ci				interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
2508c2ecf20Sopenharmony_ci						/*Wake*/  0x1 &UIC1 0x1f 0x4>;
2518c2ecf20Sopenharmony_ci				reg = <0xef600a00 0x000000c4>;
2528c2ecf20Sopenharmony_ci				local-mac-address = [000000000000]; /* Filled in by U-Boot */
2538c2ecf20Sopenharmony_ci				mal-device = <&MAL0>;
2548c2ecf20Sopenharmony_ci				mal-tx-channel = <1>;
2558c2ecf20Sopenharmony_ci				mal-rx-channel = <1>;
2568c2ecf20Sopenharmony_ci				cell-index = <1>;
2578c2ecf20Sopenharmony_ci				max-frame-size = <9000>;
2588c2ecf20Sopenharmony_ci				rx-fifo-size = <4096>;
2598c2ecf20Sopenharmony_ci				tx-fifo-size = <2048>;
2608c2ecf20Sopenharmony_ci                                rx-fifo-size-gige = <16384>;
2618c2ecf20Sopenharmony_ci                                tx-fifo-size-gige = <16384>;
2628c2ecf20Sopenharmony_ci				phy-mode = "rgmii";
2638c2ecf20Sopenharmony_ci				phy-map = <0x00000000>;
2648c2ecf20Sopenharmony_ci				rgmii-device = <&RGMII0>;
2658c2ecf20Sopenharmony_ci				rgmii-channel = <1>;
2668c2ecf20Sopenharmony_ci				has-inverted-stacr-oc;
2678c2ecf20Sopenharmony_ci				has-new-stacr-staopc;
2688c2ecf20Sopenharmony_ci			};
2698c2ecf20Sopenharmony_ci		};
2708c2ecf20Sopenharmony_ci
2718c2ecf20Sopenharmony_ci		PCIE0: pcie@a0000000 {
2728c2ecf20Sopenharmony_ci			device_type = "pci";
2738c2ecf20Sopenharmony_ci			#interrupt-cells = <1>;
2748c2ecf20Sopenharmony_ci			#size-cells = <2>;
2758c2ecf20Sopenharmony_ci			#address-cells = <3>;
2768c2ecf20Sopenharmony_ci			compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
2778c2ecf20Sopenharmony_ci			primary;
2788c2ecf20Sopenharmony_ci			port = <0x0>; /* port number */
2798c2ecf20Sopenharmony_ci			reg = <0xa0000000 0x20000000	/* Config space access */
2808c2ecf20Sopenharmony_ci			       0xef000000 0x00001000>;	/* Registers */
2818c2ecf20Sopenharmony_ci			dcr-reg = <0x040 0x020>;
2828c2ecf20Sopenharmony_ci			sdr-base = <0x400>;
2838c2ecf20Sopenharmony_ci
2848c2ecf20Sopenharmony_ci			/* Outbound ranges, one memory and one IO,
2858c2ecf20Sopenharmony_ci			 * later cannot be changed
2868c2ecf20Sopenharmony_ci			 */
2878c2ecf20Sopenharmony_ci			ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
2888c2ecf20Sopenharmony_ci				  0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
2898c2ecf20Sopenharmony_ci
2908c2ecf20Sopenharmony_ci			/* Inbound 2GB range starting at 0 */
2918c2ecf20Sopenharmony_ci			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
2928c2ecf20Sopenharmony_ci
2938c2ecf20Sopenharmony_ci			/* This drives busses 0x00 to 0x3f */
2948c2ecf20Sopenharmony_ci			bus-range = <0x0 0x3f>;
2958c2ecf20Sopenharmony_ci
2968c2ecf20Sopenharmony_ci			/* Legacy interrupts (note the weird polarity, the bridge seems
2978c2ecf20Sopenharmony_ci			 * to invert PCIe legacy interrupts).
2988c2ecf20Sopenharmony_ci			 * We are de-swizzling here because the numbers are actually for
2998c2ecf20Sopenharmony_ci			 * port of the root complex virtual P2P bridge. But I want
3008c2ecf20Sopenharmony_ci			 * to avoid putting a node for it in the tree, so the numbers
3018c2ecf20Sopenharmony_ci			 * below are basically de-swizzled numbers.
3028c2ecf20Sopenharmony_ci			 * The real slot is on idsel 0, so the swizzling is 1:1
3038c2ecf20Sopenharmony_ci			 */
3048c2ecf20Sopenharmony_ci			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
3058c2ecf20Sopenharmony_ci			interrupt-map = <
3068c2ecf20Sopenharmony_ci				0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
3078c2ecf20Sopenharmony_ci				0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
3088c2ecf20Sopenharmony_ci				0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
3098c2ecf20Sopenharmony_ci				0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
3108c2ecf20Sopenharmony_ci		};
3118c2ecf20Sopenharmony_ci
3128c2ecf20Sopenharmony_ci		PCIE1: pcie@c0000000 {
3138c2ecf20Sopenharmony_ci			device_type = "pci";
3148c2ecf20Sopenharmony_ci			#interrupt-cells = <1>;
3158c2ecf20Sopenharmony_ci			#size-cells = <2>;
3168c2ecf20Sopenharmony_ci			#address-cells = <3>;
3178c2ecf20Sopenharmony_ci			compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
3188c2ecf20Sopenharmony_ci			primary;
3198c2ecf20Sopenharmony_ci			port = <0x1>; /* port number */
3208c2ecf20Sopenharmony_ci			reg = <0xc0000000 0x20000000	/* Config space access */
3218c2ecf20Sopenharmony_ci			       0xef001000 0x00001000>;	/* Registers */
3228c2ecf20Sopenharmony_ci			dcr-reg = <0x060 0x020>;
3238c2ecf20Sopenharmony_ci			sdr-base = <0x440>;
3248c2ecf20Sopenharmony_ci
3258c2ecf20Sopenharmony_ci			/* Outbound ranges, one memory and one IO,
3268c2ecf20Sopenharmony_ci			 * later cannot be changed
3278c2ecf20Sopenharmony_ci			 */
3288c2ecf20Sopenharmony_ci			ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
3298c2ecf20Sopenharmony_ci				  0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
3308c2ecf20Sopenharmony_ci
3318c2ecf20Sopenharmony_ci			/* Inbound 2GB range starting at 0 */
3328c2ecf20Sopenharmony_ci			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
3338c2ecf20Sopenharmony_ci
3348c2ecf20Sopenharmony_ci			/* This drives busses 0x40 to 0x7f */
3358c2ecf20Sopenharmony_ci			bus-range = <0x40 0x7f>;
3368c2ecf20Sopenharmony_ci
3378c2ecf20Sopenharmony_ci			/* Legacy interrupts (note the weird polarity, the bridge seems
3388c2ecf20Sopenharmony_ci			 * to invert PCIe legacy interrupts).
3398c2ecf20Sopenharmony_ci			 * We are de-swizzling here because the numbers are actually for
3408c2ecf20Sopenharmony_ci			 * port of the root complex virtual P2P bridge. But I want
3418c2ecf20Sopenharmony_ci			 * to avoid putting a node for it in the tree, so the numbers
3428c2ecf20Sopenharmony_ci			 * below are basically de-swizzled numbers.
3438c2ecf20Sopenharmony_ci			 * The real slot is on idsel 0, so the swizzling is 1:1
3448c2ecf20Sopenharmony_ci			 */
3458c2ecf20Sopenharmony_ci			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
3468c2ecf20Sopenharmony_ci			interrupt-map = <
3478c2ecf20Sopenharmony_ci				0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
3488c2ecf20Sopenharmony_ci				0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
3498c2ecf20Sopenharmony_ci				0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
3508c2ecf20Sopenharmony_ci				0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
3518c2ecf20Sopenharmony_ci		};
3528c2ecf20Sopenharmony_ci	};
3538c2ecf20Sopenharmony_ci};
354