18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * Device Tree Source for IBM Embedded PPC 476 Platform 38c2ecf20Sopenharmony_ci * 48c2ecf20Sopenharmony_ci * Copyright 2010 Torez Smith, IBM Corporation. 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * Based on earlier code: 78c2ecf20Sopenharmony_ci * Copyright (c) 2006, 2007 IBM Corp. 88c2ecf20Sopenharmony_ci * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com> 98c2ecf20Sopenharmony_ci * 108c2ecf20Sopenharmony_ci * This file is licensed under the terms of the GNU General Public 118c2ecf20Sopenharmony_ci * License version 2. This program is licensed "as is" without 128c2ecf20Sopenharmony_ci * any warranty of any kind, whether express or implied. 138c2ecf20Sopenharmony_ci */ 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci/dts-v1/; 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci/ { 188c2ecf20Sopenharmony_ci #address-cells = <2>; 198c2ecf20Sopenharmony_ci #size-cells = <1>; 208c2ecf20Sopenharmony_ci model = "ibm,iss-4xx"; 218c2ecf20Sopenharmony_ci compatible = "ibm,iss-4xx"; 228c2ecf20Sopenharmony_ci dcr-parent = <&{/cpus/cpu@0}>; 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci aliases { 258c2ecf20Sopenharmony_ci serial0 = &UART0; 268c2ecf20Sopenharmony_ci }; 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci cpus { 298c2ecf20Sopenharmony_ci #address-cells = <1>; 308c2ecf20Sopenharmony_ci #size-cells = <0>; 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci cpu@0 { 338c2ecf20Sopenharmony_ci device_type = "cpu"; 348c2ecf20Sopenharmony_ci model = "PowerPC,4xx"; // real CPU changed in sim 358c2ecf20Sopenharmony_ci reg = <0x00000000>; 368c2ecf20Sopenharmony_ci clock-frequency = <100000000>; // 100Mhz :-) 378c2ecf20Sopenharmony_ci timebase-frequency = <100000000>; 388c2ecf20Sopenharmony_ci i-cache-line-size = <32>; // may need fixup in sim 398c2ecf20Sopenharmony_ci d-cache-line-size = <32>; // may need fixup in sim 408c2ecf20Sopenharmony_ci i-cache-size = <32768>; /* may need fixup in sim */ 418c2ecf20Sopenharmony_ci d-cache-size = <32768>; /* may need fixup in sim */ 428c2ecf20Sopenharmony_ci dcr-controller; 438c2ecf20Sopenharmony_ci dcr-access-method = "native"; 448c2ecf20Sopenharmony_ci }; 458c2ecf20Sopenharmony_ci }; 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci memory { 488c2ecf20Sopenharmony_ci device_type = "memory"; 498c2ecf20Sopenharmony_ci reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage 508c2ecf20Sopenharmony_ci }; 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci UIC0: interrupt-controller0 { 538c2ecf20Sopenharmony_ci compatible = "ibm,uic-4xx", "ibm,uic"; 548c2ecf20Sopenharmony_ci interrupt-controller; 558c2ecf20Sopenharmony_ci cell-index = <0>; 568c2ecf20Sopenharmony_ci dcr-reg = <0x0c0 0x009>; 578c2ecf20Sopenharmony_ci #address-cells = <0>; 588c2ecf20Sopenharmony_ci #size-cells = <0>; 598c2ecf20Sopenharmony_ci #interrupt-cells = <2>; 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ci }; 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci UIC1: interrupt-controller1 { 648c2ecf20Sopenharmony_ci compatible = "ibm,uic-4xx", "ibm,uic"; 658c2ecf20Sopenharmony_ci interrupt-controller; 668c2ecf20Sopenharmony_ci cell-index = <1>; 678c2ecf20Sopenharmony_ci dcr-reg = <0x0d0 0x009>; 688c2ecf20Sopenharmony_ci #address-cells = <0>; 698c2ecf20Sopenharmony_ci #size-cells = <0>; 708c2ecf20Sopenharmony_ci #interrupt-cells = <2>; 718c2ecf20Sopenharmony_ci interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 728c2ecf20Sopenharmony_ci interrupt-parent = <&UIC0>; 738c2ecf20Sopenharmony_ci }; 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ci plb { 768c2ecf20Sopenharmony_ci compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */ 778c2ecf20Sopenharmony_ci #address-cells = <2>; 788c2ecf20Sopenharmony_ci #size-cells = <1>; 798c2ecf20Sopenharmony_ci ranges; 808c2ecf20Sopenharmony_ci clock-frequency = <0>; // Filled in by zImage 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ci POB0: opb { 838c2ecf20Sopenharmony_ci compatible = "ibm,opb-4xx", "ibm,opb"; 848c2ecf20Sopenharmony_ci #address-cells = <1>; 858c2ecf20Sopenharmony_ci #size-cells = <1>; 868c2ecf20Sopenharmony_ci /* Wish there was a nicer way of specifying a full 32-bit 878c2ecf20Sopenharmony_ci range */ 888c2ecf20Sopenharmony_ci ranges = <0x00000000 0x00000001 0x00000000 0x80000000 898c2ecf20Sopenharmony_ci 0x80000000 0x00000001 0x80000000 0x80000000>; 908c2ecf20Sopenharmony_ci clock-frequency = <0>; // Filled in by zImage 918c2ecf20Sopenharmony_ci UART0: serial@40000200 { 928c2ecf20Sopenharmony_ci device_type = "serial"; 938c2ecf20Sopenharmony_ci compatible = "ns16550a"; 948c2ecf20Sopenharmony_ci reg = <0x40000200 0x00000008>; 958c2ecf20Sopenharmony_ci virtual-reg = <0xe0000200>; 968c2ecf20Sopenharmony_ci clock-frequency = <11059200>; 978c2ecf20Sopenharmony_ci current-speed = <115200>; 988c2ecf20Sopenharmony_ci interrupt-parent = <&UIC0>; 998c2ecf20Sopenharmony_ci interrupts = <0x0 0x4>; 1008c2ecf20Sopenharmony_ci }; 1018c2ecf20Sopenharmony_ci }; 1028c2ecf20Sopenharmony_ci }; 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci nvrtc { 1058c2ecf20Sopenharmony_ci compatible = "ds1743-nvram", "ds1743", "rtc-ds1743"; 1068c2ecf20Sopenharmony_ci reg = <0 0xEF703000 0x2000>; 1078c2ecf20Sopenharmony_ci }; 1088c2ecf20Sopenharmony_ci iss-block { 1098c2ecf20Sopenharmony_ci compatible = "ibm,iss-sim-block-device"; 1108c2ecf20Sopenharmony_ci reg = <0 0xEF701000 0x1000>; 1118c2ecf20Sopenharmony_ci }; 1128c2ecf20Sopenharmony_ci 1138c2ecf20Sopenharmony_ci chosen { 1148c2ecf20Sopenharmony_ci stdout-path = "/plb/opb/serial@40000200"; 1158c2ecf20Sopenharmony_ci }; 1168c2ecf20Sopenharmony_ci}; 117