18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * MPC8548 CDS Device Tree Source (32-bit address map) 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright 2006, 2008, 2011-2012 Freescale Semiconductor Inc. 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci/include/ "mpc8548si-pre.dtsi" 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci/ { 118c2ecf20Sopenharmony_ci model = "MPC8548CDS"; 128c2ecf20Sopenharmony_ci compatible = "MPC8548CDS", "MPC85xxCDS"; 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci memory { 158c2ecf20Sopenharmony_ci device_type = "memory"; 168c2ecf20Sopenharmony_ci reg = <0 0 0x0 0x8000000>; // 128M at 0x0 178c2ecf20Sopenharmony_ci }; 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci board_lbc: lbc: localbus@e0005000 { 208c2ecf20Sopenharmony_ci reg = <0 0xe0005000 0 0x1000>; 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci ranges = <0x0 0x0 0x0 0xff000000 0x01000000 238c2ecf20Sopenharmony_ci 0x1 0x0 0x0 0xf8004000 0x00001000>; 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci }; 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci board_soc: soc: soc8548@e0000000 { 288c2ecf20Sopenharmony_ci ranges = <0 0x0 0xe0000000 0x100000>; 298c2ecf20Sopenharmony_ci }; 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci board_pci0: pci0: pci@e0008000 { 328c2ecf20Sopenharmony_ci reg = <0 0xe0008000 0 0x1000>; 338c2ecf20Sopenharmony_ci ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000 348c2ecf20Sopenharmony_ci 0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>; 358c2ecf20Sopenharmony_ci clock-frequency = <66666666>; 368c2ecf20Sopenharmony_ci }; 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci pci1: pci@e0009000 { 398c2ecf20Sopenharmony_ci reg = <0 0xe0009000 0 0x1000>; 408c2ecf20Sopenharmony_ci ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000 418c2ecf20Sopenharmony_ci 0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>; 428c2ecf20Sopenharmony_ci clock-frequency = <66666666>; 438c2ecf20Sopenharmony_ci interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 448c2ecf20Sopenharmony_ci interrupt-map = < 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci /* IDSEL 0x15 */ 478c2ecf20Sopenharmony_ci 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0 488c2ecf20Sopenharmony_ci 0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0 498c2ecf20Sopenharmony_ci 0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0 508c2ecf20Sopenharmony_ci 0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>; 518c2ecf20Sopenharmony_ci }; 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci pci2: pcie@e000a000 { 548c2ecf20Sopenharmony_ci reg = <0 0xe000a000 0 0x1000>; 558c2ecf20Sopenharmony_ci ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 568c2ecf20Sopenharmony_ci 0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>; 578c2ecf20Sopenharmony_ci pcie@0 { 588c2ecf20Sopenharmony_ci ranges = <0x2000000 0x0 0xa0000000 598c2ecf20Sopenharmony_ci 0x2000000 0x0 0xa0000000 608c2ecf20Sopenharmony_ci 0x0 0x20000000 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ci 0x1000000 0x0 0x0 638c2ecf20Sopenharmony_ci 0x1000000 0x0 0x0 648c2ecf20Sopenharmony_ci 0x0 0x100000>; 658c2ecf20Sopenharmony_ci }; 668c2ecf20Sopenharmony_ci }; 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ci rio: rapidio@e00c0000 { 698c2ecf20Sopenharmony_ci reg = <0x0 0xe00c0000 0x0 0x20000>; 708c2ecf20Sopenharmony_ci port1 { 718c2ecf20Sopenharmony_ci ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>; 728c2ecf20Sopenharmony_ci }; 738c2ecf20Sopenharmony_ci }; 748c2ecf20Sopenharmony_ci}; 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci/* 778c2ecf20Sopenharmony_ci * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings 788c2ecf20Sopenharmony_ci * for interrupt-map & interrupt-map-mask. 798c2ecf20Sopenharmony_ci */ 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_ci/include/ "mpc8548si-post.dtsi" 828c2ecf20Sopenharmony_ci/include/ "mpc8548cds.dtsi" 83