18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * MPC8544 DS Device Tree Source
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright 2007, 2008 Freescale Semiconductor Inc.
68c2ecf20Sopenharmony_ci */
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci/include/ "mpc8544si-pre.dtsi"
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ci/ {
118c2ecf20Sopenharmony_ci	model = "MPC8544DS";
128c2ecf20Sopenharmony_ci	compatible = "MPC8544DS", "MPC85xxDS";
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci	memory {
158c2ecf20Sopenharmony_ci		device_type = "memory";
168c2ecf20Sopenharmony_ci		reg = <0 0 0 0>;	// Filled by U-Boot
178c2ecf20Sopenharmony_ci	};
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci	board_lbc: lbc: localbus@e0005000 {
208c2ecf20Sopenharmony_ci		reg = <0 0xe0005000 0 0x1000>;
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci		ranges = <0x0 0x0 0x0 0xff800000 0x800000>;
238c2ecf20Sopenharmony_ci	};
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ci	board_soc: soc: soc8544@e0000000 {
268c2ecf20Sopenharmony_ci		ranges = <0x0 0x0 0xe0000000 0x100000>;
278c2ecf20Sopenharmony_ci	};
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci	pci0: pci@e0008000 {
308c2ecf20Sopenharmony_ci		reg = <0 0xe0008000 0 0x1000>;
318c2ecf20Sopenharmony_ci		ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
328c2ecf20Sopenharmony_ci			  0x1000000 0x0 0x00000000 0 0xe1000000 0x0 0x10000>;
338c2ecf20Sopenharmony_ci		clock-frequency = <66666666>;
348c2ecf20Sopenharmony_ci		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
358c2ecf20Sopenharmony_ci		interrupt-map = <
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci			/* IDSEL 0x11 J17 Slot 1 */
388c2ecf20Sopenharmony_ci			0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
398c2ecf20Sopenharmony_ci			0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
408c2ecf20Sopenharmony_ci			0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
418c2ecf20Sopenharmony_ci			0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci			/* IDSEL 0x12 J16 Slot 2 */
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci			0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
468c2ecf20Sopenharmony_ci			0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
478c2ecf20Sopenharmony_ci			0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
488c2ecf20Sopenharmony_ci			0x9000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0>;
498c2ecf20Sopenharmony_ci	};
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_ci	pci1: pcie@e0009000 {
528c2ecf20Sopenharmony_ci		reg = <0x0 0xe0009000 0x0 0x1000>;
538c2ecf20Sopenharmony_ci		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
548c2ecf20Sopenharmony_ci			  0x1000000 0x0 0x00000000 0 0xe1010000 0x0 0x10000>;
558c2ecf20Sopenharmony_ci		pcie@0 {
568c2ecf20Sopenharmony_ci			ranges = <0x2000000 0x0 0x80000000
578c2ecf20Sopenharmony_ci				  0x2000000 0x0 0x80000000
588c2ecf20Sopenharmony_ci				  0x0 0x20000000
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ci				  0x1000000 0x0 0x0
618c2ecf20Sopenharmony_ci				  0x1000000 0x0 0x0
628c2ecf20Sopenharmony_ci				  0x0 0x10000>;
638c2ecf20Sopenharmony_ci		};
648c2ecf20Sopenharmony_ci	};
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_ci	pci2: pcie@e000a000 {
678c2ecf20Sopenharmony_ci		reg = <0x0 0xe000a000 0x0 0x1000>;
688c2ecf20Sopenharmony_ci		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x10000000
698c2ecf20Sopenharmony_ci			  0x1000000 0x0 0x00000000 0 0xe1020000 0x0 0x10000>;
708c2ecf20Sopenharmony_ci		pcie@0 {
718c2ecf20Sopenharmony_ci			ranges = <0x2000000 0x0 0xa0000000
728c2ecf20Sopenharmony_ci				  0x2000000 0x0 0xa0000000
738c2ecf20Sopenharmony_ci				  0x0 0x10000000
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ci				  0x1000000 0x0 0x0
768c2ecf20Sopenharmony_ci				  0x1000000 0x0 0x0
778c2ecf20Sopenharmony_ci				  0x0 0x10000>;
788c2ecf20Sopenharmony_ci		};
798c2ecf20Sopenharmony_ci	};
808c2ecf20Sopenharmony_ci
818c2ecf20Sopenharmony_ci	board_pci3: pci3: pcie@e000b000 {
828c2ecf20Sopenharmony_ci		reg = <0x0 0xe000b000 0x0 0x1000>;
838c2ecf20Sopenharmony_ci		ranges = <0x2000000 0x0 0xb0000000 0 0xb0000000 0x0 0x100000
848c2ecf20Sopenharmony_ci			  0x1000000 0x0 0x00000000 0 0xb0100000 0x0 0x100000>;
858c2ecf20Sopenharmony_ci		pcie@0 {
868c2ecf20Sopenharmony_ci			ranges = <0x2000000 0x0 0xb0000000
878c2ecf20Sopenharmony_ci				  0x2000000 0x0 0xb0000000
888c2ecf20Sopenharmony_ci				  0x0 0x100000
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci				  0x1000000 0x0 0x0
918c2ecf20Sopenharmony_ci				  0x1000000 0x0 0x0
928c2ecf20Sopenharmony_ci				  0x0 0x100000>;
938c2ecf20Sopenharmony_ci		};
948c2ecf20Sopenharmony_ci	};
958c2ecf20Sopenharmony_ci};
968c2ecf20Sopenharmony_ci
978c2ecf20Sopenharmony_ci/*
988c2ecf20Sopenharmony_ci * mpc8544ds.dtsi must be last to ensure board_pci3 overrides pci3 settings
998c2ecf20Sopenharmony_ci * for interrupt-map & interrupt-map-mask
1008c2ecf20Sopenharmony_ci */
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ci/include/ "mpc8544si-post.dtsi"
1038c2ecf20Sopenharmony_ci/include/ "mpc8544ds.dtsi"
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