18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright Intel Corporation (C) 2017. All Rights Reserved 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Reset binding definitions for Altera Arria10 MAX5 System Resource Chip 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Adapted from altr,rst-mgr-a10.h 88c2ecf20Sopenharmony_ci */ 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H 118c2ecf20Sopenharmony_ci#define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci/* Peripheral PHY resets */ 148c2ecf20Sopenharmony_ci#define A10SR_RESET_ENET_HPS 0 158c2ecf20Sopenharmony_ci#define A10SR_RESET_PCIE 1 168c2ecf20Sopenharmony_ci#define A10SR_RESET_FILE 2 178c2ecf20Sopenharmony_ci#define A10SR_RESET_BQSPI 3 188c2ecf20Sopenharmony_ci#define A10SR_RESET_USB 4 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci#define A10SR_RESET_NUM 5 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci#endif 23