18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 28c2ecf20Sopenharmony_ci// 38c2ecf20Sopenharmony_ci// Device Tree binding constants for Actions Semi S900 Reset Management Unit 48c2ecf20Sopenharmony_ci// 58c2ecf20Sopenharmony_ci// Copyright (c) 2018 Linaro Ltd. 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci#ifndef __DT_BINDINGS_ACTIONS_S900_RESET_H 88c2ecf20Sopenharmony_ci#define __DT_BINDINGS_ACTIONS_S900_RESET_H 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#define RESET_CHIPID 0 118c2ecf20Sopenharmony_ci#define RESET_CPU_SCNT 1 128c2ecf20Sopenharmony_ci#define RESET_SRAMI 2 138c2ecf20Sopenharmony_ci#define RESET_DDR_CTL_PHY 3 148c2ecf20Sopenharmony_ci#define RESET_DMAC 4 158c2ecf20Sopenharmony_ci#define RESET_GPIO 5 168c2ecf20Sopenharmony_ci#define RESET_BISP_AXI 6 178c2ecf20Sopenharmony_ci#define RESET_CSI0 7 188c2ecf20Sopenharmony_ci#define RESET_CSI1 8 198c2ecf20Sopenharmony_ci#define RESET_DE 9 208c2ecf20Sopenharmony_ci#define RESET_DSI 10 218c2ecf20Sopenharmony_ci#define RESET_GPU3D_PA 11 228c2ecf20Sopenharmony_ci#define RESET_GPU3D_PB 12 238c2ecf20Sopenharmony_ci#define RESET_HDE 13 248c2ecf20Sopenharmony_ci#define RESET_I2C0 14 258c2ecf20Sopenharmony_ci#define RESET_I2C1 15 268c2ecf20Sopenharmony_ci#define RESET_I2C2 16 278c2ecf20Sopenharmony_ci#define RESET_I2C3 17 288c2ecf20Sopenharmony_ci#define RESET_I2C4 18 298c2ecf20Sopenharmony_ci#define RESET_I2C5 19 308c2ecf20Sopenharmony_ci#define RESET_IMX 20 318c2ecf20Sopenharmony_ci#define RESET_NANDC0 21 328c2ecf20Sopenharmony_ci#define RESET_NANDC1 22 338c2ecf20Sopenharmony_ci#define RESET_SD0 23 348c2ecf20Sopenharmony_ci#define RESET_SD1 24 358c2ecf20Sopenharmony_ci#define RESET_SD2 25 368c2ecf20Sopenharmony_ci#define RESET_SD3 26 378c2ecf20Sopenharmony_ci#define RESET_SPI0 27 388c2ecf20Sopenharmony_ci#define RESET_SPI1 28 398c2ecf20Sopenharmony_ci#define RESET_SPI2 29 408c2ecf20Sopenharmony_ci#define RESET_SPI3 30 418c2ecf20Sopenharmony_ci#define RESET_UART0 31 428c2ecf20Sopenharmony_ci#define RESET_UART1 32 438c2ecf20Sopenharmony_ci#define RESET_UART2 33 448c2ecf20Sopenharmony_ci#define RESET_UART3 34 458c2ecf20Sopenharmony_ci#define RESET_UART4 35 468c2ecf20Sopenharmony_ci#define RESET_UART5 36 478c2ecf20Sopenharmony_ci#define RESET_UART6 37 488c2ecf20Sopenharmony_ci#define RESET_HDMI 38 498c2ecf20Sopenharmony_ci#define RESET_LVDS 39 508c2ecf20Sopenharmony_ci#define RESET_EDP 40 518c2ecf20Sopenharmony_ci#define RESET_USB2HUB 41 528c2ecf20Sopenharmony_ci#define RESET_USB2HSIC 42 538c2ecf20Sopenharmony_ci#define RESET_USB3 43 548c2ecf20Sopenharmony_ci#define RESET_PCM1 44 558c2ecf20Sopenharmony_ci#define RESET_AUDIO 45 568c2ecf20Sopenharmony_ci#define RESET_PCM0 46 578c2ecf20Sopenharmony_ci#define RESET_SE 47 588c2ecf20Sopenharmony_ci#define RESET_GIC 48 598c2ecf20Sopenharmony_ci#define RESET_DDR_CTL_PHY_AXI 49 608c2ecf20Sopenharmony_ci#define RESET_CMU_DDR 50 618c2ecf20Sopenharmony_ci#define RESET_DMM 51 628c2ecf20Sopenharmony_ci#define RESET_HDCP2TX 52 638c2ecf20Sopenharmony_ci#define RESET_ETHERNET 53 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_ci#endif /* __DT_BINDINGS_ACTIONS_S900_RESET_H */ 66