18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * This header provides constants for Tegra pinctrl bindings. 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Author: Laxman Dewangan <ldewangan@nvidia.com> 88c2ecf20Sopenharmony_ci */ 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#ifndef _DT_BINDINGS_PINCTRL_TEGRA_H 118c2ecf20Sopenharmony_ci#define _DT_BINDINGS_PINCTRL_TEGRA_H 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci/* 148c2ecf20Sopenharmony_ci * Enable/disable for diffeent dt properties. This is applicable for 158c2ecf20Sopenharmony_ci * properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain, 168c2ecf20Sopenharmony_ci * nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt. 178c2ecf20Sopenharmony_ci */ 188c2ecf20Sopenharmony_ci#define TEGRA_PIN_DISABLE 0 198c2ecf20Sopenharmony_ci#define TEGRA_PIN_ENABLE 1 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci#define TEGRA_PIN_PULL_NONE 0 228c2ecf20Sopenharmony_ci#define TEGRA_PIN_PULL_DOWN 1 238c2ecf20Sopenharmony_ci#define TEGRA_PIN_PULL_UP 2 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci/* Low power mode driver */ 268c2ecf20Sopenharmony_ci#define TEGRA_PIN_LP_DRIVE_DIV_8 0 278c2ecf20Sopenharmony_ci#define TEGRA_PIN_LP_DRIVE_DIV_4 1 288c2ecf20Sopenharmony_ci#define TEGRA_PIN_LP_DRIVE_DIV_2 2 298c2ecf20Sopenharmony_ci#define TEGRA_PIN_LP_DRIVE_DIV_1 3 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci/* Rising/Falling slew rate */ 328c2ecf20Sopenharmony_ci#define TEGRA_PIN_SLEW_RATE_FASTEST 0 338c2ecf20Sopenharmony_ci#define TEGRA_PIN_SLEW_RATE_FAST 1 348c2ecf20Sopenharmony_ci#define TEGRA_PIN_SLEW_RATE_SLOW 2 358c2ecf20Sopenharmony_ci#define TEGRA_PIN_SLEW_RATE_SLOWEST 3 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci#endif 38