18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * This header provides constants for OMAP pinctrl bindings. 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2009 Nokia 68c2ecf20Sopenharmony_ci * Copyright (C) 2009-2010 Texas Instruments 78c2ecf20Sopenharmony_ci */ 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci#ifndef _DT_BINDINGS_PINCTRL_OMAP_H 108c2ecf20Sopenharmony_ci#define _DT_BINDINGS_PINCTRL_OMAP_H 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci/* 34xx mux mode options for each pin. See TRM for options */ 138c2ecf20Sopenharmony_ci#define MUX_MODE0 0 148c2ecf20Sopenharmony_ci#define MUX_MODE1 1 158c2ecf20Sopenharmony_ci#define MUX_MODE2 2 168c2ecf20Sopenharmony_ci#define MUX_MODE3 3 178c2ecf20Sopenharmony_ci#define MUX_MODE4 4 188c2ecf20Sopenharmony_ci#define MUX_MODE5 5 198c2ecf20Sopenharmony_ci#define MUX_MODE6 6 208c2ecf20Sopenharmony_ci#define MUX_MODE7 7 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci/* 24xx/34xx mux bit defines */ 238c2ecf20Sopenharmony_ci#define PULL_ENA (1 << 3) 248c2ecf20Sopenharmony_ci#define PULL_UP (1 << 4) 258c2ecf20Sopenharmony_ci#define ALTELECTRICALSEL (1 << 5) 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci/* omap3/4/5 specific mux bit defines */ 288c2ecf20Sopenharmony_ci#define INPUT_EN (1 << 8) 298c2ecf20Sopenharmony_ci#define OFF_EN (1 << 9) 308c2ecf20Sopenharmony_ci#define OFFOUT_EN (1 << 10) 318c2ecf20Sopenharmony_ci#define OFFOUT_VAL (1 << 11) 328c2ecf20Sopenharmony_ci#define OFF_PULL_EN (1 << 12) 338c2ecf20Sopenharmony_ci#define OFF_PULL_UP (1 << 13) 348c2ecf20Sopenharmony_ci#define WAKEUP_EN (1 << 14) 358c2ecf20Sopenharmony_ci#define WAKEUP_EVENT (1 << 15) 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci/* Active pin states */ 388c2ecf20Sopenharmony_ci#define PIN_OUTPUT 0 398c2ecf20Sopenharmony_ci#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP) 408c2ecf20Sopenharmony_ci#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA) 418c2ecf20Sopenharmony_ci#define PIN_INPUT INPUT_EN 428c2ecf20Sopenharmony_ci#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) 438c2ecf20Sopenharmony_ci#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci/* Off mode states */ 468c2ecf20Sopenharmony_ci#define PIN_OFF_NONE 0 478c2ecf20Sopenharmony_ci#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL) 488c2ecf20Sopenharmony_ci#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN) 498c2ecf20Sopenharmony_ci#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFFOUT_EN | OFF_PULL_EN | OFF_PULL_UP) 508c2ecf20Sopenharmony_ci#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFFOUT_EN | OFF_PULL_EN) 518c2ecf20Sopenharmony_ci#define PIN_OFF_WAKEUPENABLE WAKEUP_EN 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci/* 548c2ecf20Sopenharmony_ci * Macros to allow using the absolute physical address instead of the 558c2ecf20Sopenharmony_ci * padconf registers instead of the offset from padconf base. 568c2ecf20Sopenharmony_ci */ 578c2ecf20Sopenharmony_ci#define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset)) 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci#define OMAP2420_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0030) (val) 608c2ecf20Sopenharmony_ci#define OMAP2430_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val) 618c2ecf20Sopenharmony_ci#define OMAP3_CORE1_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val) 628c2ecf20Sopenharmony_ci#define OMAP3430_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25d8) (val) 638c2ecf20Sopenharmony_ci#define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val) 648c2ecf20Sopenharmony_ci#define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val) 658c2ecf20Sopenharmony_ci#define DM814X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) 668c2ecf20Sopenharmony_ci#define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) 678c2ecf20Sopenharmony_ci#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) (0) 688c2ecf20Sopenharmony_ci#define AM33XX_PADCONF(pa, conf, mux) OMAP_IOPAD_OFFSET((pa), 0x0800) (conf) (mux) 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci/* 718c2ecf20Sopenharmony_ci * Macros to allow using the offset from the padconf physical address 728c2ecf20Sopenharmony_ci * instead of the offset from padconf base. 738c2ecf20Sopenharmony_ci */ 748c2ecf20Sopenharmony_ci#define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset)) 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci#define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) 778c2ecf20Sopenharmony_ci#define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_ci/* 808c2ecf20Sopenharmony_ci * Define some commonly used pins configured by the boards. 818c2ecf20Sopenharmony_ci * Note that some boards use alternative pins, so check 828c2ecf20Sopenharmony_ci * the schematics before using these. 838c2ecf20Sopenharmony_ci */ 848c2ecf20Sopenharmony_ci#define OMAP3_UART1_RX 0x152 858c2ecf20Sopenharmony_ci#define OMAP3_UART2_RX 0x14a 868c2ecf20Sopenharmony_ci#define OMAP3_UART3_RX 0x16e 878c2ecf20Sopenharmony_ci#define OMAP4_UART2_RX 0xdc 888c2ecf20Sopenharmony_ci#define OMAP4_UART3_RX 0x104 898c2ecf20Sopenharmony_ci#define OMAP4_UART4_RX 0x11c 908c2ecf20Sopenharmony_ci 918c2ecf20Sopenharmony_ci#endif 928c2ecf20Sopenharmony_ci 93