18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * This header provides constants for DRA pinctrl bindings.
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
68c2ecf20Sopenharmony_ci * Author: Rajendra Nayak <rnayak@ti.com>
78c2ecf20Sopenharmony_ci */
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ci#ifndef _DT_BINDINGS_PINCTRL_DRA_H
108c2ecf20Sopenharmony_ci#define _DT_BINDINGS_PINCTRL_DRA_H
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ci/* DRA7 mux mode options for each pin. See TRM for options */
138c2ecf20Sopenharmony_ci#define MUX_MODE0	0x0
148c2ecf20Sopenharmony_ci#define MUX_MODE1	0x1
158c2ecf20Sopenharmony_ci#define MUX_MODE2	0x2
168c2ecf20Sopenharmony_ci#define MUX_MODE3	0x3
178c2ecf20Sopenharmony_ci#define MUX_MODE4	0x4
188c2ecf20Sopenharmony_ci#define MUX_MODE5	0x5
198c2ecf20Sopenharmony_ci#define MUX_MODE6	0x6
208c2ecf20Sopenharmony_ci#define MUX_MODE7	0x7
218c2ecf20Sopenharmony_ci#define MUX_MODE8	0x8
228c2ecf20Sopenharmony_ci#define MUX_MODE9	0x9
238c2ecf20Sopenharmony_ci#define MUX_MODE10	0xa
248c2ecf20Sopenharmony_ci#define MUX_MODE11	0xb
258c2ecf20Sopenharmony_ci#define MUX_MODE12	0xc
268c2ecf20Sopenharmony_ci#define MUX_MODE13	0xd
278c2ecf20Sopenharmony_ci#define MUX_MODE14	0xe
288c2ecf20Sopenharmony_ci#define MUX_MODE15	0xf
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci/* Certain pins need virtual mode, but note: they may glitch */
318c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE0	(MODE_SELECT | (0x0 << 4))
328c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE1	(MODE_SELECT | (0x1 << 4))
338c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE2	(MODE_SELECT | (0x2 << 4))
348c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE3	(MODE_SELECT | (0x3 << 4))
358c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE4	(MODE_SELECT | (0x4 << 4))
368c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE5	(MODE_SELECT | (0x5 << 4))
378c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE6	(MODE_SELECT | (0x6 << 4))
388c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE7	(MODE_SELECT | (0x7 << 4))
398c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE8	(MODE_SELECT | (0x8 << 4))
408c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE9	(MODE_SELECT | (0x9 << 4))
418c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE10	(MODE_SELECT | (0xa << 4))
428c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE11	(MODE_SELECT | (0xb << 4))
438c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE12	(MODE_SELECT | (0xc << 4))
448c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE13	(MODE_SELECT | (0xd << 4))
458c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE14	(MODE_SELECT | (0xe << 4))
468c2ecf20Sopenharmony_ci#define MUX_VIRTUAL_MODE15	(MODE_SELECT | (0xf << 4))
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ci#define MODE_SELECT		(1 << 8)
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_ci#define PULL_ENA		(0 << 16)
518c2ecf20Sopenharmony_ci#define PULL_DIS		(1 << 16)
528c2ecf20Sopenharmony_ci#define PULL_UP			(1 << 17)
538c2ecf20Sopenharmony_ci#define INPUT_EN		(1 << 18)
548c2ecf20Sopenharmony_ci#define SLEWCONTROL		(1 << 19)
558c2ecf20Sopenharmony_ci#define WAKEUP_EN		(1 << 24)
568c2ecf20Sopenharmony_ci#define WAKEUP_EVENT		(1 << 25)
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_ci/* Active pin states */
598c2ecf20Sopenharmony_ci#define PIN_OUTPUT		(0 | PULL_DIS)
608c2ecf20Sopenharmony_ci#define PIN_OUTPUT_PULLUP	(PULL_UP)
618c2ecf20Sopenharmony_ci#define PIN_OUTPUT_PULLDOWN	(0)
628c2ecf20Sopenharmony_ci#define PIN_INPUT		(INPUT_EN | PULL_DIS)
638c2ecf20Sopenharmony_ci#define PIN_INPUT_SLEW		(INPUT_EN | SLEWCONTROL)
648c2ecf20Sopenharmony_ci#define PIN_INPUT_PULLUP	(PULL_ENA | INPUT_EN | PULL_UP)
658c2ecf20Sopenharmony_ci#define PIN_INPUT_PULLDOWN	(PULL_ENA | INPUT_EN)
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_ci/*
688c2ecf20Sopenharmony_ci * Macro to allow using the absolute physical address instead of the
698c2ecf20Sopenharmony_ci * padconf registers instead of the offset from padconf base.
708c2ecf20Sopenharmony_ci */
718c2ecf20Sopenharmony_ci#define DRA7XX_CORE_IOPAD(pa, val)	(((pa) & 0xffff) - 0x3400) (val)
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci/* DRA7 IODELAY configuration parameters */
748c2ecf20Sopenharmony_ci#define A_DELAY_PS(val)			((val) & 0xffff)
758c2ecf20Sopenharmony_ci#define G_DELAY_PS(val)			((val) & 0xffff)
768c2ecf20Sopenharmony_ci#endif
778c2ecf20Sopenharmony_ci
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