18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * This header provides macros for X1830 DMA bindings. 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (c) 2019 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#ifndef __DT_BINDINGS_DMA_X1830_DMA_H__ 98c2ecf20Sopenharmony_ci#define __DT_BINDINGS_DMA_X1830_DMA_H__ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci/* 128c2ecf20Sopenharmony_ci * Request type numbers for the X1830 DMA controller (written to the DRTn 138c2ecf20Sopenharmony_ci * register for the channel). 148c2ecf20Sopenharmony_ci */ 158c2ecf20Sopenharmony_ci#define X1830_DMA_I2S0_TX 0x6 168c2ecf20Sopenharmony_ci#define X1830_DMA_I2S0_RX 0x7 178c2ecf20Sopenharmony_ci#define X1830_DMA_AUTO 0x8 188c2ecf20Sopenharmony_ci#define X1830_DMA_SADC_RX 0x9 198c2ecf20Sopenharmony_ci#define X1830_DMA_UART1_TX 0x12 208c2ecf20Sopenharmony_ci#define X1830_DMA_UART1_RX 0x13 218c2ecf20Sopenharmony_ci#define X1830_DMA_UART0_TX 0x14 228c2ecf20Sopenharmony_ci#define X1830_DMA_UART0_RX 0x15 238c2ecf20Sopenharmony_ci#define X1830_DMA_SSI0_TX 0x16 248c2ecf20Sopenharmony_ci#define X1830_DMA_SSI0_RX 0x17 258c2ecf20Sopenharmony_ci#define X1830_DMA_SSI1_TX 0x18 268c2ecf20Sopenharmony_ci#define X1830_DMA_SSI1_RX 0x19 278c2ecf20Sopenharmony_ci#define X1830_DMA_MSC0_TX 0x1a 288c2ecf20Sopenharmony_ci#define X1830_DMA_MSC0_RX 0x1b 298c2ecf20Sopenharmony_ci#define X1830_DMA_MSC1_TX 0x1c 308c2ecf20Sopenharmony_ci#define X1830_DMA_MSC1_RX 0x1d 318c2ecf20Sopenharmony_ci#define X1830_DMA_DMIC_RX 0x21 328c2ecf20Sopenharmony_ci#define X1830_DMA_SMB0_TX 0x24 338c2ecf20Sopenharmony_ci#define X1830_DMA_SMB0_RX 0x25 348c2ecf20Sopenharmony_ci#define X1830_DMA_SMB1_TX 0x26 358c2ecf20Sopenharmony_ci#define X1830_DMA_SMB1_RX 0x27 368c2ecf20Sopenharmony_ci#define X1830_DMA_DES_TX 0x2e 378c2ecf20Sopenharmony_ci#define X1830_DMA_DES_RX 0x2f 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci#endif /* __DT_BINDINGS_DMA_X1830_DMA_H__ */ 40