18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Realtek RTD1295 SoC 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (c) 2016-2019 Andreas Färber 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#include "rtd129x.dtsi" 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci/ { 118c2ecf20Sopenharmony_ci compatible = "realtek,rtd1295"; 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci cpus { 148c2ecf20Sopenharmony_ci #address-cells = <2>; 158c2ecf20Sopenharmony_ci #size-cells = <0>; 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci cpu0: cpu@0 { 188c2ecf20Sopenharmony_ci device_type = "cpu"; 198c2ecf20Sopenharmony_ci compatible = "arm,cortex-a53"; 208c2ecf20Sopenharmony_ci reg = <0x0 0x0>; 218c2ecf20Sopenharmony_ci next-level-cache = <&l2>; 228c2ecf20Sopenharmony_ci }; 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci cpu1: cpu@1 { 258c2ecf20Sopenharmony_ci device_type = "cpu"; 268c2ecf20Sopenharmony_ci compatible = "arm,cortex-a53"; 278c2ecf20Sopenharmony_ci reg = <0x0 0x1>; 288c2ecf20Sopenharmony_ci next-level-cache = <&l2>; 298c2ecf20Sopenharmony_ci }; 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci cpu2: cpu@2 { 328c2ecf20Sopenharmony_ci device_type = "cpu"; 338c2ecf20Sopenharmony_ci compatible = "arm,cortex-a53"; 348c2ecf20Sopenharmony_ci reg = <0x0 0x2>; 358c2ecf20Sopenharmony_ci next-level-cache = <&l2>; 368c2ecf20Sopenharmony_ci }; 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci cpu3: cpu@3 { 398c2ecf20Sopenharmony_ci device_type = "cpu"; 408c2ecf20Sopenharmony_ci compatible = "arm,cortex-a53"; 418c2ecf20Sopenharmony_ci reg = <0x0 0x3>; 428c2ecf20Sopenharmony_ci next-level-cache = <&l2>; 438c2ecf20Sopenharmony_ci }; 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci l2: l2-cache { 468c2ecf20Sopenharmony_ci compatible = "cache"; 478c2ecf20Sopenharmony_ci }; 488c2ecf20Sopenharmony_ci }; 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci timer { 518c2ecf20Sopenharmony_ci compatible = "arm,armv8-timer"; 528c2ecf20Sopenharmony_ci interrupts = <GIC_PPI 13 538c2ecf20Sopenharmony_ci (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 548c2ecf20Sopenharmony_ci <GIC_PPI 14 558c2ecf20Sopenharmony_ci (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 568c2ecf20Sopenharmony_ci <GIC_PPI 11 578c2ecf20Sopenharmony_ci (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 588c2ecf20Sopenharmony_ci <GIC_PPI 10 598c2ecf20Sopenharmony_ci (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 608c2ecf20Sopenharmony_ci }; 618c2ecf20Sopenharmony_ci}; 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci&arm_pmu { 648c2ecf20Sopenharmony_ci interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 658c2ecf20Sopenharmony_ci}; 66