18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright (C) 2017 Marvell Technology Group Ltd. 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Device Tree file for Marvell Armada AP810. 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#include <dt-bindings/interrupt-controller/arm-gic.h> 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci/dts-v1/; 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci/ { 138c2ecf20Sopenharmony_ci model = "Marvell Armada AP810"; 148c2ecf20Sopenharmony_ci compatible = "marvell,armada-ap810"; 158c2ecf20Sopenharmony_ci #address-cells = <2>; 168c2ecf20Sopenharmony_ci #size-cells = <2>; 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci aliases { 198c2ecf20Sopenharmony_ci serial0 = &uart0_ap0; 208c2ecf20Sopenharmony_ci serial1 = &uart1_ap0; 218c2ecf20Sopenharmony_ci }; 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci psci { 248c2ecf20Sopenharmony_ci compatible = "arm,psci-0.2"; 258c2ecf20Sopenharmony_ci method = "smc"; 268c2ecf20Sopenharmony_ci }; 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci ap810-ap0 { 298c2ecf20Sopenharmony_ci #address-cells = <2>; 308c2ecf20Sopenharmony_ci #size-cells = <2>; 318c2ecf20Sopenharmony_ci compatible = "simple-bus"; 328c2ecf20Sopenharmony_ci interrupt-parent = <&gic>; 338c2ecf20Sopenharmony_ci ranges; 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci config-space@e8000000 { 368c2ecf20Sopenharmony_ci #address-cells = <1>; 378c2ecf20Sopenharmony_ci #size-cells = <1>; 388c2ecf20Sopenharmony_ci compatible = "simple-bus"; 398c2ecf20Sopenharmony_ci ranges = <0x0 0x0 0xe8000000 0x4000000>; 408c2ecf20Sopenharmony_ci interrupt-parent = <&gic>; 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci gic: interrupt-controller@3000000 { 438c2ecf20Sopenharmony_ci compatible = "arm,gic-v3"; 448c2ecf20Sopenharmony_ci #interrupt-cells = <3>; 458c2ecf20Sopenharmony_ci #address-cells = <1>; 468c2ecf20Sopenharmony_ci #size-cells = <1>; 478c2ecf20Sopenharmony_ci interrupt-controller; 488c2ecf20Sopenharmony_ci interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 498c2ecf20Sopenharmony_ci ranges; 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ci reg = <0x3000000 0x10000>, /* GICD */ 528c2ecf20Sopenharmony_ci <0x3060000 0x100000>, /* GICR */ 538c2ecf20Sopenharmony_ci <0x00c0000 0x2000>, /* GICC */ 548c2ecf20Sopenharmony_ci <0x00d0000 0x1000>, /* GICH */ 558c2ecf20Sopenharmony_ci <0x00e0000 0x2000>; /* GICV */ 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_ci gic_its_ap0: interrupt-controller@3040000 { 588c2ecf20Sopenharmony_ci compatible = "arm,gic-v3-its"; 598c2ecf20Sopenharmony_ci msi-controller; 608c2ecf20Sopenharmony_ci #msi-cells = <1>; 618c2ecf20Sopenharmony_ci reg = <0x3040000 0x20000>; 628c2ecf20Sopenharmony_ci }; 638c2ecf20Sopenharmony_ci }; 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_ci timer { 668c2ecf20Sopenharmony_ci compatible = "arm,armv8-timer"; 678c2ecf20Sopenharmony_ci interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 688c2ecf20Sopenharmony_ci <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 698c2ecf20Sopenharmony_ci <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 708c2ecf20Sopenharmony_ci <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; 718c2ecf20Sopenharmony_ci }; 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_ci xor@400000 { 748c2ecf20Sopenharmony_ci compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 758c2ecf20Sopenharmony_ci reg = <0x400000 0x1000>, 768c2ecf20Sopenharmony_ci <0x410000 0x1000>; 778c2ecf20Sopenharmony_ci msi-parent = <&gic_its_ap0 0xa0>; 788c2ecf20Sopenharmony_ci dma-coherent; 798c2ecf20Sopenharmony_ci }; 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_ci xor@420000 { 828c2ecf20Sopenharmony_ci compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 838c2ecf20Sopenharmony_ci reg = <0x420000 0x1000>, 848c2ecf20Sopenharmony_ci <0x430000 0x1000>; 858c2ecf20Sopenharmony_ci msi-parent = <&gic_its_ap0 0xa1>; 868c2ecf20Sopenharmony_ci dma-coherent; 878c2ecf20Sopenharmony_ci }; 888c2ecf20Sopenharmony_ci 898c2ecf20Sopenharmony_ci xor@440000 { 908c2ecf20Sopenharmony_ci compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 918c2ecf20Sopenharmony_ci reg = <0x440000 0x1000>, 928c2ecf20Sopenharmony_ci <0x450000 0x1000>; 938c2ecf20Sopenharmony_ci msi-parent = <&gic_its_ap0 0xa2>; 948c2ecf20Sopenharmony_ci dma-coherent; 958c2ecf20Sopenharmony_ci }; 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_ci xor@460000 { 988c2ecf20Sopenharmony_ci compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; 998c2ecf20Sopenharmony_ci reg = <0x460000 0x1000>, 1008c2ecf20Sopenharmony_ci <0x470000 0x1000>; 1018c2ecf20Sopenharmony_ci msi-parent = <&gic_its_ap0 0xa3>; 1028c2ecf20Sopenharmony_ci dma-coherent; 1038c2ecf20Sopenharmony_ci }; 1048c2ecf20Sopenharmony_ci 1058c2ecf20Sopenharmony_ci uart0_ap0: serial@512000 { 1068c2ecf20Sopenharmony_ci compatible = "snps,dw-apb-uart"; 1078c2ecf20Sopenharmony_ci reg = <0x512000 0x100>; 1088c2ecf20Sopenharmony_ci reg-shift = <2>; 1098c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 1108c2ecf20Sopenharmony_ci reg-io-width = <1>; 1118c2ecf20Sopenharmony_ci status = "disabled"; 1128c2ecf20Sopenharmony_ci }; 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_ci uart1_ap0: serial@512100 { 1158c2ecf20Sopenharmony_ci compatible = "snps,dw-apb-uart"; 1168c2ecf20Sopenharmony_ci reg = <0x512100 0x100>; 1178c2ecf20Sopenharmony_ci reg-shift = <2>; 1188c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1198c2ecf20Sopenharmony_ci reg-io-width = <1>; 1208c2ecf20Sopenharmony_ci status = "disabled"; 1218c2ecf20Sopenharmony_ci }; 1228c2ecf20Sopenharmony_ci }; 1238c2ecf20Sopenharmony_ci }; 1248c2ecf20Sopenharmony_ci}; 125