18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Samsung Exynos5433 TM2 board device tree source
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (c) 2016 Samsung Electronics Co., Ltd.
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci * Device tree source file for Samsung's TM2 board which is based on
88c2ecf20Sopenharmony_ci * Samsung Exynos5433 SoC.
98c2ecf20Sopenharmony_ci */
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#include "exynos5433-tm2-common.dtsi"
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci/ {
148c2ecf20Sopenharmony_ci	model = "Samsung TM2 board";
158c2ecf20Sopenharmony_ci	compatible = "samsung,tm2", "samsung,exynos5433";
168c2ecf20Sopenharmony_ci};
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci&cmu_disp {
198c2ecf20Sopenharmony_ci	/*
208c2ecf20Sopenharmony_ci	 * TM2 and TM2e differ only by DISP_PLL rate, but define all assigned
218c2ecf20Sopenharmony_ci	 * clocks properties for DISP CMU for each board to keep them together
228c2ecf20Sopenharmony_ci	 * for easier review and maintenance.
238c2ecf20Sopenharmony_ci	 */
248c2ecf20Sopenharmony_ci	assigned-clocks = <&cmu_disp CLK_FOUT_DISP_PLL>,
258c2ecf20Sopenharmony_ci			  <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
268c2ecf20Sopenharmony_ci			  <&cmu_disp CLK_MOUT_ACLK_DISP_333_USER>,
278c2ecf20Sopenharmony_ci			  <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
288c2ecf20Sopenharmony_ci			  <&cmu_disp CLK_MOUT_SCLK_DSIM0>,
298c2ecf20Sopenharmony_ci			  <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
308c2ecf20Sopenharmony_ci			  <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK>,
318c2ecf20Sopenharmony_ci			  <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_RXCLKESC0_USER>,
328c2ecf20Sopenharmony_ci			  <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_BITCLKDIV8_USER>,
338c2ecf20Sopenharmony_ci			  <&cmu_disp CLK_MOUT_DISP_PLL>,
348c2ecf20Sopenharmony_ci			  <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
358c2ecf20Sopenharmony_ci			  <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
368c2ecf20Sopenharmony_ci			  <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>,
378c2ecf20Sopenharmony_ci			  <&cmu_disp CLK_MOUT_SCLK_DSD_USER>;
388c2ecf20Sopenharmony_ci	assigned-clock-parents = <0>, <0>,
398c2ecf20Sopenharmony_ci				 <&cmu_mif CLK_ACLK_DISP_333>,
408c2ecf20Sopenharmony_ci				 <&cmu_mif CLK_SCLK_DSIM0_DISP>,
418c2ecf20Sopenharmony_ci				 <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
428c2ecf20Sopenharmony_ci				 <&cmu_mif CLK_SCLK_DECON_ECLK_DISP>,
438c2ecf20Sopenharmony_ci				 <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
448c2ecf20Sopenharmony_ci				 <&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY>,
458c2ecf20Sopenharmony_ci				 <&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY>,
468c2ecf20Sopenharmony_ci				 <&cmu_disp CLK_FOUT_DISP_PLL>,
478c2ecf20Sopenharmony_ci				 <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
488c2ecf20Sopenharmony_ci				 <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
498c2ecf20Sopenharmony_ci				 <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
508c2ecf20Sopenharmony_ci				 <&cmu_mif CLK_SCLK_DSD_DISP>;
518c2ecf20Sopenharmony_ci	assigned-clock-rates = <250000000>, <400000000>;
528c2ecf20Sopenharmony_ci};
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_ci&dsi {
558c2ecf20Sopenharmony_ci	panel@0 {
568c2ecf20Sopenharmony_ci		compatible = "samsung,s6e3ha2";
578c2ecf20Sopenharmony_ci		reg = <0>;
588c2ecf20Sopenharmony_ci		vdd3-supply = <&ldo27_reg>;
598c2ecf20Sopenharmony_ci		vci-supply = <&ldo28_reg>;
608c2ecf20Sopenharmony_ci		reset-gpios = <&gpg0 0 GPIO_ACTIVE_LOW>;
618c2ecf20Sopenharmony_ci		enable-gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>;
628c2ecf20Sopenharmony_ci	};
638c2ecf20Sopenharmony_ci};
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ci&hsi2c_9 {
668c2ecf20Sopenharmony_ci	status = "okay";
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ci	touchkey@20 {
698c2ecf20Sopenharmony_ci		compatible = "cypress,tm2-touchkey";
708c2ecf20Sopenharmony_ci		reg = <0x20>;
718c2ecf20Sopenharmony_ci		interrupt-parent = <&gpa3>;
728c2ecf20Sopenharmony_ci		interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
738c2ecf20Sopenharmony_ci		vcc-supply = <&ldo32_reg>;
748c2ecf20Sopenharmony_ci		vdd-supply = <&ldo33_reg>;
758c2ecf20Sopenharmony_ci	};
768c2ecf20Sopenharmony_ci};
778c2ecf20Sopenharmony_ci
788c2ecf20Sopenharmony_ci&ldo31_reg {
798c2ecf20Sopenharmony_ci	regulator-name = "TSP_VDD_1.85V_AP";
808c2ecf20Sopenharmony_ci	regulator-min-microvolt = <1850000>;
818c2ecf20Sopenharmony_ci	regulator-max-microvolt = <1850000>;
828c2ecf20Sopenharmony_ci};
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci&ldo38_reg {
858c2ecf20Sopenharmony_ci	regulator-name = "VCC_3.0V_MOTOR_AP";
868c2ecf20Sopenharmony_ci	regulator-min-microvolt = <3000000>;
878c2ecf20Sopenharmony_ci	regulator-max-microvolt = <3000000>;
888c2ecf20Sopenharmony_ci};
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci&stmfts {
918c2ecf20Sopenharmony_ci	touchscreen-size-x = <1439>;
928c2ecf20Sopenharmony_ci	touchscreen-size-y = <2559>;
938c2ecf20Sopenharmony_ci};
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