1/* SPDX-License-Identifier: GPL-2.0-or-later */
2#ifndef __SOUND_EMU8000_REG_H
3#define __SOUND_EMU8000_REG_H
4/*
5 *  Register operations for the EMU8000
6 *
7 *  Copyright (C) 1999 Steve Ratcliffe
8 *
9 *  Based on awe_wave.c by Takashi Iwai
10 */
11
12/*
13 * Data port addresses relative to the EMU base.
14 */
15#define EMU8000_DATA0(e)    ((e)->port1)
16#define EMU8000_DATA1(e)    ((e)->port2)
17#define EMU8000_DATA2(e)    ((e)->port2+2)
18#define EMU8000_DATA3(e)    ((e)->port3)
19#define EMU8000_PTR(e)      ((e)->port3+2)
20
21/*
22 * Make a command from a register and channel.
23 */
24#define EMU8000_CMD(reg, chan) ((reg)<<5 | (chan))
25
26/*
27 * Commands to read and write the EMU8000 registers.
28 * These macros should be used for all register accesses.
29 */
30#define EMU8000_CPF_READ(emu, chan) \
31	snd_emu8000_peek_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(0, (chan)))
32#define EMU8000_PTRX_READ(emu, chan) \
33	snd_emu8000_peek_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(1, (chan)))
34#define EMU8000_CVCF_READ(emu, chan) \
35	snd_emu8000_peek_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(2, (chan)))
36#define EMU8000_VTFT_READ(emu, chan) \
37	snd_emu8000_peek_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(3, (chan)))
38#define EMU8000_PSST_READ(emu, chan) \
39	snd_emu8000_peek_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(6, (chan)))
40#define EMU8000_CSL_READ(emu, chan) \
41	snd_emu8000_peek_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(7, (chan)))
42#define EMU8000_CCCA_READ(emu, chan) \
43	snd_emu8000_peek_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(0, (chan)))
44#define EMU8000_HWCF4_READ(emu) \
45	snd_emu8000_peek_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 9))
46#define EMU8000_HWCF5_READ(emu) \
47	snd_emu8000_peek_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 10))
48#define EMU8000_HWCF6_READ(emu) \
49	snd_emu8000_peek_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 13))
50#define EMU8000_SMALR_READ(emu) \
51	snd_emu8000_peek_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 20))
52#define EMU8000_SMARR_READ(emu) \
53	snd_emu8000_peek_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 21))
54#define EMU8000_SMALW_READ(emu) \
55	snd_emu8000_peek_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 22))
56#define EMU8000_SMARW_READ(emu) \
57	snd_emu8000_peek_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 23))
58#define EMU8000_SMLD_READ(emu) \
59	snd_emu8000_peek((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 26))
60#define EMU8000_SMRD_READ(emu) \
61	snd_emu8000_peek((emu), EMU8000_DATA2(emu), EMU8000_CMD(1, 26))
62#define EMU8000_WC_READ(emu) \
63	snd_emu8000_peek((emu), EMU8000_DATA2(emu), EMU8000_CMD(1, 27))
64#define EMU8000_HWCF1_READ(emu) \
65	snd_emu8000_peek((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 29))
66#define EMU8000_HWCF2_READ(emu) \
67	snd_emu8000_peek((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 30))
68#define EMU8000_HWCF3_READ(emu) \
69	snd_emu8000_peek((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 31))
70#define EMU8000_INIT1_READ(emu, chan) \
71	snd_emu8000_peek((emu), EMU8000_DATA1(emu), EMU8000_CMD(2, (chan)))
72#define EMU8000_INIT2_READ(emu, chan) \
73	snd_emu8000_peek((emu), EMU8000_DATA2(emu), EMU8000_CMD(2, (chan)))
74#define EMU8000_INIT3_READ(emu, chan) \
75	snd_emu8000_peek((emu), EMU8000_DATA1(emu), EMU8000_CMD(3, (chan)))
76#define EMU8000_INIT4_READ(emu, chan) \
77	snd_emu8000_peek((emu), EMU8000_DATA2(emu), EMU8000_CMD(3, (chan)))
78#define EMU8000_ENVVOL_READ(emu, chan) \
79	snd_emu8000_peek((emu), EMU8000_DATA1(emu), EMU8000_CMD(4, (chan)))
80#define EMU8000_DCYSUSV_READ(emu, chan) \
81	snd_emu8000_peek((emu), EMU8000_DATA1(emu), EMU8000_CMD(5, (chan)))
82#define EMU8000_ENVVAL_READ(emu, chan) \
83	snd_emu8000_peek((emu), EMU8000_DATA1(emu), EMU8000_CMD(6, (chan)))
84#define EMU8000_DCYSUS_READ(emu, chan) \
85	snd_emu8000_peek((emu), EMU8000_DATA1(emu), EMU8000_CMD(7, (chan)))
86#define EMU8000_ATKHLDV_READ(emu, chan) \
87	snd_emu8000_peek((emu), EMU8000_DATA2(emu), EMU8000_CMD(4, (chan)))
88#define EMU8000_LFO1VAL_READ(emu, chan) \
89	snd_emu8000_peek((emu), EMU8000_DATA2(emu), EMU8000_CMD(5, (chan)))
90#define EMU8000_ATKHLD_READ(emu, chan) \
91	snd_emu8000_peek((emu), EMU8000_DATA2(emu), EMU8000_CMD(6, (chan)))
92#define EMU8000_LFO2VAL_READ(emu, chan) \
93	snd_emu8000_peek((emu), EMU8000_DATA2(emu), EMU8000_CMD(7, (chan)))
94#define EMU8000_IP_READ(emu, chan) \
95	snd_emu8000_peek((emu), EMU8000_DATA3(emu), EMU8000_CMD(0, (chan)))
96#define EMU8000_IFATN_READ(emu, chan) \
97	snd_emu8000_peek((emu), EMU8000_DATA3(emu), EMU8000_CMD(1, (chan)))
98#define EMU8000_PEFE_READ(emu, chan) \
99	snd_emu8000_peek((emu), EMU8000_DATA3(emu), EMU8000_CMD(2, (chan)))
100#define EMU8000_FMMOD_READ(emu, chan) \
101	snd_emu8000_peek((emu), EMU8000_DATA3(emu), EMU8000_CMD(3, (chan)))
102#define EMU8000_TREMFRQ_READ(emu, chan) \
103	snd_emu8000_peek((emu), EMU8000_DATA3(emu), EMU8000_CMD(4, (chan)))
104#define EMU8000_FM2FRQ2_READ(emu, chan) \
105	snd_emu8000_peek((emu), EMU8000_DATA3(emu), EMU8000_CMD(5, (chan)))
106
107
108#define EMU8000_CPF_WRITE(emu, chan, val) \
109	snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(0, (chan)), (val))
110#define EMU8000_PTRX_WRITE(emu, chan, val) \
111	snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(1, (chan)), (val))
112#define EMU8000_CVCF_WRITE(emu, chan, val) \
113	snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(2, (chan)), (val))
114#define EMU8000_VTFT_WRITE(emu, chan, val) \
115	snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(3, (chan)), (val))
116#define EMU8000_PSST_WRITE(emu, chan, val) \
117	snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(6, (chan)), (val))
118#define EMU8000_CSL_WRITE(emu, chan, val) \
119	snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(7, (chan)), (val))
120#define EMU8000_CCCA_WRITE(emu, chan, val) \
121	snd_emu8000_poke_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(0, (chan)), (val))
122#define EMU8000_HWCF4_WRITE(emu, val) \
123	snd_emu8000_poke_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 9), (val))
124#define EMU8000_HWCF5_WRITE(emu, val) \
125	snd_emu8000_poke_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 10), (val))
126#define EMU8000_HWCF6_WRITE(emu, val) \
127	snd_emu8000_poke_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 13), (val))
128/* this register is not documented */
129#define EMU8000_HWCF7_WRITE(emu, val) \
130	snd_emu8000_poke_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 14), (val))
131#define EMU8000_SMALR_WRITE(emu, val) \
132	snd_emu8000_poke_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 20), (val))
133#define EMU8000_SMARR_WRITE(emu, val) \
134	snd_emu8000_poke_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 21), (val))
135#define EMU8000_SMALW_WRITE(emu, val) \
136	snd_emu8000_poke_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 22), (val))
137#define EMU8000_SMARW_WRITE(emu, val) \
138	snd_emu8000_poke_dw((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 23), (val))
139#define EMU8000_SMLD_WRITE(emu, val) \
140	snd_emu8000_poke((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 26), (val))
141#define EMU8000_SMRD_WRITE(emu, val) \
142	snd_emu8000_poke((emu), EMU8000_DATA2(emu), EMU8000_CMD(1, 26), (val))
143#define EMU8000_WC_WRITE(emu, val) \
144	snd_emu8000_poke((emu), EMU8000_DATA2(emu), EMU8000_CMD(1, 27), (val))
145#define EMU8000_HWCF1_WRITE(emu, val) \
146	snd_emu8000_poke((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 29), (val))
147#define EMU8000_HWCF2_WRITE(emu, val) \
148	snd_emu8000_poke((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 30), (val))
149#define EMU8000_HWCF3_WRITE(emu, val) \
150	snd_emu8000_poke((emu), EMU8000_DATA1(emu), EMU8000_CMD(1, 31), (val))
151#define EMU8000_INIT1_WRITE(emu, chan, val) \
152	snd_emu8000_poke((emu), EMU8000_DATA1(emu), EMU8000_CMD(2, (chan)), (val))
153#define EMU8000_INIT2_WRITE(emu, chan, val) \
154	snd_emu8000_poke((emu), EMU8000_DATA2(emu), EMU8000_CMD(2, (chan)), (val))
155#define EMU8000_INIT3_WRITE(emu, chan, val) \
156	snd_emu8000_poke((emu), EMU8000_DATA1(emu), EMU8000_CMD(3, (chan)), (val))
157#define EMU8000_INIT4_WRITE(emu, chan, val) \
158	snd_emu8000_poke((emu), EMU8000_DATA2(emu), EMU8000_CMD(3, (chan)), (val))
159#define EMU8000_ENVVOL_WRITE(emu, chan, val) \
160	snd_emu8000_poke((emu), EMU8000_DATA1(emu), EMU8000_CMD(4, (chan)), (val))
161#define EMU8000_DCYSUSV_WRITE(emu, chan, val) \
162	snd_emu8000_poke((emu), EMU8000_DATA1(emu), EMU8000_CMD(5, (chan)), (val))
163#define EMU8000_ENVVAL_WRITE(emu, chan, val) \
164	snd_emu8000_poke((emu), EMU8000_DATA1(emu), EMU8000_CMD(6, (chan)), (val))
165#define EMU8000_DCYSUS_WRITE(emu, chan, val) \
166	snd_emu8000_poke((emu), EMU8000_DATA1(emu), EMU8000_CMD(7, (chan)), (val))
167#define EMU8000_ATKHLDV_WRITE(emu, chan, val) \
168	snd_emu8000_poke((emu), EMU8000_DATA2(emu), EMU8000_CMD(4, (chan)), (val))
169#define EMU8000_LFO1VAL_WRITE(emu, chan, val) \
170	snd_emu8000_poke((emu), EMU8000_DATA2(emu), EMU8000_CMD(5, (chan)), (val))
171#define EMU8000_ATKHLD_WRITE(emu, chan, val) \
172	snd_emu8000_poke((emu), EMU8000_DATA2(emu), EMU8000_CMD(6, (chan)), (val))
173#define EMU8000_LFO2VAL_WRITE(emu, chan, val) \
174	snd_emu8000_poke((emu), EMU8000_DATA2(emu), EMU8000_CMD(7, (chan)), (val))
175#define EMU8000_IP_WRITE(emu, chan, val) \
176	snd_emu8000_poke((emu), EMU8000_DATA3(emu), EMU8000_CMD(0, (chan)), (val))
177#define EMU8000_IFATN_WRITE(emu, chan, val) \
178	snd_emu8000_poke((emu), EMU8000_DATA3(emu), EMU8000_CMD(1, (chan)), (val))
179#define EMU8000_PEFE_WRITE(emu, chan, val) \
180	snd_emu8000_poke((emu), EMU8000_DATA3(emu), EMU8000_CMD(2, (chan)), (val))
181#define EMU8000_FMMOD_WRITE(emu, chan, val) \
182	snd_emu8000_poke((emu), EMU8000_DATA3(emu), EMU8000_CMD(3, (chan)), (val))
183#define EMU8000_TREMFRQ_WRITE(emu, chan, val) \
184	snd_emu8000_poke((emu), EMU8000_DATA3(emu), EMU8000_CMD(4, (chan)), (val))
185#define EMU8000_FM2FRQ2_WRITE(emu, chan, val) \
186	snd_emu8000_poke((emu), EMU8000_DATA3(emu), EMU8000_CMD(5, (chan)), (val))
187
188#define EMU8000_0080_WRITE(emu, chan, val) \
189	snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(4, (chan)), (val))
190#define EMU8000_00A0_WRITE(emu, chan, val) \
191	snd_emu8000_poke_dw((emu), EMU8000_DATA0(emu), EMU8000_CMD(5, (chan)), (val))
192
193#endif /* __SOUND_EMU8000_REG_H */
194