18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Framework and drivers for configuring and reading different PHYs
48c2ecf20Sopenharmony_ci * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
58c2ecf20Sopenharmony_ci *
68c2ecf20Sopenharmony_ci * Author: Andy Fleming
78c2ecf20Sopenharmony_ci *
88c2ecf20Sopenharmony_ci * Copyright (c) 2004 Freescale Semiconductor, Inc.
98c2ecf20Sopenharmony_ci */
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#ifndef __PHY_H
128c2ecf20Sopenharmony_ci#define __PHY_H
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci#include <linux/compiler.h>
158c2ecf20Sopenharmony_ci#include <linux/spinlock.h>
168c2ecf20Sopenharmony_ci#include <linux/ethtool.h>
178c2ecf20Sopenharmony_ci#include <linux/linkmode.h>
188c2ecf20Sopenharmony_ci#include <linux/netlink.h>
198c2ecf20Sopenharmony_ci#include <linux/mdio.h>
208c2ecf20Sopenharmony_ci#include <linux/mii.h>
218c2ecf20Sopenharmony_ci#include <linux/mii_timestamper.h>
228c2ecf20Sopenharmony_ci#include <linux/module.h>
238c2ecf20Sopenharmony_ci#include <linux/timer.h>
248c2ecf20Sopenharmony_ci#include <linux/workqueue.h>
258c2ecf20Sopenharmony_ci#include <linux/mod_devicetable.h>
268c2ecf20Sopenharmony_ci#include <linux/u64_stats_sync.h>
278c2ecf20Sopenharmony_ci#include <linux/irqreturn.h>
288c2ecf20Sopenharmony_ci#include <linux/iopoll.h>
298c2ecf20Sopenharmony_ci#include <linux/refcount.h>
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ci#include <linux/atomic.h>
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci#define PHY_DEFAULT_FEATURES	(SUPPORTED_Autoneg | \
348c2ecf20Sopenharmony_ci				 SUPPORTED_TP | \
358c2ecf20Sopenharmony_ci				 SUPPORTED_MII)
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci#define PHY_10BT_FEATURES	(SUPPORTED_10baseT_Half | \
388c2ecf20Sopenharmony_ci				 SUPPORTED_10baseT_Full)
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ci#define PHY_100BT_FEATURES	(SUPPORTED_100baseT_Half | \
418c2ecf20Sopenharmony_ci				 SUPPORTED_100baseT_Full)
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci#define PHY_1000BT_FEATURES	(SUPPORTED_1000baseT_Half | \
448c2ecf20Sopenharmony_ci				 SUPPORTED_1000baseT_Full)
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ciextern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
478c2ecf20Sopenharmony_ciextern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
488c2ecf20Sopenharmony_ciextern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
498c2ecf20Sopenharmony_ciextern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
508c2ecf20Sopenharmony_ciextern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
518c2ecf20Sopenharmony_ciextern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
528c2ecf20Sopenharmony_ciextern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_fec_features) __ro_after_init;
538c2ecf20Sopenharmony_ciextern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ci#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
568c2ecf20Sopenharmony_ci#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
578c2ecf20Sopenharmony_ci#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
588c2ecf20Sopenharmony_ci#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
598c2ecf20Sopenharmony_ci#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
608c2ecf20Sopenharmony_ci#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
618c2ecf20Sopenharmony_ci#define PHY_10GBIT_FEC_FEATURES ((unsigned long *)&phy_10gbit_fec_features)
628c2ecf20Sopenharmony_ci#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_ciextern const int phy_basic_ports_array[3];
658c2ecf20Sopenharmony_ciextern const int phy_fibre_port_array[1];
668c2ecf20Sopenharmony_ciextern const int phy_all_ports_features_array[7];
678c2ecf20Sopenharmony_ciextern const int phy_10_100_features_array[4];
688c2ecf20Sopenharmony_ciextern const int phy_basic_t1_features_array[2];
698c2ecf20Sopenharmony_ciextern const int phy_gbit_features_array[2];
708c2ecf20Sopenharmony_ciextern const int phy_10gbit_features_array[1];
718c2ecf20Sopenharmony_ci
728c2ecf20Sopenharmony_ci/*
738c2ecf20Sopenharmony_ci * Set phydev->irq to PHY_POLL if interrupts are not supported,
748c2ecf20Sopenharmony_ci * or not desired for this PHY.  Set to PHY_IGNORE_INTERRUPT if
758c2ecf20Sopenharmony_ci * the attached driver handles the interrupt
768c2ecf20Sopenharmony_ci */
778c2ecf20Sopenharmony_ci#define PHY_POLL		-1
788c2ecf20Sopenharmony_ci#define PHY_IGNORE_INTERRUPT	-2
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_ci#define PHY_IS_INTERNAL		0x00000001
818c2ecf20Sopenharmony_ci#define PHY_RST_AFTER_CLK_EN	0x00000002
828c2ecf20Sopenharmony_ci#define PHY_POLL_CABLE_TEST	0x00000004
838c2ecf20Sopenharmony_ci#define MDIO_DEVICE_IS_PHY	0x80000000
848c2ecf20Sopenharmony_ci
858c2ecf20Sopenharmony_ci/**
868c2ecf20Sopenharmony_ci * enum phy_interface_t - Interface Mode definitions
878c2ecf20Sopenharmony_ci *
888c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
898c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_INTERNAL: No interface, MAC and PHY combined
908c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_MII: Median-independent interface
918c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_GMII: Gigabit median-independent interface
928c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
938c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_TBI: Ten Bit Interface
948c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_REVMII: Reverse Media Independent Interface
958c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_RMII: Reduced Media Independent Interface
968c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_RGMII: Reduced gigabit media-independent interface
978c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_RGMII_ID: RGMII with Internal RX+TX delay
988c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_RGMII_RXID: RGMII with Internal RX delay
998c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_RGMII_TXID: RGMII with Internal RX delay
1008c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_RTBI: Reduced TBI
1018c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_SMII: ??? MII
1028c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_XGMII: 10 gigabit media-independent interface
1038c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_XLGMII:40 gigabit media-independent interface
1048c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_MOCA: Multimedia over Coax
1058c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_QSGMII: Quad SGMII
1068c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_TRGMII: Turbo RGMII
1078c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_1000BASEX: 1000 BaseX
1088c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_2500BASEX: 2500 BaseX
1098c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_RXAUI: Reduced XAUI
1108c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_XAUI: 10 Gigabit Attachment Unit Interface
1118c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_10GBASER: 10G BaseR
1128c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_USXGMII:  Universal Serial 10GE MII
1138c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_10GKR: 10GBASE-KR - with Clause 73 AN
1148c2ecf20Sopenharmony_ci * @PHY_INTERFACE_MODE_MAX: Book keeping
1158c2ecf20Sopenharmony_ci *
1168c2ecf20Sopenharmony_ci * Describes the interface between the MAC and PHY.
1178c2ecf20Sopenharmony_ci */
1188c2ecf20Sopenharmony_citypedef enum {
1198c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_NA,
1208c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_INTERNAL,
1218c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_MII,
1228c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_GMII,
1238c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_SGMII,
1248c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_TBI,
1258c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_REVMII,
1268c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_RMII,
1278c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_RGMII,
1288c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_RGMII_ID,
1298c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_RGMII_RXID,
1308c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_RGMII_TXID,
1318c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_RTBI,
1328c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_SMII,
1338c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_XGMII,
1348c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_XLGMII,
1358c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_MOCA,
1368c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_QSGMII,
1378c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_TRGMII,
1388c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_1000BASEX,
1398c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_2500BASEX,
1408c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_RXAUI,
1418c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_XAUI,
1428c2ecf20Sopenharmony_ci	/* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
1438c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_10GBASER,
1448c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_USXGMII,
1458c2ecf20Sopenharmony_ci	/* 10GBASE-KR - with Clause 73 AN */
1468c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_10GKR,
1478c2ecf20Sopenharmony_ci	PHY_INTERFACE_MODE_MAX,
1488c2ecf20Sopenharmony_ci} phy_interface_t;
1498c2ecf20Sopenharmony_ci
1508c2ecf20Sopenharmony_ci/*
1518c2ecf20Sopenharmony_ci * phy_supported_speeds - return all speeds currently supported by a PHY device
1528c2ecf20Sopenharmony_ci */
1538c2ecf20Sopenharmony_ciunsigned int phy_supported_speeds(struct phy_device *phy,
1548c2ecf20Sopenharmony_ci				      unsigned int *speeds,
1558c2ecf20Sopenharmony_ci				      unsigned int size);
1568c2ecf20Sopenharmony_ci
1578c2ecf20Sopenharmony_ci/**
1588c2ecf20Sopenharmony_ci * phy_modes - map phy_interface_t enum to device tree binding of phy-mode
1598c2ecf20Sopenharmony_ci * @interface: enum phy_interface_t value
1608c2ecf20Sopenharmony_ci *
1618c2ecf20Sopenharmony_ci * Description: maps enum &phy_interface_t defined in this file
1628c2ecf20Sopenharmony_ci * into the device tree binding of 'phy-mode', so that Ethernet
1638c2ecf20Sopenharmony_ci * device driver can get PHY interface from device tree.
1648c2ecf20Sopenharmony_ci */
1658c2ecf20Sopenharmony_cistatic inline const char *phy_modes(phy_interface_t interface)
1668c2ecf20Sopenharmony_ci{
1678c2ecf20Sopenharmony_ci	switch (interface) {
1688c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_NA:
1698c2ecf20Sopenharmony_ci		return "";
1708c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_INTERNAL:
1718c2ecf20Sopenharmony_ci		return "internal";
1728c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_MII:
1738c2ecf20Sopenharmony_ci		return "mii";
1748c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_GMII:
1758c2ecf20Sopenharmony_ci		return "gmii";
1768c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_SGMII:
1778c2ecf20Sopenharmony_ci		return "sgmii";
1788c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_TBI:
1798c2ecf20Sopenharmony_ci		return "tbi";
1808c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_REVMII:
1818c2ecf20Sopenharmony_ci		return "rev-mii";
1828c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_RMII:
1838c2ecf20Sopenharmony_ci		return "rmii";
1848c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_RGMII:
1858c2ecf20Sopenharmony_ci		return "rgmii";
1868c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_RGMII_ID:
1878c2ecf20Sopenharmony_ci		return "rgmii-id";
1888c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_RGMII_RXID:
1898c2ecf20Sopenharmony_ci		return "rgmii-rxid";
1908c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_RGMII_TXID:
1918c2ecf20Sopenharmony_ci		return "rgmii-txid";
1928c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_RTBI:
1938c2ecf20Sopenharmony_ci		return "rtbi";
1948c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_SMII:
1958c2ecf20Sopenharmony_ci		return "smii";
1968c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_XGMII:
1978c2ecf20Sopenharmony_ci		return "xgmii";
1988c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_XLGMII:
1998c2ecf20Sopenharmony_ci		return "xlgmii";
2008c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_MOCA:
2018c2ecf20Sopenharmony_ci		return "moca";
2028c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_QSGMII:
2038c2ecf20Sopenharmony_ci		return "qsgmii";
2048c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_TRGMII:
2058c2ecf20Sopenharmony_ci		return "trgmii";
2068c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_1000BASEX:
2078c2ecf20Sopenharmony_ci		return "1000base-x";
2088c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_2500BASEX:
2098c2ecf20Sopenharmony_ci		return "2500base-x";
2108c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_RXAUI:
2118c2ecf20Sopenharmony_ci		return "rxaui";
2128c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_XAUI:
2138c2ecf20Sopenharmony_ci		return "xaui";
2148c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_10GBASER:
2158c2ecf20Sopenharmony_ci		return "10gbase-r";
2168c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_USXGMII:
2178c2ecf20Sopenharmony_ci		return "usxgmii";
2188c2ecf20Sopenharmony_ci	case PHY_INTERFACE_MODE_10GKR:
2198c2ecf20Sopenharmony_ci		return "10gbase-kr";
2208c2ecf20Sopenharmony_ci	default:
2218c2ecf20Sopenharmony_ci		return "unknown";
2228c2ecf20Sopenharmony_ci	}
2238c2ecf20Sopenharmony_ci}
2248c2ecf20Sopenharmony_ci
2258c2ecf20Sopenharmony_ci
2268c2ecf20Sopenharmony_ci#define PHY_INIT_TIMEOUT	100000
2278c2ecf20Sopenharmony_ci#define PHY_FORCE_TIMEOUT	10
2288c2ecf20Sopenharmony_ci
2298c2ecf20Sopenharmony_ci#define PHY_MAX_ADDR	32
2308c2ecf20Sopenharmony_ci
2318c2ecf20Sopenharmony_ci/* Used when trying to connect to a specific phy (mii bus id:phy device id) */
2328c2ecf20Sopenharmony_ci#define PHY_ID_FMT "%s:%02x"
2338c2ecf20Sopenharmony_ci
2348c2ecf20Sopenharmony_ci#define MII_BUS_ID_SIZE	61
2358c2ecf20Sopenharmony_ci
2368c2ecf20Sopenharmony_cistruct device;
2378c2ecf20Sopenharmony_cistruct phylink;
2388c2ecf20Sopenharmony_cistruct sfp_bus;
2398c2ecf20Sopenharmony_cistruct sfp_upstream_ops;
2408c2ecf20Sopenharmony_cistruct sk_buff;
2418c2ecf20Sopenharmony_ci
2428c2ecf20Sopenharmony_ci/**
2438c2ecf20Sopenharmony_ci * struct mdio_bus_stats - Statistics counters for MDIO busses
2448c2ecf20Sopenharmony_ci * @transfers: Total number of transfers, i.e. @writes + @reads
2458c2ecf20Sopenharmony_ci * @errors: Number of MDIO transfers that returned an error
2468c2ecf20Sopenharmony_ci * @writes: Number of write transfers
2478c2ecf20Sopenharmony_ci * @reads: Number of read transfers
2488c2ecf20Sopenharmony_ci * @syncp: Synchronisation for incrementing statistics
2498c2ecf20Sopenharmony_ci */
2508c2ecf20Sopenharmony_cistruct mdio_bus_stats {
2518c2ecf20Sopenharmony_ci	u64_stats_t transfers;
2528c2ecf20Sopenharmony_ci	u64_stats_t errors;
2538c2ecf20Sopenharmony_ci	u64_stats_t writes;
2548c2ecf20Sopenharmony_ci	u64_stats_t reads;
2558c2ecf20Sopenharmony_ci	/* Must be last, add new statistics above */
2568c2ecf20Sopenharmony_ci	struct u64_stats_sync syncp;
2578c2ecf20Sopenharmony_ci};
2588c2ecf20Sopenharmony_ci
2598c2ecf20Sopenharmony_ci/**
2608c2ecf20Sopenharmony_ci * struct phy_package_shared - Shared information in PHY packages
2618c2ecf20Sopenharmony_ci * @addr: Common PHY address used to combine PHYs in one package
2628c2ecf20Sopenharmony_ci * @refcnt: Number of PHYs connected to this shared data
2638c2ecf20Sopenharmony_ci * @flags: Initialization of PHY package
2648c2ecf20Sopenharmony_ci * @priv_size: Size of the shared private data @priv
2658c2ecf20Sopenharmony_ci * @priv: Driver private data shared across a PHY package
2668c2ecf20Sopenharmony_ci *
2678c2ecf20Sopenharmony_ci * Represents a shared structure between different phydev's in the same
2688c2ecf20Sopenharmony_ci * package, for example a quad PHY. See phy_package_join() and
2698c2ecf20Sopenharmony_ci * phy_package_leave().
2708c2ecf20Sopenharmony_ci */
2718c2ecf20Sopenharmony_cistruct phy_package_shared {
2728c2ecf20Sopenharmony_ci	int addr;
2738c2ecf20Sopenharmony_ci	refcount_t refcnt;
2748c2ecf20Sopenharmony_ci	unsigned long flags;
2758c2ecf20Sopenharmony_ci	size_t priv_size;
2768c2ecf20Sopenharmony_ci
2778c2ecf20Sopenharmony_ci	/* private data pointer */
2788c2ecf20Sopenharmony_ci	/* note that this pointer is shared between different phydevs and
2798c2ecf20Sopenharmony_ci	 * the user has to take care of appropriate locking. It is allocated
2808c2ecf20Sopenharmony_ci	 * and freed automatically by phy_package_join() and
2818c2ecf20Sopenharmony_ci	 * phy_package_leave().
2828c2ecf20Sopenharmony_ci	 */
2838c2ecf20Sopenharmony_ci	void *priv;
2848c2ecf20Sopenharmony_ci};
2858c2ecf20Sopenharmony_ci
2868c2ecf20Sopenharmony_ci/* used as bit number in atomic bitops */
2878c2ecf20Sopenharmony_ci#define PHY_SHARED_F_INIT_DONE  0
2888c2ecf20Sopenharmony_ci#define PHY_SHARED_F_PROBE_DONE 1
2898c2ecf20Sopenharmony_ci
2908c2ecf20Sopenharmony_ci/**
2918c2ecf20Sopenharmony_ci * struct mii_bus - Represents an MDIO bus
2928c2ecf20Sopenharmony_ci *
2938c2ecf20Sopenharmony_ci * @owner: Who owns this device
2948c2ecf20Sopenharmony_ci * @name: User friendly name for this MDIO device, or driver name
2958c2ecf20Sopenharmony_ci * @id: Unique identifier for this bus, typical from bus hierarchy
2968c2ecf20Sopenharmony_ci * @priv: Driver private data
2978c2ecf20Sopenharmony_ci *
2988c2ecf20Sopenharmony_ci * The Bus class for PHYs.  Devices which provide access to
2998c2ecf20Sopenharmony_ci * PHYs should register using this structure
3008c2ecf20Sopenharmony_ci */
3018c2ecf20Sopenharmony_cistruct mii_bus {
3028c2ecf20Sopenharmony_ci	struct module *owner;
3038c2ecf20Sopenharmony_ci	const char *name;
3048c2ecf20Sopenharmony_ci	char id[MII_BUS_ID_SIZE];
3058c2ecf20Sopenharmony_ci	void *priv;
3068c2ecf20Sopenharmony_ci	/** @read: Perform a read transfer on the bus */
3078c2ecf20Sopenharmony_ci	int (*read)(struct mii_bus *bus, int addr, int regnum);
3088c2ecf20Sopenharmony_ci	/** @write: Perform a write transfer on the bus */
3098c2ecf20Sopenharmony_ci	int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
3108c2ecf20Sopenharmony_ci	/** @reset: Perform a reset of the bus */
3118c2ecf20Sopenharmony_ci	int (*reset)(struct mii_bus *bus);
3128c2ecf20Sopenharmony_ci
3138c2ecf20Sopenharmony_ci	/** @stats: Statistic counters per device on the bus */
3148c2ecf20Sopenharmony_ci	struct mdio_bus_stats stats[PHY_MAX_ADDR];
3158c2ecf20Sopenharmony_ci
3168c2ecf20Sopenharmony_ci	/**
3178c2ecf20Sopenharmony_ci	 * @mdio_lock: A lock to ensure that only one thing can read/write
3188c2ecf20Sopenharmony_ci	 * the MDIO bus at a time
3198c2ecf20Sopenharmony_ci	 */
3208c2ecf20Sopenharmony_ci	struct mutex mdio_lock;
3218c2ecf20Sopenharmony_ci
3228c2ecf20Sopenharmony_ci	/** @parent: Parent device of this bus */
3238c2ecf20Sopenharmony_ci	struct device *parent;
3248c2ecf20Sopenharmony_ci	/** @state: State of bus structure */
3258c2ecf20Sopenharmony_ci	enum {
3268c2ecf20Sopenharmony_ci		MDIOBUS_ALLOCATED = 1,
3278c2ecf20Sopenharmony_ci		MDIOBUS_REGISTERED,
3288c2ecf20Sopenharmony_ci		MDIOBUS_UNREGISTERED,
3298c2ecf20Sopenharmony_ci		MDIOBUS_RELEASED,
3308c2ecf20Sopenharmony_ci	} state;
3318c2ecf20Sopenharmony_ci
3328c2ecf20Sopenharmony_ci	/** @dev: Kernel device representation */
3338c2ecf20Sopenharmony_ci	struct device dev;
3348c2ecf20Sopenharmony_ci
3358c2ecf20Sopenharmony_ci	/** @mdio_map: list of all MDIO devices on bus */
3368c2ecf20Sopenharmony_ci	struct mdio_device *mdio_map[PHY_MAX_ADDR];
3378c2ecf20Sopenharmony_ci
3388c2ecf20Sopenharmony_ci	/** @phy_mask: PHY addresses to be ignored when probing */
3398c2ecf20Sopenharmony_ci	u32 phy_mask;
3408c2ecf20Sopenharmony_ci
3418c2ecf20Sopenharmony_ci	/** @phy_ignore_ta_mask: PHY addresses to ignore the TA/read failure */
3428c2ecf20Sopenharmony_ci	u32 phy_ignore_ta_mask;
3438c2ecf20Sopenharmony_ci
3448c2ecf20Sopenharmony_ci	/**
3458c2ecf20Sopenharmony_ci	 * @irq: An array of interrupts, each PHY's interrupt at the index
3468c2ecf20Sopenharmony_ci	 * matching its address
3478c2ecf20Sopenharmony_ci	 */
3488c2ecf20Sopenharmony_ci	int irq[PHY_MAX_ADDR];
3498c2ecf20Sopenharmony_ci
3508c2ecf20Sopenharmony_ci	/** @reset_delay_us: GPIO reset pulse width in microseconds */
3518c2ecf20Sopenharmony_ci	int reset_delay_us;
3528c2ecf20Sopenharmony_ci	/** @reset_post_delay_us: GPIO reset deassert delay in microseconds */
3538c2ecf20Sopenharmony_ci	int reset_post_delay_us;
3548c2ecf20Sopenharmony_ci	/** @reset_gpiod: Reset GPIO descriptor pointer */
3558c2ecf20Sopenharmony_ci	struct gpio_desc *reset_gpiod;
3568c2ecf20Sopenharmony_ci
3578c2ecf20Sopenharmony_ci	/** @probe_capabilities: bus capabilities, used for probing */
3588c2ecf20Sopenharmony_ci	enum {
3598c2ecf20Sopenharmony_ci		MDIOBUS_NO_CAP = 0,
3608c2ecf20Sopenharmony_ci		MDIOBUS_C22,
3618c2ecf20Sopenharmony_ci		MDIOBUS_C45,
3628c2ecf20Sopenharmony_ci		MDIOBUS_C22_C45,
3638c2ecf20Sopenharmony_ci	} probe_capabilities;
3648c2ecf20Sopenharmony_ci
3658c2ecf20Sopenharmony_ci	/** @shared_lock: protect access to the shared element */
3668c2ecf20Sopenharmony_ci	struct mutex shared_lock;
3678c2ecf20Sopenharmony_ci
3688c2ecf20Sopenharmony_ci	/** @shared: shared state across different PHYs */
3698c2ecf20Sopenharmony_ci	struct phy_package_shared *shared[PHY_MAX_ADDR];
3708c2ecf20Sopenharmony_ci};
3718c2ecf20Sopenharmony_ci#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
3728c2ecf20Sopenharmony_ci
3738c2ecf20Sopenharmony_cistruct mii_bus *mdiobus_alloc_size(size_t size);
3748c2ecf20Sopenharmony_ci
3758c2ecf20Sopenharmony_ci/**
3768c2ecf20Sopenharmony_ci * mdiobus_alloc - Allocate an MDIO bus structure
3778c2ecf20Sopenharmony_ci *
3788c2ecf20Sopenharmony_ci * The internal state of the MDIO bus will be set of MDIOBUS_ALLOCATED ready
3798c2ecf20Sopenharmony_ci * for the driver to register the bus.
3808c2ecf20Sopenharmony_ci */
3818c2ecf20Sopenharmony_cistatic inline struct mii_bus *mdiobus_alloc(void)
3828c2ecf20Sopenharmony_ci{
3838c2ecf20Sopenharmony_ci	return mdiobus_alloc_size(0);
3848c2ecf20Sopenharmony_ci}
3858c2ecf20Sopenharmony_ci
3868c2ecf20Sopenharmony_ciint __mdiobus_register(struct mii_bus *bus, struct module *owner);
3878c2ecf20Sopenharmony_ciint __devm_mdiobus_register(struct device *dev, struct mii_bus *bus,
3888c2ecf20Sopenharmony_ci			    struct module *owner);
3898c2ecf20Sopenharmony_ci#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
3908c2ecf20Sopenharmony_ci#define devm_mdiobus_register(dev, bus) \
3918c2ecf20Sopenharmony_ci		__devm_mdiobus_register(dev, bus, THIS_MODULE)
3928c2ecf20Sopenharmony_ci
3938c2ecf20Sopenharmony_civoid mdiobus_unregister(struct mii_bus *bus);
3948c2ecf20Sopenharmony_civoid mdiobus_free(struct mii_bus *bus);
3958c2ecf20Sopenharmony_cistruct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
3968c2ecf20Sopenharmony_cistatic inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
3978c2ecf20Sopenharmony_ci{
3988c2ecf20Sopenharmony_ci	return devm_mdiobus_alloc_size(dev, 0);
3998c2ecf20Sopenharmony_ci}
4008c2ecf20Sopenharmony_ci
4018c2ecf20Sopenharmony_cistruct mii_bus *mdio_find_bus(const char *mdio_name);
4028c2ecf20Sopenharmony_cistruct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
4038c2ecf20Sopenharmony_ci
4048c2ecf20Sopenharmony_ci#define PHY_INTERRUPT_DISABLED	false
4058c2ecf20Sopenharmony_ci#define PHY_INTERRUPT_ENABLED	true
4068c2ecf20Sopenharmony_ci
4078c2ecf20Sopenharmony_ci/**
4088c2ecf20Sopenharmony_ci * enum phy_state - PHY state machine states:
4098c2ecf20Sopenharmony_ci *
4108c2ecf20Sopenharmony_ci * @PHY_DOWN: PHY device and driver are not ready for anything.  probe
4118c2ecf20Sopenharmony_ci * should be called if and only if the PHY is in this state,
4128c2ecf20Sopenharmony_ci * given that the PHY device exists.
4138c2ecf20Sopenharmony_ci * - PHY driver probe function will set the state to @PHY_READY
4148c2ecf20Sopenharmony_ci *
4158c2ecf20Sopenharmony_ci * @PHY_READY: PHY is ready to send and receive packets, but the
4168c2ecf20Sopenharmony_ci * controller is not.  By default, PHYs which do not implement
4178c2ecf20Sopenharmony_ci * probe will be set to this state by phy_probe().
4188c2ecf20Sopenharmony_ci * - start will set the state to UP
4198c2ecf20Sopenharmony_ci *
4208c2ecf20Sopenharmony_ci * @PHY_UP: The PHY and attached device are ready to do work.
4218c2ecf20Sopenharmony_ci * Interrupts should be started here.
4228c2ecf20Sopenharmony_ci * - timer moves to @PHY_NOLINK or @PHY_RUNNING
4238c2ecf20Sopenharmony_ci *
4248c2ecf20Sopenharmony_ci * @PHY_NOLINK: PHY is up, but not currently plugged in.
4258c2ecf20Sopenharmony_ci * - irq or timer will set @PHY_RUNNING if link comes back
4268c2ecf20Sopenharmony_ci * - phy_stop moves to @PHY_HALTED
4278c2ecf20Sopenharmony_ci *
4288c2ecf20Sopenharmony_ci * @PHY_RUNNING: PHY is currently up, running, and possibly sending
4298c2ecf20Sopenharmony_ci * and/or receiving packets
4308c2ecf20Sopenharmony_ci * - irq or timer will set @PHY_NOLINK if link goes down
4318c2ecf20Sopenharmony_ci * - phy_stop moves to @PHY_HALTED
4328c2ecf20Sopenharmony_ci *
4338c2ecf20Sopenharmony_ci * @PHY_CABLETEST: PHY is performing a cable test. Packet reception/sending
4348c2ecf20Sopenharmony_ci * is not expected to work, carrier will be indicated as down. PHY will be
4358c2ecf20Sopenharmony_ci * poll once per second, or on interrupt for it current state.
4368c2ecf20Sopenharmony_ci * Once complete, move to UP to restart the PHY.
4378c2ecf20Sopenharmony_ci * - phy_stop aborts the running test and moves to @PHY_HALTED
4388c2ecf20Sopenharmony_ci *
4398c2ecf20Sopenharmony_ci * @PHY_HALTED: PHY is up, but no polling or interrupts are done. Or
4408c2ecf20Sopenharmony_ci * PHY is in an error state.
4418c2ecf20Sopenharmony_ci * - phy_start moves to @PHY_UP
4428c2ecf20Sopenharmony_ci */
4438c2ecf20Sopenharmony_cienum phy_state {
4448c2ecf20Sopenharmony_ci	PHY_DOWN = 0,
4458c2ecf20Sopenharmony_ci	PHY_READY,
4468c2ecf20Sopenharmony_ci	PHY_HALTED,
4478c2ecf20Sopenharmony_ci	PHY_UP,
4488c2ecf20Sopenharmony_ci	PHY_RUNNING,
4498c2ecf20Sopenharmony_ci	PHY_NOLINK,
4508c2ecf20Sopenharmony_ci	PHY_CABLETEST,
4518c2ecf20Sopenharmony_ci};
4528c2ecf20Sopenharmony_ci
4538c2ecf20Sopenharmony_ci#define MDIO_MMD_NUM 32
4548c2ecf20Sopenharmony_ci
4558c2ecf20Sopenharmony_ci/**
4568c2ecf20Sopenharmony_ci * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
4578c2ecf20Sopenharmony_ci * @devices_in_package: IEEE 802.3 devices in package register value.
4588c2ecf20Sopenharmony_ci * @mmds_present: bit vector of MMDs present.
4598c2ecf20Sopenharmony_ci * @device_ids: The device identifer for each present device.
4608c2ecf20Sopenharmony_ci */
4618c2ecf20Sopenharmony_cistruct phy_c45_device_ids {
4628c2ecf20Sopenharmony_ci	u32 devices_in_package;
4638c2ecf20Sopenharmony_ci	u32 mmds_present;
4648c2ecf20Sopenharmony_ci	u32 device_ids[MDIO_MMD_NUM];
4658c2ecf20Sopenharmony_ci};
4668c2ecf20Sopenharmony_ci
4678c2ecf20Sopenharmony_cistruct macsec_context;
4688c2ecf20Sopenharmony_cistruct macsec_ops;
4698c2ecf20Sopenharmony_ci
4708c2ecf20Sopenharmony_ci/**
4718c2ecf20Sopenharmony_ci * struct phy_device - An instance of a PHY
4728c2ecf20Sopenharmony_ci *
4738c2ecf20Sopenharmony_ci * @mdio: MDIO bus this PHY is on
4748c2ecf20Sopenharmony_ci * @drv: Pointer to the driver for this PHY instance
4758c2ecf20Sopenharmony_ci * @phy_id: UID for this device found during discovery
4768c2ecf20Sopenharmony_ci * @c45_ids: 802.3-c45 Device Identifiers if is_c45.
4778c2ecf20Sopenharmony_ci * @is_c45:  Set to true if this PHY uses clause 45 addressing.
4788c2ecf20Sopenharmony_ci * @is_internal: Set to true if this PHY is internal to a MAC.
4798c2ecf20Sopenharmony_ci * @is_pseudo_fixed_link: Set to true if this PHY is an Ethernet switch, etc.
4808c2ecf20Sopenharmony_ci * @is_gigabit_capable: Set to true if PHY supports 1000Mbps
4818c2ecf20Sopenharmony_ci * @has_fixups: Set to true if this PHY has fixups/quirks.
4828c2ecf20Sopenharmony_ci * @suspended: Set to true if this PHY has been suspended successfully.
4838c2ecf20Sopenharmony_ci * @suspended_by_mdio_bus: Set to true if this PHY was suspended by MDIO bus.
4848c2ecf20Sopenharmony_ci * @sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
4858c2ecf20Sopenharmony_ci * @loopback_enabled: Set true if this PHY has been loopbacked successfully.
4868c2ecf20Sopenharmony_ci * @downshifted_rate: Set true if link speed has been downshifted.
4878c2ecf20Sopenharmony_ci * @state: State of the PHY for management purposes
4888c2ecf20Sopenharmony_ci * @dev_flags: Device-specific flags used by the PHY driver.
4898c2ecf20Sopenharmony_ci * @irq: IRQ number of the PHY's interrupt (-1 if none)
4908c2ecf20Sopenharmony_ci * @phy_timer: The timer for handling the state machine
4918c2ecf20Sopenharmony_ci * @phylink: Pointer to phylink instance for this PHY
4928c2ecf20Sopenharmony_ci * @sfp_bus_attached: Flag indicating whether the SFP bus has been attached
4938c2ecf20Sopenharmony_ci * @sfp_bus: SFP bus attached to this PHY's fiber port
4948c2ecf20Sopenharmony_ci * @attached_dev: The attached enet driver's device instance ptr
4958c2ecf20Sopenharmony_ci * @adjust_link: Callback for the enet controller to respond to changes: in the
4968c2ecf20Sopenharmony_ci *               link state.
4978c2ecf20Sopenharmony_ci * @phy_link_change: Callback for phylink for notification of link change
4988c2ecf20Sopenharmony_ci * @macsec_ops: MACsec offloading ops.
4998c2ecf20Sopenharmony_ci *
5008c2ecf20Sopenharmony_ci * @speed: Current link speed
5018c2ecf20Sopenharmony_ci * @duplex: Current duplex
5028c2ecf20Sopenharmony_ci * @port: Current port
5038c2ecf20Sopenharmony_ci * @pause: Current pause
5048c2ecf20Sopenharmony_ci * @asym_pause: Current asymmetric pause
5058c2ecf20Sopenharmony_ci * @supported: Combined MAC/PHY supported linkmodes
5068c2ecf20Sopenharmony_ci * @advertising: Currently advertised linkmodes
5078c2ecf20Sopenharmony_ci * @adv_old: Saved advertised while power saving for WoL
5088c2ecf20Sopenharmony_ci * @lp_advertising: Current link partner advertised linkmodes
5098c2ecf20Sopenharmony_ci * @eee_broken_modes: Energy efficient ethernet modes which should be prohibited
5108c2ecf20Sopenharmony_ci * @autoneg: Flag autoneg being used
5118c2ecf20Sopenharmony_ci * @link: Current link state
5128c2ecf20Sopenharmony_ci * @autoneg_complete: Flag auto negotiation of the link has completed
5138c2ecf20Sopenharmony_ci * @mdix: Current crossover
5148c2ecf20Sopenharmony_ci * @mdix_ctrl: User setting of crossover
5158c2ecf20Sopenharmony_ci * @interrupts: Flag interrupts have been enabled
5168c2ecf20Sopenharmony_ci * @interface: enum phy_interface_t value
5178c2ecf20Sopenharmony_ci * @skb: Netlink message for cable diagnostics
5188c2ecf20Sopenharmony_ci * @nest: Netlink nest used for cable diagnostics
5198c2ecf20Sopenharmony_ci * @ehdr: nNtlink header for cable diagnostics
5208c2ecf20Sopenharmony_ci * @phy_led_triggers: Array of LED triggers
5218c2ecf20Sopenharmony_ci * @phy_num_led_triggers: Number of triggers in @phy_led_triggers
5228c2ecf20Sopenharmony_ci * @led_link_trigger: LED trigger for link up/down
5238c2ecf20Sopenharmony_ci * @last_triggered: last LED trigger for link speed
5248c2ecf20Sopenharmony_ci * @master_slave_set: User requested master/slave configuration
5258c2ecf20Sopenharmony_ci * @master_slave_get: Current master/slave advertisement
5268c2ecf20Sopenharmony_ci * @master_slave_state: Current master/slave configuration
5278c2ecf20Sopenharmony_ci * @mii_ts: Pointer to time stamper callbacks
5288c2ecf20Sopenharmony_ci * @lock:  Mutex for serialization access to PHY
5298c2ecf20Sopenharmony_ci * @state_queue: Work queue for state machine
5308c2ecf20Sopenharmony_ci * @shared: Pointer to private data shared by phys in one package
5318c2ecf20Sopenharmony_ci * @priv: Pointer to driver private data
5328c2ecf20Sopenharmony_ci *
5338c2ecf20Sopenharmony_ci * interrupts currently only supports enabled or disabled,
5348c2ecf20Sopenharmony_ci * but could be changed in the future to support enabling
5358c2ecf20Sopenharmony_ci * and disabling specific interrupts
5368c2ecf20Sopenharmony_ci *
5378c2ecf20Sopenharmony_ci * Contains some infrastructure for polling and interrupt
5388c2ecf20Sopenharmony_ci * handling, as well as handling shifts in PHY hardware state
5398c2ecf20Sopenharmony_ci */
5408c2ecf20Sopenharmony_cistruct phy_device {
5418c2ecf20Sopenharmony_ci	struct mdio_device mdio;
5428c2ecf20Sopenharmony_ci
5438c2ecf20Sopenharmony_ci	/* Information about the PHY type */
5448c2ecf20Sopenharmony_ci	/* And management functions */
5458c2ecf20Sopenharmony_ci	struct phy_driver *drv;
5468c2ecf20Sopenharmony_ci
5478c2ecf20Sopenharmony_ci	u32 phy_id;
5488c2ecf20Sopenharmony_ci
5498c2ecf20Sopenharmony_ci	struct phy_c45_device_ids c45_ids;
5508c2ecf20Sopenharmony_ci	unsigned is_c45:1;
5518c2ecf20Sopenharmony_ci	unsigned is_internal:1;
5528c2ecf20Sopenharmony_ci	unsigned is_pseudo_fixed_link:1;
5538c2ecf20Sopenharmony_ci	unsigned is_gigabit_capable:1;
5548c2ecf20Sopenharmony_ci	unsigned has_fixups:1;
5558c2ecf20Sopenharmony_ci	unsigned suspended:1;
5568c2ecf20Sopenharmony_ci	unsigned suspended_by_mdio_bus:1;
5578c2ecf20Sopenharmony_ci	unsigned sysfs_links:1;
5588c2ecf20Sopenharmony_ci	unsigned loopback_enabled:1;
5598c2ecf20Sopenharmony_ci	unsigned downshifted_rate:1;
5608c2ecf20Sopenharmony_ci
5618c2ecf20Sopenharmony_ci	unsigned autoneg:1;
5628c2ecf20Sopenharmony_ci	/* The most recently read link state */
5638c2ecf20Sopenharmony_ci	unsigned link:1;
5648c2ecf20Sopenharmony_ci	unsigned autoneg_complete:1;
5658c2ecf20Sopenharmony_ci
5668c2ecf20Sopenharmony_ci	/* Interrupts are enabled */
5678c2ecf20Sopenharmony_ci	unsigned interrupts:1;
5688c2ecf20Sopenharmony_ci
5698c2ecf20Sopenharmony_ci	enum phy_state state;
5708c2ecf20Sopenharmony_ci
5718c2ecf20Sopenharmony_ci	u32 dev_flags;
5728c2ecf20Sopenharmony_ci
5738c2ecf20Sopenharmony_ci	phy_interface_t interface;
5748c2ecf20Sopenharmony_ci
5758c2ecf20Sopenharmony_ci	/*
5768c2ecf20Sopenharmony_ci	 * forced speed & duplex (no autoneg)
5778c2ecf20Sopenharmony_ci	 * partner speed & duplex & pause (autoneg)
5788c2ecf20Sopenharmony_ci	 */
5798c2ecf20Sopenharmony_ci	int speed;
5808c2ecf20Sopenharmony_ci	int duplex;
5818c2ecf20Sopenharmony_ci	int port;
5828c2ecf20Sopenharmony_ci	int pause;
5838c2ecf20Sopenharmony_ci	int asym_pause;
5848c2ecf20Sopenharmony_ci	u8 master_slave_get;
5858c2ecf20Sopenharmony_ci	u8 master_slave_set;
5868c2ecf20Sopenharmony_ci	u8 master_slave_state;
5878c2ecf20Sopenharmony_ci
5888c2ecf20Sopenharmony_ci	/* Union of PHY and Attached devices' supported link modes */
5898c2ecf20Sopenharmony_ci	/* See ethtool.h for more info */
5908c2ecf20Sopenharmony_ci	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
5918c2ecf20Sopenharmony_ci	__ETHTOOL_DECLARE_LINK_MODE_MASK(advertising);
5928c2ecf20Sopenharmony_ci	__ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising);
5938c2ecf20Sopenharmony_ci	/* used with phy_speed_down */
5948c2ecf20Sopenharmony_ci	__ETHTOOL_DECLARE_LINK_MODE_MASK(adv_old);
5958c2ecf20Sopenharmony_ci
5968c2ecf20Sopenharmony_ci	/* Energy efficient ethernet modes which should be prohibited */
5978c2ecf20Sopenharmony_ci	u32 eee_broken_modes;
5988c2ecf20Sopenharmony_ci
5998c2ecf20Sopenharmony_ci#ifdef CONFIG_LED_TRIGGER_PHY
6008c2ecf20Sopenharmony_ci	struct phy_led_trigger *phy_led_triggers;
6018c2ecf20Sopenharmony_ci	unsigned int phy_num_led_triggers;
6028c2ecf20Sopenharmony_ci	struct phy_led_trigger *last_triggered;
6038c2ecf20Sopenharmony_ci
6048c2ecf20Sopenharmony_ci	struct phy_led_trigger *led_link_trigger;
6058c2ecf20Sopenharmony_ci#endif
6068c2ecf20Sopenharmony_ci
6078c2ecf20Sopenharmony_ci	/*
6088c2ecf20Sopenharmony_ci	 * Interrupt number for this PHY
6098c2ecf20Sopenharmony_ci	 * -1 means no interrupt
6108c2ecf20Sopenharmony_ci	 */
6118c2ecf20Sopenharmony_ci	int irq;
6128c2ecf20Sopenharmony_ci
6138c2ecf20Sopenharmony_ci	/* private data pointer */
6148c2ecf20Sopenharmony_ci	/* For use by PHYs to maintain extra state */
6158c2ecf20Sopenharmony_ci	void *priv;
6168c2ecf20Sopenharmony_ci
6178c2ecf20Sopenharmony_ci	/* shared data pointer */
6188c2ecf20Sopenharmony_ci	/* For use by PHYs inside the same package that need a shared state. */
6198c2ecf20Sopenharmony_ci	struct phy_package_shared *shared;
6208c2ecf20Sopenharmony_ci
6218c2ecf20Sopenharmony_ci	/* Reporting cable test results */
6228c2ecf20Sopenharmony_ci	struct sk_buff *skb;
6238c2ecf20Sopenharmony_ci	void *ehdr;
6248c2ecf20Sopenharmony_ci	struct nlattr *nest;
6258c2ecf20Sopenharmony_ci
6268c2ecf20Sopenharmony_ci	/* Interrupt and Polling infrastructure */
6278c2ecf20Sopenharmony_ci	struct delayed_work state_queue;
6288c2ecf20Sopenharmony_ci
6298c2ecf20Sopenharmony_ci	struct mutex lock;
6308c2ecf20Sopenharmony_ci
6318c2ecf20Sopenharmony_ci	/* This may be modified under the rtnl lock */
6328c2ecf20Sopenharmony_ci	bool sfp_bus_attached;
6338c2ecf20Sopenharmony_ci	struct sfp_bus *sfp_bus;
6348c2ecf20Sopenharmony_ci	struct phylink *phylink;
6358c2ecf20Sopenharmony_ci	struct net_device *attached_dev;
6368c2ecf20Sopenharmony_ci	struct mii_timestamper *mii_ts;
6378c2ecf20Sopenharmony_ci
6388c2ecf20Sopenharmony_ci	u8 mdix;
6398c2ecf20Sopenharmony_ci	u8 mdix_ctrl;
6408c2ecf20Sopenharmony_ci
6418c2ecf20Sopenharmony_ci	void (*phy_link_change)(struct phy_device *phydev, bool up);
6428c2ecf20Sopenharmony_ci	void (*adjust_link)(struct net_device *dev);
6438c2ecf20Sopenharmony_ci
6448c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_MACSEC)
6458c2ecf20Sopenharmony_ci	/* MACsec management functions */
6468c2ecf20Sopenharmony_ci	const struct macsec_ops *macsec_ops;
6478c2ecf20Sopenharmony_ci#endif
6488c2ecf20Sopenharmony_ci};
6498c2ecf20Sopenharmony_ci#define to_phy_device(d) container_of(to_mdio_device(d), \
6508c2ecf20Sopenharmony_ci				      struct phy_device, mdio)
6518c2ecf20Sopenharmony_ci
6528c2ecf20Sopenharmony_ci/**
6538c2ecf20Sopenharmony_ci * struct phy_tdr_config - Configuration of a TDR raw test
6548c2ecf20Sopenharmony_ci *
6558c2ecf20Sopenharmony_ci * @first: Distance for first data collection point
6568c2ecf20Sopenharmony_ci * @last: Distance for last data collection point
6578c2ecf20Sopenharmony_ci * @step: Step between data collection points
6588c2ecf20Sopenharmony_ci * @pair: Bitmap of cable pairs to collect data for
6598c2ecf20Sopenharmony_ci *
6608c2ecf20Sopenharmony_ci * A structure containing possible configuration parameters
6618c2ecf20Sopenharmony_ci * for a TDR cable test. The driver does not need to implement
6628c2ecf20Sopenharmony_ci * all the parameters, but should report what is actually used.
6638c2ecf20Sopenharmony_ci * All distances are in centimeters.
6648c2ecf20Sopenharmony_ci */
6658c2ecf20Sopenharmony_cistruct phy_tdr_config {
6668c2ecf20Sopenharmony_ci	u32 first;
6678c2ecf20Sopenharmony_ci	u32 last;
6688c2ecf20Sopenharmony_ci	u32 step;
6698c2ecf20Sopenharmony_ci	s8 pair;
6708c2ecf20Sopenharmony_ci};
6718c2ecf20Sopenharmony_ci#define PHY_PAIR_ALL -1
6728c2ecf20Sopenharmony_ci
6738c2ecf20Sopenharmony_ci/**
6748c2ecf20Sopenharmony_ci * struct phy_driver - Driver structure for a particular PHY type
6758c2ecf20Sopenharmony_ci *
6768c2ecf20Sopenharmony_ci * @mdiodrv: Data common to all MDIO devices
6778c2ecf20Sopenharmony_ci * @phy_id: The result of reading the UID registers of this PHY
6788c2ecf20Sopenharmony_ci *   type, and ANDing them with the phy_id_mask.  This driver
6798c2ecf20Sopenharmony_ci *   only works for PHYs with IDs which match this field
6808c2ecf20Sopenharmony_ci * @name: The friendly name of this PHY type
6818c2ecf20Sopenharmony_ci * @phy_id_mask: Defines the important bits of the phy_id
6828c2ecf20Sopenharmony_ci * @features: A mandatory list of features (speed, duplex, etc)
6838c2ecf20Sopenharmony_ci *   supported by this PHY
6848c2ecf20Sopenharmony_ci * @flags: A bitfield defining certain other features this PHY
6858c2ecf20Sopenharmony_ci *   supports (like interrupts)
6868c2ecf20Sopenharmony_ci * @driver_data: Static driver data
6878c2ecf20Sopenharmony_ci *
6888c2ecf20Sopenharmony_ci * All functions are optional. If config_aneg or read_status
6898c2ecf20Sopenharmony_ci * are not implemented, the phy core uses the genphy versions.
6908c2ecf20Sopenharmony_ci * Note that none of these functions should be called from
6918c2ecf20Sopenharmony_ci * interrupt time. The goal is for the bus read/write functions
6928c2ecf20Sopenharmony_ci * to be able to block when the bus transaction is happening,
6938c2ecf20Sopenharmony_ci * and be freed up by an interrupt (The MPC85xx has this ability,
6948c2ecf20Sopenharmony_ci * though it is not currently supported in the driver).
6958c2ecf20Sopenharmony_ci */
6968c2ecf20Sopenharmony_cistruct phy_driver {
6978c2ecf20Sopenharmony_ci	struct mdio_driver_common mdiodrv;
6988c2ecf20Sopenharmony_ci	u32 phy_id;
6998c2ecf20Sopenharmony_ci	char *name;
7008c2ecf20Sopenharmony_ci	u32 phy_id_mask;
7018c2ecf20Sopenharmony_ci	const unsigned long * const features;
7028c2ecf20Sopenharmony_ci	u32 flags;
7038c2ecf20Sopenharmony_ci	const void *driver_data;
7048c2ecf20Sopenharmony_ci
7058c2ecf20Sopenharmony_ci	/**
7068c2ecf20Sopenharmony_ci	 * @soft_reset: Called to issue a PHY software reset
7078c2ecf20Sopenharmony_ci	 */
7088c2ecf20Sopenharmony_ci	int (*soft_reset)(struct phy_device *phydev);
7098c2ecf20Sopenharmony_ci
7108c2ecf20Sopenharmony_ci	/**
7118c2ecf20Sopenharmony_ci	 * @config_init: Called to initialize the PHY,
7128c2ecf20Sopenharmony_ci	 * including after a reset
7138c2ecf20Sopenharmony_ci	 */
7148c2ecf20Sopenharmony_ci	int (*config_init)(struct phy_device *phydev);
7158c2ecf20Sopenharmony_ci
7168c2ecf20Sopenharmony_ci	/**
7178c2ecf20Sopenharmony_ci	 * @probe: Called during discovery.  Used to set
7188c2ecf20Sopenharmony_ci	 * up device-specific structures, if any
7198c2ecf20Sopenharmony_ci	 */
7208c2ecf20Sopenharmony_ci	int (*probe)(struct phy_device *phydev);
7218c2ecf20Sopenharmony_ci
7228c2ecf20Sopenharmony_ci	/**
7238c2ecf20Sopenharmony_ci	 * @get_features: Probe the hardware to determine what
7248c2ecf20Sopenharmony_ci	 * abilities it has.  Should only set phydev->supported.
7258c2ecf20Sopenharmony_ci	 */
7268c2ecf20Sopenharmony_ci	int (*get_features)(struct phy_device *phydev);
7278c2ecf20Sopenharmony_ci
7288c2ecf20Sopenharmony_ci	/* PHY Power Management */
7298c2ecf20Sopenharmony_ci	/** @suspend: Suspend the hardware, saving state if needed */
7308c2ecf20Sopenharmony_ci	int (*suspend)(struct phy_device *phydev);
7318c2ecf20Sopenharmony_ci	/** @resume: Resume the hardware, restoring state if needed */
7328c2ecf20Sopenharmony_ci	int (*resume)(struct phy_device *phydev);
7338c2ecf20Sopenharmony_ci
7348c2ecf20Sopenharmony_ci	/**
7358c2ecf20Sopenharmony_ci	 * @config_aneg: Configures the advertisement and resets
7368c2ecf20Sopenharmony_ci	 * autonegotiation if phydev->autoneg is on,
7378c2ecf20Sopenharmony_ci	 * forces the speed to the current settings in phydev
7388c2ecf20Sopenharmony_ci	 * if phydev->autoneg is off
7398c2ecf20Sopenharmony_ci	 */
7408c2ecf20Sopenharmony_ci	int (*config_aneg)(struct phy_device *phydev);
7418c2ecf20Sopenharmony_ci
7428c2ecf20Sopenharmony_ci	/** @aneg_done: Determines the auto negotiation result */
7438c2ecf20Sopenharmony_ci	int (*aneg_done)(struct phy_device *phydev);
7448c2ecf20Sopenharmony_ci
7458c2ecf20Sopenharmony_ci	/** @read_status: Determines the negotiated speed and duplex */
7468c2ecf20Sopenharmony_ci	int (*read_status)(struct phy_device *phydev);
7478c2ecf20Sopenharmony_ci
7488c2ecf20Sopenharmony_ci	/** @ack_interrupt: Clears any pending interrupts */
7498c2ecf20Sopenharmony_ci	int (*ack_interrupt)(struct phy_device *phydev);
7508c2ecf20Sopenharmony_ci
7518c2ecf20Sopenharmony_ci	/** @config_intr: Enables or disables interrupts */
7528c2ecf20Sopenharmony_ci	int (*config_intr)(struct phy_device *phydev);
7538c2ecf20Sopenharmony_ci
7548c2ecf20Sopenharmony_ci	/**
7558c2ecf20Sopenharmony_ci	 * @did_interrupt: Checks if the PHY generated an interrupt.
7568c2ecf20Sopenharmony_ci	 * For multi-PHY devices with shared PHY interrupt pin
7578c2ecf20Sopenharmony_ci	 * Set interrupt bits have to be cleared.
7588c2ecf20Sopenharmony_ci	 */
7598c2ecf20Sopenharmony_ci	int (*did_interrupt)(struct phy_device *phydev);
7608c2ecf20Sopenharmony_ci
7618c2ecf20Sopenharmony_ci	/** @handle_interrupt: Override default interrupt handling */
7628c2ecf20Sopenharmony_ci	irqreturn_t (*handle_interrupt)(struct phy_device *phydev);
7638c2ecf20Sopenharmony_ci
7648c2ecf20Sopenharmony_ci	/** @remove: Clears up any memory if needed */
7658c2ecf20Sopenharmony_ci	void (*remove)(struct phy_device *phydev);
7668c2ecf20Sopenharmony_ci
7678c2ecf20Sopenharmony_ci	/**
7688c2ecf20Sopenharmony_ci	 * @match_phy_device: Returns true if this is a suitable
7698c2ecf20Sopenharmony_ci	 * driver for the given phydev.	 If NULL, matching is based on
7708c2ecf20Sopenharmony_ci	 * phy_id and phy_id_mask.
7718c2ecf20Sopenharmony_ci	 */
7728c2ecf20Sopenharmony_ci	int (*match_phy_device)(struct phy_device *phydev);
7738c2ecf20Sopenharmony_ci
7748c2ecf20Sopenharmony_ci	/**
7758c2ecf20Sopenharmony_ci	 * @set_wol: Some devices (e.g. qnap TS-119P II) require PHY
7768c2ecf20Sopenharmony_ci	 * register changes to enable Wake on LAN, so set_wol is
7778c2ecf20Sopenharmony_ci	 * provided to be called in the ethernet driver's set_wol
7788c2ecf20Sopenharmony_ci	 * function.
7798c2ecf20Sopenharmony_ci	 */
7808c2ecf20Sopenharmony_ci	int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
7818c2ecf20Sopenharmony_ci
7828c2ecf20Sopenharmony_ci	/**
7838c2ecf20Sopenharmony_ci	 * @get_wol: See set_wol, but for checking whether Wake on LAN
7848c2ecf20Sopenharmony_ci	 * is enabled.
7858c2ecf20Sopenharmony_ci	 */
7868c2ecf20Sopenharmony_ci	void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
7878c2ecf20Sopenharmony_ci
7888c2ecf20Sopenharmony_ci	/**
7898c2ecf20Sopenharmony_ci	 * @link_change_notify: Called to inform a PHY device driver
7908c2ecf20Sopenharmony_ci	 * when the core is about to change the link state. This
7918c2ecf20Sopenharmony_ci	 * callback is supposed to be used as fixup hook for drivers
7928c2ecf20Sopenharmony_ci	 * that need to take action when the link state
7938c2ecf20Sopenharmony_ci	 * changes. Drivers are by no means allowed to mess with the
7948c2ecf20Sopenharmony_ci	 * PHY device structure in their implementations.
7958c2ecf20Sopenharmony_ci	 */
7968c2ecf20Sopenharmony_ci	void (*link_change_notify)(struct phy_device *dev);
7978c2ecf20Sopenharmony_ci
7988c2ecf20Sopenharmony_ci	/**
7998c2ecf20Sopenharmony_ci	 * @read_mmd: PHY specific driver override for reading a MMD
8008c2ecf20Sopenharmony_ci	 * register.  This function is optional for PHY specific
8018c2ecf20Sopenharmony_ci	 * drivers.  When not provided, the default MMD read function
8028c2ecf20Sopenharmony_ci	 * will be used by phy_read_mmd(), which will use either a
8038c2ecf20Sopenharmony_ci	 * direct read for Clause 45 PHYs or an indirect read for
8048c2ecf20Sopenharmony_ci	 * Clause 22 PHYs.  devnum is the MMD device number within the
8058c2ecf20Sopenharmony_ci	 * PHY device, regnum is the register within the selected MMD
8068c2ecf20Sopenharmony_ci	 * device.
8078c2ecf20Sopenharmony_ci	 */
8088c2ecf20Sopenharmony_ci	int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
8098c2ecf20Sopenharmony_ci
8108c2ecf20Sopenharmony_ci	/**
8118c2ecf20Sopenharmony_ci	 * @write_mmd: PHY specific driver override for writing a MMD
8128c2ecf20Sopenharmony_ci	 * register.  This function is optional for PHY specific
8138c2ecf20Sopenharmony_ci	 * drivers.  When not provided, the default MMD write function
8148c2ecf20Sopenharmony_ci	 * will be used by phy_write_mmd(), which will use either a
8158c2ecf20Sopenharmony_ci	 * direct write for Clause 45 PHYs, or an indirect write for
8168c2ecf20Sopenharmony_ci	 * Clause 22 PHYs.  devnum is the MMD device number within the
8178c2ecf20Sopenharmony_ci	 * PHY device, regnum is the register within the selected MMD
8188c2ecf20Sopenharmony_ci	 * device.  val is the value to be written.
8198c2ecf20Sopenharmony_ci	 */
8208c2ecf20Sopenharmony_ci	int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
8218c2ecf20Sopenharmony_ci			 u16 val);
8228c2ecf20Sopenharmony_ci
8238c2ecf20Sopenharmony_ci	/** @read_page: Return the current PHY register page number */
8248c2ecf20Sopenharmony_ci	int (*read_page)(struct phy_device *dev);
8258c2ecf20Sopenharmony_ci	/** @write_page: Set the current PHY register page number */
8268c2ecf20Sopenharmony_ci	int (*write_page)(struct phy_device *dev, int page);
8278c2ecf20Sopenharmony_ci
8288c2ecf20Sopenharmony_ci	/**
8298c2ecf20Sopenharmony_ci	 * @module_info: Get the size and type of the eeprom contained
8308c2ecf20Sopenharmony_ci	 * within a plug-in module
8318c2ecf20Sopenharmony_ci	 */
8328c2ecf20Sopenharmony_ci	int (*module_info)(struct phy_device *dev,
8338c2ecf20Sopenharmony_ci			   struct ethtool_modinfo *modinfo);
8348c2ecf20Sopenharmony_ci
8358c2ecf20Sopenharmony_ci	/**
8368c2ecf20Sopenharmony_ci	 * @module_eeprom: Get the eeprom information from the plug-in
8378c2ecf20Sopenharmony_ci	 * module
8388c2ecf20Sopenharmony_ci	 */
8398c2ecf20Sopenharmony_ci	int (*module_eeprom)(struct phy_device *dev,
8408c2ecf20Sopenharmony_ci			     struct ethtool_eeprom *ee, u8 *data);
8418c2ecf20Sopenharmony_ci
8428c2ecf20Sopenharmony_ci	/** @cable_test_start: Start a cable test */
8438c2ecf20Sopenharmony_ci	int (*cable_test_start)(struct phy_device *dev);
8448c2ecf20Sopenharmony_ci
8458c2ecf20Sopenharmony_ci	/**  @cable_test_tdr_start: Start a raw TDR cable test */
8468c2ecf20Sopenharmony_ci	int (*cable_test_tdr_start)(struct phy_device *dev,
8478c2ecf20Sopenharmony_ci				    const struct phy_tdr_config *config);
8488c2ecf20Sopenharmony_ci
8498c2ecf20Sopenharmony_ci	/**
8508c2ecf20Sopenharmony_ci	 * @cable_test_get_status: Once per second, or on interrupt,
8518c2ecf20Sopenharmony_ci	 * request the status of the test.
8528c2ecf20Sopenharmony_ci	 */
8538c2ecf20Sopenharmony_ci	int (*cable_test_get_status)(struct phy_device *dev, bool *finished);
8548c2ecf20Sopenharmony_ci
8558c2ecf20Sopenharmony_ci	/* Get statistics from the PHY using ethtool */
8568c2ecf20Sopenharmony_ci	/** @get_sset_count: Number of statistic counters */
8578c2ecf20Sopenharmony_ci	int (*get_sset_count)(struct phy_device *dev);
8588c2ecf20Sopenharmony_ci	/** @get_strings: Names of the statistic counters */
8598c2ecf20Sopenharmony_ci	void (*get_strings)(struct phy_device *dev, u8 *data);
8608c2ecf20Sopenharmony_ci	/** @get_stats: Return the statistic counter values */
8618c2ecf20Sopenharmony_ci	void (*get_stats)(struct phy_device *dev,
8628c2ecf20Sopenharmony_ci			  struct ethtool_stats *stats, u64 *data);
8638c2ecf20Sopenharmony_ci
8648c2ecf20Sopenharmony_ci	/* Get and Set PHY tunables */
8658c2ecf20Sopenharmony_ci	/** @get_tunable: Return the value of a tunable */
8668c2ecf20Sopenharmony_ci	int (*get_tunable)(struct phy_device *dev,
8678c2ecf20Sopenharmony_ci			   struct ethtool_tunable *tuna, void *data);
8688c2ecf20Sopenharmony_ci	/** @set_tunable: Set the value of a tunable */
8698c2ecf20Sopenharmony_ci	int (*set_tunable)(struct phy_device *dev,
8708c2ecf20Sopenharmony_ci			    struct ethtool_tunable *tuna,
8718c2ecf20Sopenharmony_ci			    const void *data);
8728c2ecf20Sopenharmony_ci	/** @set_loopback: Set the loopback mood of the PHY */
8738c2ecf20Sopenharmony_ci	int (*set_loopback)(struct phy_device *dev, bool enable);
8748c2ecf20Sopenharmony_ci	/** @get_sqi: Get the signal quality indication */
8758c2ecf20Sopenharmony_ci	int (*get_sqi)(struct phy_device *dev);
8768c2ecf20Sopenharmony_ci	/** @get_sqi_max: Get the maximum signal quality indication */
8778c2ecf20Sopenharmony_ci	int (*get_sqi_max)(struct phy_device *dev);
8788c2ecf20Sopenharmony_ci};
8798c2ecf20Sopenharmony_ci#define to_phy_driver(d) container_of(to_mdio_common_driver(d),		\
8808c2ecf20Sopenharmony_ci				      struct phy_driver, mdiodrv)
8818c2ecf20Sopenharmony_ci
8828c2ecf20Sopenharmony_ci#define PHY_ANY_ID "MATCH ANY PHY"
8838c2ecf20Sopenharmony_ci#define PHY_ANY_UID 0xffffffff
8848c2ecf20Sopenharmony_ci
8858c2ecf20Sopenharmony_ci#define PHY_ID_MATCH_EXACT(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 0)
8868c2ecf20Sopenharmony_ci#define PHY_ID_MATCH_MODEL(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 4)
8878c2ecf20Sopenharmony_ci#define PHY_ID_MATCH_VENDOR(id) .phy_id = (id), .phy_id_mask = GENMASK(31, 10)
8888c2ecf20Sopenharmony_ci
8898c2ecf20Sopenharmony_ci/* A Structure for boards to register fixups with the PHY Lib */
8908c2ecf20Sopenharmony_cistruct phy_fixup {
8918c2ecf20Sopenharmony_ci	struct list_head list;
8928c2ecf20Sopenharmony_ci	char bus_id[MII_BUS_ID_SIZE + 3];
8938c2ecf20Sopenharmony_ci	u32 phy_uid;
8948c2ecf20Sopenharmony_ci	u32 phy_uid_mask;
8958c2ecf20Sopenharmony_ci	int (*run)(struct phy_device *phydev);
8968c2ecf20Sopenharmony_ci};
8978c2ecf20Sopenharmony_ci
8988c2ecf20Sopenharmony_ciconst char *phy_speed_to_str(int speed);
8998c2ecf20Sopenharmony_ciconst char *phy_duplex_to_str(unsigned int duplex);
9008c2ecf20Sopenharmony_ci
9018c2ecf20Sopenharmony_ci/* A structure for mapping a particular speed and duplex
9028c2ecf20Sopenharmony_ci * combination to a particular SUPPORTED and ADVERTISED value
9038c2ecf20Sopenharmony_ci */
9048c2ecf20Sopenharmony_cistruct phy_setting {
9058c2ecf20Sopenharmony_ci	u32 speed;
9068c2ecf20Sopenharmony_ci	u8 duplex;
9078c2ecf20Sopenharmony_ci	u8 bit;
9088c2ecf20Sopenharmony_ci};
9098c2ecf20Sopenharmony_ci
9108c2ecf20Sopenharmony_ciconst struct phy_setting *
9118c2ecf20Sopenharmony_ciphy_lookup_setting(int speed, int duplex, const unsigned long *mask,
9128c2ecf20Sopenharmony_ci		   bool exact);
9138c2ecf20Sopenharmony_cisize_t phy_speeds(unsigned int *speeds, size_t size,
9148c2ecf20Sopenharmony_ci		  unsigned long *mask);
9158c2ecf20Sopenharmony_civoid of_set_phy_supported(struct phy_device *phydev);
9168c2ecf20Sopenharmony_civoid of_set_phy_eee_broken(struct phy_device *phydev);
9178c2ecf20Sopenharmony_ciint phy_speed_down_core(struct phy_device *phydev);
9188c2ecf20Sopenharmony_ci
9198c2ecf20Sopenharmony_ci/**
9208c2ecf20Sopenharmony_ci * phy_is_started - Convenience function to check whether PHY is started
9218c2ecf20Sopenharmony_ci * @phydev: The phy_device struct
9228c2ecf20Sopenharmony_ci */
9238c2ecf20Sopenharmony_cistatic inline bool phy_is_started(struct phy_device *phydev)
9248c2ecf20Sopenharmony_ci{
9258c2ecf20Sopenharmony_ci	return phydev->state >= PHY_UP;
9268c2ecf20Sopenharmony_ci}
9278c2ecf20Sopenharmony_ci
9288c2ecf20Sopenharmony_civoid phy_resolve_aneg_pause(struct phy_device *phydev);
9298c2ecf20Sopenharmony_civoid phy_resolve_aneg_linkmode(struct phy_device *phydev);
9308c2ecf20Sopenharmony_civoid phy_check_downshift(struct phy_device *phydev);
9318c2ecf20Sopenharmony_ci
9328c2ecf20Sopenharmony_ci/**
9338c2ecf20Sopenharmony_ci * phy_read - Convenience function for reading a given PHY register
9348c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
9358c2ecf20Sopenharmony_ci * @regnum: register number to read
9368c2ecf20Sopenharmony_ci *
9378c2ecf20Sopenharmony_ci * NOTE: MUST NOT be called from interrupt context,
9388c2ecf20Sopenharmony_ci * because the bus read/write functions may wait for an interrupt
9398c2ecf20Sopenharmony_ci * to conclude the operation.
9408c2ecf20Sopenharmony_ci */
9418c2ecf20Sopenharmony_cistatic inline int phy_read(struct phy_device *phydev, u32 regnum)
9428c2ecf20Sopenharmony_ci{
9438c2ecf20Sopenharmony_ci	return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
9448c2ecf20Sopenharmony_ci}
9458c2ecf20Sopenharmony_ci
9468c2ecf20Sopenharmony_ci#define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
9478c2ecf20Sopenharmony_ci				timeout_us, sleep_before_read) \
9488c2ecf20Sopenharmony_ci({ \
9498c2ecf20Sopenharmony_ci	int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
9508c2ecf20Sopenharmony_ci		sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
9518c2ecf20Sopenharmony_ci	if (val <  0) \
9528c2ecf20Sopenharmony_ci		__ret = val; \
9538c2ecf20Sopenharmony_ci	if (__ret) \
9548c2ecf20Sopenharmony_ci		phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
9558c2ecf20Sopenharmony_ci	__ret; \
9568c2ecf20Sopenharmony_ci})
9578c2ecf20Sopenharmony_ci
9588c2ecf20Sopenharmony_ci
9598c2ecf20Sopenharmony_ci/**
9608c2ecf20Sopenharmony_ci * __phy_read - convenience function for reading a given PHY register
9618c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
9628c2ecf20Sopenharmony_ci * @regnum: register number to read
9638c2ecf20Sopenharmony_ci *
9648c2ecf20Sopenharmony_ci * The caller must have taken the MDIO bus lock.
9658c2ecf20Sopenharmony_ci */
9668c2ecf20Sopenharmony_cistatic inline int __phy_read(struct phy_device *phydev, u32 regnum)
9678c2ecf20Sopenharmony_ci{
9688c2ecf20Sopenharmony_ci	return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
9698c2ecf20Sopenharmony_ci}
9708c2ecf20Sopenharmony_ci
9718c2ecf20Sopenharmony_ci/**
9728c2ecf20Sopenharmony_ci * phy_write - Convenience function for writing a given PHY register
9738c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
9748c2ecf20Sopenharmony_ci * @regnum: register number to write
9758c2ecf20Sopenharmony_ci * @val: value to write to @regnum
9768c2ecf20Sopenharmony_ci *
9778c2ecf20Sopenharmony_ci * NOTE: MUST NOT be called from interrupt context,
9788c2ecf20Sopenharmony_ci * because the bus read/write functions may wait for an interrupt
9798c2ecf20Sopenharmony_ci * to conclude the operation.
9808c2ecf20Sopenharmony_ci */
9818c2ecf20Sopenharmony_cistatic inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
9828c2ecf20Sopenharmony_ci{
9838c2ecf20Sopenharmony_ci	return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
9848c2ecf20Sopenharmony_ci}
9858c2ecf20Sopenharmony_ci
9868c2ecf20Sopenharmony_ci/**
9878c2ecf20Sopenharmony_ci * __phy_write - Convenience function for writing a given PHY register
9888c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
9898c2ecf20Sopenharmony_ci * @regnum: register number to write
9908c2ecf20Sopenharmony_ci * @val: value to write to @regnum
9918c2ecf20Sopenharmony_ci *
9928c2ecf20Sopenharmony_ci * The caller must have taken the MDIO bus lock.
9938c2ecf20Sopenharmony_ci */
9948c2ecf20Sopenharmony_cistatic inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
9958c2ecf20Sopenharmony_ci{
9968c2ecf20Sopenharmony_ci	return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
9978c2ecf20Sopenharmony_ci			       val);
9988c2ecf20Sopenharmony_ci}
9998c2ecf20Sopenharmony_ci
10008c2ecf20Sopenharmony_ci/**
10018c2ecf20Sopenharmony_ci * __phy_modify_changed() - Convenience function for modifying a PHY register
10028c2ecf20Sopenharmony_ci * @phydev: a pointer to a &struct phy_device
10038c2ecf20Sopenharmony_ci * @regnum: register number
10048c2ecf20Sopenharmony_ci * @mask: bit mask of bits to clear
10058c2ecf20Sopenharmony_ci * @set: bit mask of bits to set
10068c2ecf20Sopenharmony_ci *
10078c2ecf20Sopenharmony_ci * Unlocked helper function which allows a PHY register to be modified as
10088c2ecf20Sopenharmony_ci * new register value = (old register value & ~mask) | set
10098c2ecf20Sopenharmony_ci *
10108c2ecf20Sopenharmony_ci * Returns negative errno, 0 if there was no change, and 1 in case of change
10118c2ecf20Sopenharmony_ci */
10128c2ecf20Sopenharmony_cistatic inline int __phy_modify_changed(struct phy_device *phydev, u32 regnum,
10138c2ecf20Sopenharmony_ci				       u16 mask, u16 set)
10148c2ecf20Sopenharmony_ci{
10158c2ecf20Sopenharmony_ci	return __mdiobus_modify_changed(phydev->mdio.bus, phydev->mdio.addr,
10168c2ecf20Sopenharmony_ci					regnum, mask, set);
10178c2ecf20Sopenharmony_ci}
10188c2ecf20Sopenharmony_ci
10198c2ecf20Sopenharmony_ci/*
10208c2ecf20Sopenharmony_ci * phy_read_mmd - Convenience function for reading a register
10218c2ecf20Sopenharmony_ci * from an MMD on a given PHY.
10228c2ecf20Sopenharmony_ci */
10238c2ecf20Sopenharmony_ciint phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
10248c2ecf20Sopenharmony_ci
10258c2ecf20Sopenharmony_ci/**
10268c2ecf20Sopenharmony_ci * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
10278c2ecf20Sopenharmony_ci *                             condition is met or a timeout occurs
10288c2ecf20Sopenharmony_ci *
10298c2ecf20Sopenharmony_ci * @phydev: The phy_device struct
10308c2ecf20Sopenharmony_ci * @devaddr: The MMD to read from
10318c2ecf20Sopenharmony_ci * @regnum: The register on the MMD to read
10328c2ecf20Sopenharmony_ci * @val: Variable to read the register into
10338c2ecf20Sopenharmony_ci * @cond: Break condition (usually involving @val)
10348c2ecf20Sopenharmony_ci * @sleep_us: Maximum time to sleep between reads in us (0
10358c2ecf20Sopenharmony_ci *            tight-loops).  Should be less than ~20ms since usleep_range
10368c2ecf20Sopenharmony_ci *            is used (see Documentation/timers/timers-howto.rst).
10378c2ecf20Sopenharmony_ci * @timeout_us: Timeout in us, 0 means never timeout
10388c2ecf20Sopenharmony_ci * @sleep_before_read: if it is true, sleep @sleep_us before read.
10398c2ecf20Sopenharmony_ci * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
10408c2ecf20Sopenharmony_ci * case, the last read value at @args is stored in @val. Must not
10418c2ecf20Sopenharmony_ci * be called from atomic context if sleep_us or timeout_us are used.
10428c2ecf20Sopenharmony_ci */
10438c2ecf20Sopenharmony_ci#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
10448c2ecf20Sopenharmony_ci				  sleep_us, timeout_us, sleep_before_read) \
10458c2ecf20Sopenharmony_ci({ \
10468c2ecf20Sopenharmony_ci	int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
10478c2ecf20Sopenharmony_ci				  sleep_us, timeout_us, sleep_before_read, \
10488c2ecf20Sopenharmony_ci				  phydev, devaddr, regnum); \
10498c2ecf20Sopenharmony_ci	if (val <  0) \
10508c2ecf20Sopenharmony_ci		__ret = val; \
10518c2ecf20Sopenharmony_ci	if (__ret) \
10528c2ecf20Sopenharmony_ci		phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
10538c2ecf20Sopenharmony_ci	__ret; \
10548c2ecf20Sopenharmony_ci})
10558c2ecf20Sopenharmony_ci
10568c2ecf20Sopenharmony_ci/*
10578c2ecf20Sopenharmony_ci * __phy_read_mmd - Convenience function for reading a register
10588c2ecf20Sopenharmony_ci * from an MMD on a given PHY.
10598c2ecf20Sopenharmony_ci */
10608c2ecf20Sopenharmony_ciint __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
10618c2ecf20Sopenharmony_ci
10628c2ecf20Sopenharmony_ci/*
10638c2ecf20Sopenharmony_ci * phy_write_mmd - Convenience function for writing a register
10648c2ecf20Sopenharmony_ci * on an MMD on a given PHY.
10658c2ecf20Sopenharmony_ci */
10668c2ecf20Sopenharmony_ciint phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
10678c2ecf20Sopenharmony_ci
10688c2ecf20Sopenharmony_ci/*
10698c2ecf20Sopenharmony_ci * __phy_write_mmd - Convenience function for writing a register
10708c2ecf20Sopenharmony_ci * on an MMD on a given PHY.
10718c2ecf20Sopenharmony_ci */
10728c2ecf20Sopenharmony_ciint __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
10738c2ecf20Sopenharmony_ci
10748c2ecf20Sopenharmony_ciint __phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
10758c2ecf20Sopenharmony_ci			 u16 set);
10768c2ecf20Sopenharmony_ciint phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask,
10778c2ecf20Sopenharmony_ci		       u16 set);
10788c2ecf20Sopenharmony_ciint __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
10798c2ecf20Sopenharmony_ciint phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
10808c2ecf20Sopenharmony_ci
10818c2ecf20Sopenharmony_ciint __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
10828c2ecf20Sopenharmony_ci			     u16 mask, u16 set);
10838c2ecf20Sopenharmony_ciint phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
10848c2ecf20Sopenharmony_ci			   u16 mask, u16 set);
10858c2ecf20Sopenharmony_ciint __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
10868c2ecf20Sopenharmony_ci		     u16 mask, u16 set);
10878c2ecf20Sopenharmony_ciint phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
10888c2ecf20Sopenharmony_ci		   u16 mask, u16 set);
10898c2ecf20Sopenharmony_ci
10908c2ecf20Sopenharmony_ci/**
10918c2ecf20Sopenharmony_ci * __phy_set_bits - Convenience function for setting bits in a PHY register
10928c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
10938c2ecf20Sopenharmony_ci * @regnum: register number to write
10948c2ecf20Sopenharmony_ci * @val: bits to set
10958c2ecf20Sopenharmony_ci *
10968c2ecf20Sopenharmony_ci * The caller must have taken the MDIO bus lock.
10978c2ecf20Sopenharmony_ci */
10988c2ecf20Sopenharmony_cistatic inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
10998c2ecf20Sopenharmony_ci{
11008c2ecf20Sopenharmony_ci	return __phy_modify(phydev, regnum, 0, val);
11018c2ecf20Sopenharmony_ci}
11028c2ecf20Sopenharmony_ci
11038c2ecf20Sopenharmony_ci/**
11048c2ecf20Sopenharmony_ci * __phy_clear_bits - Convenience function for clearing bits in a PHY register
11058c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
11068c2ecf20Sopenharmony_ci * @regnum: register number to write
11078c2ecf20Sopenharmony_ci * @val: bits to clear
11088c2ecf20Sopenharmony_ci *
11098c2ecf20Sopenharmony_ci * The caller must have taken the MDIO bus lock.
11108c2ecf20Sopenharmony_ci */
11118c2ecf20Sopenharmony_cistatic inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
11128c2ecf20Sopenharmony_ci				   u16 val)
11138c2ecf20Sopenharmony_ci{
11148c2ecf20Sopenharmony_ci	return __phy_modify(phydev, regnum, val, 0);
11158c2ecf20Sopenharmony_ci}
11168c2ecf20Sopenharmony_ci
11178c2ecf20Sopenharmony_ci/**
11188c2ecf20Sopenharmony_ci * phy_set_bits - Convenience function for setting bits in a PHY register
11198c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
11208c2ecf20Sopenharmony_ci * @regnum: register number to write
11218c2ecf20Sopenharmony_ci * @val: bits to set
11228c2ecf20Sopenharmony_ci */
11238c2ecf20Sopenharmony_cistatic inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
11248c2ecf20Sopenharmony_ci{
11258c2ecf20Sopenharmony_ci	return phy_modify(phydev, regnum, 0, val);
11268c2ecf20Sopenharmony_ci}
11278c2ecf20Sopenharmony_ci
11288c2ecf20Sopenharmony_ci/**
11298c2ecf20Sopenharmony_ci * phy_clear_bits - Convenience function for clearing bits in a PHY register
11308c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
11318c2ecf20Sopenharmony_ci * @regnum: register number to write
11328c2ecf20Sopenharmony_ci * @val: bits to clear
11338c2ecf20Sopenharmony_ci */
11348c2ecf20Sopenharmony_cistatic inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
11358c2ecf20Sopenharmony_ci{
11368c2ecf20Sopenharmony_ci	return phy_modify(phydev, regnum, val, 0);
11378c2ecf20Sopenharmony_ci}
11388c2ecf20Sopenharmony_ci
11398c2ecf20Sopenharmony_ci/**
11408c2ecf20Sopenharmony_ci * __phy_set_bits_mmd - Convenience function for setting bits in a register
11418c2ecf20Sopenharmony_ci * on MMD
11428c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
11438c2ecf20Sopenharmony_ci * @devad: the MMD containing register to modify
11448c2ecf20Sopenharmony_ci * @regnum: register number to modify
11458c2ecf20Sopenharmony_ci * @val: bits to set
11468c2ecf20Sopenharmony_ci *
11478c2ecf20Sopenharmony_ci * The caller must have taken the MDIO bus lock.
11488c2ecf20Sopenharmony_ci */
11498c2ecf20Sopenharmony_cistatic inline int __phy_set_bits_mmd(struct phy_device *phydev, int devad,
11508c2ecf20Sopenharmony_ci		u32 regnum, u16 val)
11518c2ecf20Sopenharmony_ci{
11528c2ecf20Sopenharmony_ci	return __phy_modify_mmd(phydev, devad, regnum, 0, val);
11538c2ecf20Sopenharmony_ci}
11548c2ecf20Sopenharmony_ci
11558c2ecf20Sopenharmony_ci/**
11568c2ecf20Sopenharmony_ci * __phy_clear_bits_mmd - Convenience function for clearing bits in a register
11578c2ecf20Sopenharmony_ci * on MMD
11588c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
11598c2ecf20Sopenharmony_ci * @devad: the MMD containing register to modify
11608c2ecf20Sopenharmony_ci * @regnum: register number to modify
11618c2ecf20Sopenharmony_ci * @val: bits to clear
11628c2ecf20Sopenharmony_ci *
11638c2ecf20Sopenharmony_ci * The caller must have taken the MDIO bus lock.
11648c2ecf20Sopenharmony_ci */
11658c2ecf20Sopenharmony_cistatic inline int __phy_clear_bits_mmd(struct phy_device *phydev, int devad,
11668c2ecf20Sopenharmony_ci		u32 regnum, u16 val)
11678c2ecf20Sopenharmony_ci{
11688c2ecf20Sopenharmony_ci	return __phy_modify_mmd(phydev, devad, regnum, val, 0);
11698c2ecf20Sopenharmony_ci}
11708c2ecf20Sopenharmony_ci
11718c2ecf20Sopenharmony_ci/**
11728c2ecf20Sopenharmony_ci * phy_set_bits_mmd - Convenience function for setting bits in a register
11738c2ecf20Sopenharmony_ci * on MMD
11748c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
11758c2ecf20Sopenharmony_ci * @devad: the MMD containing register to modify
11768c2ecf20Sopenharmony_ci * @regnum: register number to modify
11778c2ecf20Sopenharmony_ci * @val: bits to set
11788c2ecf20Sopenharmony_ci */
11798c2ecf20Sopenharmony_cistatic inline int phy_set_bits_mmd(struct phy_device *phydev, int devad,
11808c2ecf20Sopenharmony_ci		u32 regnum, u16 val)
11818c2ecf20Sopenharmony_ci{
11828c2ecf20Sopenharmony_ci	return phy_modify_mmd(phydev, devad, regnum, 0, val);
11838c2ecf20Sopenharmony_ci}
11848c2ecf20Sopenharmony_ci
11858c2ecf20Sopenharmony_ci/**
11868c2ecf20Sopenharmony_ci * phy_clear_bits_mmd - Convenience function for clearing bits in a register
11878c2ecf20Sopenharmony_ci * on MMD
11888c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
11898c2ecf20Sopenharmony_ci * @devad: the MMD containing register to modify
11908c2ecf20Sopenharmony_ci * @regnum: register number to modify
11918c2ecf20Sopenharmony_ci * @val: bits to clear
11928c2ecf20Sopenharmony_ci */
11938c2ecf20Sopenharmony_cistatic inline int phy_clear_bits_mmd(struct phy_device *phydev, int devad,
11948c2ecf20Sopenharmony_ci		u32 regnum, u16 val)
11958c2ecf20Sopenharmony_ci{
11968c2ecf20Sopenharmony_ci	return phy_modify_mmd(phydev, devad, regnum, val, 0);
11978c2ecf20Sopenharmony_ci}
11988c2ecf20Sopenharmony_ci
11998c2ecf20Sopenharmony_ci/**
12008c2ecf20Sopenharmony_ci * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
12018c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
12028c2ecf20Sopenharmony_ci *
12038c2ecf20Sopenharmony_ci * NOTE: must be kept in sync with addition/removal of PHY_POLL and
12048c2ecf20Sopenharmony_ci * PHY_IGNORE_INTERRUPT
12058c2ecf20Sopenharmony_ci */
12068c2ecf20Sopenharmony_cistatic inline bool phy_interrupt_is_valid(struct phy_device *phydev)
12078c2ecf20Sopenharmony_ci{
12088c2ecf20Sopenharmony_ci	return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
12098c2ecf20Sopenharmony_ci}
12108c2ecf20Sopenharmony_ci
12118c2ecf20Sopenharmony_ci/**
12128c2ecf20Sopenharmony_ci * phy_polling_mode - Convenience function for testing whether polling is
12138c2ecf20Sopenharmony_ci * used to detect PHY status changes
12148c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
12158c2ecf20Sopenharmony_ci */
12168c2ecf20Sopenharmony_cistatic inline bool phy_polling_mode(struct phy_device *phydev)
12178c2ecf20Sopenharmony_ci{
12188c2ecf20Sopenharmony_ci	if (phydev->state == PHY_CABLETEST)
12198c2ecf20Sopenharmony_ci		if (phydev->drv->flags & PHY_POLL_CABLE_TEST)
12208c2ecf20Sopenharmony_ci			return true;
12218c2ecf20Sopenharmony_ci
12228c2ecf20Sopenharmony_ci	return phydev->irq == PHY_POLL;
12238c2ecf20Sopenharmony_ci}
12248c2ecf20Sopenharmony_ci
12258c2ecf20Sopenharmony_ci/**
12268c2ecf20Sopenharmony_ci * phy_has_hwtstamp - Tests whether a PHY time stamp configuration.
12278c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
12288c2ecf20Sopenharmony_ci */
12298c2ecf20Sopenharmony_cistatic inline bool phy_has_hwtstamp(struct phy_device *phydev)
12308c2ecf20Sopenharmony_ci{
12318c2ecf20Sopenharmony_ci	return phydev && phydev->mii_ts && phydev->mii_ts->hwtstamp;
12328c2ecf20Sopenharmony_ci}
12338c2ecf20Sopenharmony_ci
12348c2ecf20Sopenharmony_ci/**
12358c2ecf20Sopenharmony_ci * phy_has_rxtstamp - Tests whether a PHY supports receive time stamping.
12368c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
12378c2ecf20Sopenharmony_ci */
12388c2ecf20Sopenharmony_cistatic inline bool phy_has_rxtstamp(struct phy_device *phydev)
12398c2ecf20Sopenharmony_ci{
12408c2ecf20Sopenharmony_ci	return phydev && phydev->mii_ts && phydev->mii_ts->rxtstamp;
12418c2ecf20Sopenharmony_ci}
12428c2ecf20Sopenharmony_ci
12438c2ecf20Sopenharmony_ci/**
12448c2ecf20Sopenharmony_ci * phy_has_tsinfo - Tests whether a PHY reports time stamping and/or
12458c2ecf20Sopenharmony_ci * PTP hardware clock capabilities.
12468c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
12478c2ecf20Sopenharmony_ci */
12488c2ecf20Sopenharmony_cistatic inline bool phy_has_tsinfo(struct phy_device *phydev)
12498c2ecf20Sopenharmony_ci{
12508c2ecf20Sopenharmony_ci	return phydev && phydev->mii_ts && phydev->mii_ts->ts_info;
12518c2ecf20Sopenharmony_ci}
12528c2ecf20Sopenharmony_ci
12538c2ecf20Sopenharmony_ci/**
12548c2ecf20Sopenharmony_ci * phy_has_txtstamp - Tests whether a PHY supports transmit time stamping.
12558c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
12568c2ecf20Sopenharmony_ci */
12578c2ecf20Sopenharmony_cistatic inline bool phy_has_txtstamp(struct phy_device *phydev)
12588c2ecf20Sopenharmony_ci{
12598c2ecf20Sopenharmony_ci	return phydev && phydev->mii_ts && phydev->mii_ts->txtstamp;
12608c2ecf20Sopenharmony_ci}
12618c2ecf20Sopenharmony_ci
12628c2ecf20Sopenharmony_cistatic inline int phy_hwtstamp(struct phy_device *phydev, struct ifreq *ifr)
12638c2ecf20Sopenharmony_ci{
12648c2ecf20Sopenharmony_ci	return phydev->mii_ts->hwtstamp(phydev->mii_ts, ifr);
12658c2ecf20Sopenharmony_ci}
12668c2ecf20Sopenharmony_ci
12678c2ecf20Sopenharmony_cistatic inline bool phy_rxtstamp(struct phy_device *phydev, struct sk_buff *skb,
12688c2ecf20Sopenharmony_ci				int type)
12698c2ecf20Sopenharmony_ci{
12708c2ecf20Sopenharmony_ci	return phydev->mii_ts->rxtstamp(phydev->mii_ts, skb, type);
12718c2ecf20Sopenharmony_ci}
12728c2ecf20Sopenharmony_ci
12738c2ecf20Sopenharmony_cistatic inline int phy_ts_info(struct phy_device *phydev,
12748c2ecf20Sopenharmony_ci			      struct ethtool_ts_info *tsinfo)
12758c2ecf20Sopenharmony_ci{
12768c2ecf20Sopenharmony_ci	return phydev->mii_ts->ts_info(phydev->mii_ts, tsinfo);
12778c2ecf20Sopenharmony_ci}
12788c2ecf20Sopenharmony_ci
12798c2ecf20Sopenharmony_cistatic inline void phy_txtstamp(struct phy_device *phydev, struct sk_buff *skb,
12808c2ecf20Sopenharmony_ci				int type)
12818c2ecf20Sopenharmony_ci{
12828c2ecf20Sopenharmony_ci	phydev->mii_ts->txtstamp(phydev->mii_ts, skb, type);
12838c2ecf20Sopenharmony_ci}
12848c2ecf20Sopenharmony_ci
12858c2ecf20Sopenharmony_ci/**
12868c2ecf20Sopenharmony_ci * phy_is_internal - Convenience function for testing if a PHY is internal
12878c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
12888c2ecf20Sopenharmony_ci */
12898c2ecf20Sopenharmony_cistatic inline bool phy_is_internal(struct phy_device *phydev)
12908c2ecf20Sopenharmony_ci{
12918c2ecf20Sopenharmony_ci	return phydev->is_internal;
12928c2ecf20Sopenharmony_ci}
12938c2ecf20Sopenharmony_ci
12948c2ecf20Sopenharmony_ci/**
12958c2ecf20Sopenharmony_ci * phy_interface_mode_is_rgmii - Convenience function for testing if a
12968c2ecf20Sopenharmony_ci * PHY interface mode is RGMII (all variants)
12978c2ecf20Sopenharmony_ci * @mode: the &phy_interface_t enum
12988c2ecf20Sopenharmony_ci */
12998c2ecf20Sopenharmony_cistatic inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
13008c2ecf20Sopenharmony_ci{
13018c2ecf20Sopenharmony_ci	return mode >= PHY_INTERFACE_MODE_RGMII &&
13028c2ecf20Sopenharmony_ci		mode <= PHY_INTERFACE_MODE_RGMII_TXID;
13038c2ecf20Sopenharmony_ci};
13048c2ecf20Sopenharmony_ci
13058c2ecf20Sopenharmony_ci/**
13068c2ecf20Sopenharmony_ci * phy_interface_mode_is_8023z() - does the PHY interface mode use 802.3z
13078c2ecf20Sopenharmony_ci *   negotiation
13088c2ecf20Sopenharmony_ci * @mode: one of &enum phy_interface_t
13098c2ecf20Sopenharmony_ci *
13108c2ecf20Sopenharmony_ci * Returns true if the PHY interface mode uses the 16-bit negotiation
13118c2ecf20Sopenharmony_ci * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
13128c2ecf20Sopenharmony_ci */
13138c2ecf20Sopenharmony_cistatic inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
13148c2ecf20Sopenharmony_ci{
13158c2ecf20Sopenharmony_ci	return mode == PHY_INTERFACE_MODE_1000BASEX ||
13168c2ecf20Sopenharmony_ci	       mode == PHY_INTERFACE_MODE_2500BASEX;
13178c2ecf20Sopenharmony_ci}
13188c2ecf20Sopenharmony_ci
13198c2ecf20Sopenharmony_ci/**
13208c2ecf20Sopenharmony_ci * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
13218c2ecf20Sopenharmony_ci * is RGMII (all variants)
13228c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
13238c2ecf20Sopenharmony_ci */
13248c2ecf20Sopenharmony_cistatic inline bool phy_interface_is_rgmii(struct phy_device *phydev)
13258c2ecf20Sopenharmony_ci{
13268c2ecf20Sopenharmony_ci	return phy_interface_mode_is_rgmii(phydev->interface);
13278c2ecf20Sopenharmony_ci};
13288c2ecf20Sopenharmony_ci
13298c2ecf20Sopenharmony_ci/**
13308c2ecf20Sopenharmony_ci * phy_is_pseudo_fixed_link - Convenience function for testing if this
13318c2ecf20Sopenharmony_ci * PHY is the CPU port facing side of an Ethernet switch, or similar.
13328c2ecf20Sopenharmony_ci * @phydev: the phy_device struct
13338c2ecf20Sopenharmony_ci */
13348c2ecf20Sopenharmony_cistatic inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
13358c2ecf20Sopenharmony_ci{
13368c2ecf20Sopenharmony_ci	return phydev->is_pseudo_fixed_link;
13378c2ecf20Sopenharmony_ci}
13388c2ecf20Sopenharmony_ci
13398c2ecf20Sopenharmony_ciint phy_save_page(struct phy_device *phydev);
13408c2ecf20Sopenharmony_ciint phy_select_page(struct phy_device *phydev, int page);
13418c2ecf20Sopenharmony_ciint phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
13428c2ecf20Sopenharmony_ciint phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
13438c2ecf20Sopenharmony_ciint phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
13448c2ecf20Sopenharmony_ciint phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
13458c2ecf20Sopenharmony_ci			     u16 mask, u16 set);
13468c2ecf20Sopenharmony_ciint phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
13478c2ecf20Sopenharmony_ci		     u16 mask, u16 set);
13488c2ecf20Sopenharmony_ci
13498c2ecf20Sopenharmony_cistruct phy_device *phy_device_create(struct mii_bus *bus, int addr, u32 phy_id,
13508c2ecf20Sopenharmony_ci				     bool is_c45,
13518c2ecf20Sopenharmony_ci				     struct phy_c45_device_ids *c45_ids);
13528c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_PHYLIB)
13538c2ecf20Sopenharmony_cistruct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
13548c2ecf20Sopenharmony_ciint phy_device_register(struct phy_device *phy);
13558c2ecf20Sopenharmony_civoid phy_device_free(struct phy_device *phydev);
13568c2ecf20Sopenharmony_ci#else
13578c2ecf20Sopenharmony_cistatic inline
13588c2ecf20Sopenharmony_cistruct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
13598c2ecf20Sopenharmony_ci{
13608c2ecf20Sopenharmony_ci	return NULL;
13618c2ecf20Sopenharmony_ci}
13628c2ecf20Sopenharmony_ci
13638c2ecf20Sopenharmony_cistatic inline int phy_device_register(struct phy_device *phy)
13648c2ecf20Sopenharmony_ci{
13658c2ecf20Sopenharmony_ci	return 0;
13668c2ecf20Sopenharmony_ci}
13678c2ecf20Sopenharmony_ci
13688c2ecf20Sopenharmony_cistatic inline void phy_device_free(struct phy_device *phydev) { }
13698c2ecf20Sopenharmony_ci#endif /* CONFIG_PHYLIB */
13708c2ecf20Sopenharmony_civoid phy_device_remove(struct phy_device *phydev);
13718c2ecf20Sopenharmony_ciint phy_init_hw(struct phy_device *phydev);
13728c2ecf20Sopenharmony_ciint phy_suspend(struct phy_device *phydev);
13738c2ecf20Sopenharmony_ciint phy_resume(struct phy_device *phydev);
13748c2ecf20Sopenharmony_ciint __phy_resume(struct phy_device *phydev);
13758c2ecf20Sopenharmony_ciint phy_loopback(struct phy_device *phydev, bool enable);
13768c2ecf20Sopenharmony_civoid phy_sfp_attach(void *upstream, struct sfp_bus *bus);
13778c2ecf20Sopenharmony_civoid phy_sfp_detach(void *upstream, struct sfp_bus *bus);
13788c2ecf20Sopenharmony_ciint phy_sfp_probe(struct phy_device *phydev,
13798c2ecf20Sopenharmony_ci	          const struct sfp_upstream_ops *ops);
13808c2ecf20Sopenharmony_cistruct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
13818c2ecf20Sopenharmony_ci			      phy_interface_t interface);
13828c2ecf20Sopenharmony_cistruct phy_device *phy_find_first(struct mii_bus *bus);
13838c2ecf20Sopenharmony_ciint phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
13848c2ecf20Sopenharmony_ci		      u32 flags, phy_interface_t interface);
13858c2ecf20Sopenharmony_ciint phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
13868c2ecf20Sopenharmony_ci		       void (*handler)(struct net_device *),
13878c2ecf20Sopenharmony_ci		       phy_interface_t interface);
13888c2ecf20Sopenharmony_cistruct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
13898c2ecf20Sopenharmony_ci			       void (*handler)(struct net_device *),
13908c2ecf20Sopenharmony_ci			       phy_interface_t interface);
13918c2ecf20Sopenharmony_civoid phy_disconnect(struct phy_device *phydev);
13928c2ecf20Sopenharmony_civoid phy_detach(struct phy_device *phydev);
13938c2ecf20Sopenharmony_civoid phy_start(struct phy_device *phydev);
13948c2ecf20Sopenharmony_civoid phy_stop(struct phy_device *phydev);
13958c2ecf20Sopenharmony_ciint phy_start_aneg(struct phy_device *phydev);
13968c2ecf20Sopenharmony_ciint phy_aneg_done(struct phy_device *phydev);
13978c2ecf20Sopenharmony_ciint phy_speed_down(struct phy_device *phydev, bool sync);
13988c2ecf20Sopenharmony_ciint phy_speed_up(struct phy_device *phydev);
13998c2ecf20Sopenharmony_ci
14008c2ecf20Sopenharmony_ciint phy_restart_aneg(struct phy_device *phydev);
14018c2ecf20Sopenharmony_ciint phy_reset_after_clk_enable(struct phy_device *phydev);
14028c2ecf20Sopenharmony_ci
14038c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_PHYLIB)
14048c2ecf20Sopenharmony_ciint phy_start_cable_test(struct phy_device *phydev,
14058c2ecf20Sopenharmony_ci			 struct netlink_ext_ack *extack);
14068c2ecf20Sopenharmony_ciint phy_start_cable_test_tdr(struct phy_device *phydev,
14078c2ecf20Sopenharmony_ci			     struct netlink_ext_ack *extack,
14088c2ecf20Sopenharmony_ci			     const struct phy_tdr_config *config);
14098c2ecf20Sopenharmony_ci#else
14108c2ecf20Sopenharmony_cistatic inline
14118c2ecf20Sopenharmony_ciint phy_start_cable_test(struct phy_device *phydev,
14128c2ecf20Sopenharmony_ci			 struct netlink_ext_ack *extack)
14138c2ecf20Sopenharmony_ci{
14148c2ecf20Sopenharmony_ci	NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
14158c2ecf20Sopenharmony_ci	return -EOPNOTSUPP;
14168c2ecf20Sopenharmony_ci}
14178c2ecf20Sopenharmony_cistatic inline
14188c2ecf20Sopenharmony_ciint phy_start_cable_test_tdr(struct phy_device *phydev,
14198c2ecf20Sopenharmony_ci			     struct netlink_ext_ack *extack,
14208c2ecf20Sopenharmony_ci			     const struct phy_tdr_config *config)
14218c2ecf20Sopenharmony_ci{
14228c2ecf20Sopenharmony_ci	NL_SET_ERR_MSG(extack, "Kernel not compiled with PHYLIB support");
14238c2ecf20Sopenharmony_ci	return -EOPNOTSUPP;
14248c2ecf20Sopenharmony_ci}
14258c2ecf20Sopenharmony_ci#endif
14268c2ecf20Sopenharmony_ci
14278c2ecf20Sopenharmony_ciint phy_cable_test_result(struct phy_device *phydev, u8 pair, u16 result);
14288c2ecf20Sopenharmony_ciint phy_cable_test_fault_length(struct phy_device *phydev, u8 pair,
14298c2ecf20Sopenharmony_ci				u16 cm);
14308c2ecf20Sopenharmony_ci
14318c2ecf20Sopenharmony_cistatic inline void phy_device_reset(struct phy_device *phydev, int value)
14328c2ecf20Sopenharmony_ci{
14338c2ecf20Sopenharmony_ci	mdio_device_reset(&phydev->mdio, value);
14348c2ecf20Sopenharmony_ci}
14358c2ecf20Sopenharmony_ci
14368c2ecf20Sopenharmony_ci#define phydev_err(_phydev, format, args...)	\
14378c2ecf20Sopenharmony_ci	dev_err(&_phydev->mdio.dev, format, ##args)
14388c2ecf20Sopenharmony_ci
14398c2ecf20Sopenharmony_ci#define phydev_info(_phydev, format, args...)	\
14408c2ecf20Sopenharmony_ci	dev_info(&_phydev->mdio.dev, format, ##args)
14418c2ecf20Sopenharmony_ci
14428c2ecf20Sopenharmony_ci#define phydev_warn(_phydev, format, args...)	\
14438c2ecf20Sopenharmony_ci	dev_warn(&_phydev->mdio.dev, format, ##args)
14448c2ecf20Sopenharmony_ci
14458c2ecf20Sopenharmony_ci#define phydev_dbg(_phydev, format, args...)	\
14468c2ecf20Sopenharmony_ci	dev_dbg(&_phydev->mdio.dev, format, ##args)
14478c2ecf20Sopenharmony_ci
14488c2ecf20Sopenharmony_cistatic inline const char *phydev_name(const struct phy_device *phydev)
14498c2ecf20Sopenharmony_ci{
14508c2ecf20Sopenharmony_ci	return dev_name(&phydev->mdio.dev);
14518c2ecf20Sopenharmony_ci}
14528c2ecf20Sopenharmony_ci
14538c2ecf20Sopenharmony_cistatic inline void phy_lock_mdio_bus(struct phy_device *phydev)
14548c2ecf20Sopenharmony_ci{
14558c2ecf20Sopenharmony_ci	mutex_lock(&phydev->mdio.bus->mdio_lock);
14568c2ecf20Sopenharmony_ci}
14578c2ecf20Sopenharmony_ci
14588c2ecf20Sopenharmony_cistatic inline void phy_unlock_mdio_bus(struct phy_device *phydev)
14598c2ecf20Sopenharmony_ci{
14608c2ecf20Sopenharmony_ci	mutex_unlock(&phydev->mdio.bus->mdio_lock);
14618c2ecf20Sopenharmony_ci}
14628c2ecf20Sopenharmony_ci
14638c2ecf20Sopenharmony_civoid phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
14648c2ecf20Sopenharmony_ci	__printf(2, 3);
14658c2ecf20Sopenharmony_cichar *phy_attached_info_irq(struct phy_device *phydev)
14668c2ecf20Sopenharmony_ci	__malloc;
14678c2ecf20Sopenharmony_civoid phy_attached_info(struct phy_device *phydev);
14688c2ecf20Sopenharmony_ci
14698c2ecf20Sopenharmony_ci/* Clause 22 PHY */
14708c2ecf20Sopenharmony_ciint genphy_read_abilities(struct phy_device *phydev);
14718c2ecf20Sopenharmony_ciint genphy_setup_forced(struct phy_device *phydev);
14728c2ecf20Sopenharmony_ciint genphy_restart_aneg(struct phy_device *phydev);
14738c2ecf20Sopenharmony_ciint genphy_check_and_restart_aneg(struct phy_device *phydev, bool restart);
14748c2ecf20Sopenharmony_ciint genphy_config_eee_advert(struct phy_device *phydev);
14758c2ecf20Sopenharmony_ciint __genphy_config_aneg(struct phy_device *phydev, bool changed);
14768c2ecf20Sopenharmony_ciint genphy_aneg_done(struct phy_device *phydev);
14778c2ecf20Sopenharmony_ciint genphy_update_link(struct phy_device *phydev);
14788c2ecf20Sopenharmony_ciint genphy_read_lpa(struct phy_device *phydev);
14798c2ecf20Sopenharmony_ciint genphy_read_status_fixed(struct phy_device *phydev);
14808c2ecf20Sopenharmony_ciint genphy_read_status(struct phy_device *phydev);
14818c2ecf20Sopenharmony_ciint genphy_suspend(struct phy_device *phydev);
14828c2ecf20Sopenharmony_ciint genphy_resume(struct phy_device *phydev);
14838c2ecf20Sopenharmony_ciint genphy_loopback(struct phy_device *phydev, bool enable);
14848c2ecf20Sopenharmony_ciint genphy_soft_reset(struct phy_device *phydev);
14858c2ecf20Sopenharmony_ci
14868c2ecf20Sopenharmony_cistatic inline int genphy_config_aneg(struct phy_device *phydev)
14878c2ecf20Sopenharmony_ci{
14888c2ecf20Sopenharmony_ci	return __genphy_config_aneg(phydev, false);
14898c2ecf20Sopenharmony_ci}
14908c2ecf20Sopenharmony_ci
14918c2ecf20Sopenharmony_cistatic inline int genphy_no_ack_interrupt(struct phy_device *phydev)
14928c2ecf20Sopenharmony_ci{
14938c2ecf20Sopenharmony_ci	return 0;
14948c2ecf20Sopenharmony_ci}
14958c2ecf20Sopenharmony_cistatic inline int genphy_no_config_intr(struct phy_device *phydev)
14968c2ecf20Sopenharmony_ci{
14978c2ecf20Sopenharmony_ci	return 0;
14988c2ecf20Sopenharmony_ci}
14998c2ecf20Sopenharmony_ciint genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
15008c2ecf20Sopenharmony_ci				u16 regnum);
15018c2ecf20Sopenharmony_ciint genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
15028c2ecf20Sopenharmony_ci				 u16 regnum, u16 val);
15038c2ecf20Sopenharmony_ci
15048c2ecf20Sopenharmony_ci/* Clause 37 */
15058c2ecf20Sopenharmony_ciint genphy_c37_config_aneg(struct phy_device *phydev);
15068c2ecf20Sopenharmony_ciint genphy_c37_read_status(struct phy_device *phydev);
15078c2ecf20Sopenharmony_ci
15088c2ecf20Sopenharmony_ci/* Clause 45 PHY */
15098c2ecf20Sopenharmony_ciint genphy_c45_restart_aneg(struct phy_device *phydev);
15108c2ecf20Sopenharmony_ciint genphy_c45_check_and_restart_aneg(struct phy_device *phydev, bool restart);
15118c2ecf20Sopenharmony_ciint genphy_c45_aneg_done(struct phy_device *phydev);
15128c2ecf20Sopenharmony_ciint genphy_c45_read_link(struct phy_device *phydev);
15138c2ecf20Sopenharmony_ciint genphy_c45_read_lpa(struct phy_device *phydev);
15148c2ecf20Sopenharmony_ciint genphy_c45_read_pma(struct phy_device *phydev);
15158c2ecf20Sopenharmony_ciint genphy_c45_pma_setup_forced(struct phy_device *phydev);
15168c2ecf20Sopenharmony_ciint genphy_c45_an_config_aneg(struct phy_device *phydev);
15178c2ecf20Sopenharmony_ciint genphy_c45_an_disable_aneg(struct phy_device *phydev);
15188c2ecf20Sopenharmony_ciint genphy_c45_read_mdix(struct phy_device *phydev);
15198c2ecf20Sopenharmony_ciint genphy_c45_pma_read_abilities(struct phy_device *phydev);
15208c2ecf20Sopenharmony_ciint genphy_c45_read_status(struct phy_device *phydev);
15218c2ecf20Sopenharmony_ciint genphy_c45_config_aneg(struct phy_device *phydev);
15228c2ecf20Sopenharmony_ci
15238c2ecf20Sopenharmony_ci/* Generic C45 PHY driver */
15248c2ecf20Sopenharmony_ciextern struct phy_driver genphy_c45_driver;
15258c2ecf20Sopenharmony_ci
15268c2ecf20Sopenharmony_ci/* The gen10g_* functions are the old Clause 45 stub */
15278c2ecf20Sopenharmony_ciint gen10g_config_aneg(struct phy_device *phydev);
15288c2ecf20Sopenharmony_ci
15298c2ecf20Sopenharmony_cistatic inline int phy_read_status(struct phy_device *phydev)
15308c2ecf20Sopenharmony_ci{
15318c2ecf20Sopenharmony_ci	if (!phydev->drv)
15328c2ecf20Sopenharmony_ci		return -EIO;
15338c2ecf20Sopenharmony_ci
15348c2ecf20Sopenharmony_ci	if (phydev->drv->read_status)
15358c2ecf20Sopenharmony_ci		return phydev->drv->read_status(phydev);
15368c2ecf20Sopenharmony_ci	else
15378c2ecf20Sopenharmony_ci		return genphy_read_status(phydev);
15388c2ecf20Sopenharmony_ci}
15398c2ecf20Sopenharmony_ci
15408c2ecf20Sopenharmony_civoid phy_driver_unregister(struct phy_driver *drv);
15418c2ecf20Sopenharmony_civoid phy_drivers_unregister(struct phy_driver *drv, int n);
15428c2ecf20Sopenharmony_ciint phy_driver_register(struct phy_driver *new_driver, struct module *owner);
15438c2ecf20Sopenharmony_ciint phy_drivers_register(struct phy_driver *new_driver, int n,
15448c2ecf20Sopenharmony_ci			 struct module *owner);
15458c2ecf20Sopenharmony_civoid phy_state_machine(struct work_struct *work);
15468c2ecf20Sopenharmony_civoid phy_queue_state_machine(struct phy_device *phydev, unsigned long jiffies);
15478c2ecf20Sopenharmony_civoid phy_mac_interrupt(struct phy_device *phydev);
15488c2ecf20Sopenharmony_civoid phy_start_machine(struct phy_device *phydev);
15498c2ecf20Sopenharmony_civoid phy_stop_machine(struct phy_device *phydev);
15508c2ecf20Sopenharmony_civoid phy_ethtool_ksettings_get(struct phy_device *phydev,
15518c2ecf20Sopenharmony_ci			       struct ethtool_link_ksettings *cmd);
15528c2ecf20Sopenharmony_ciint phy_ethtool_ksettings_set(struct phy_device *phydev,
15538c2ecf20Sopenharmony_ci			      const struct ethtool_link_ksettings *cmd);
15548c2ecf20Sopenharmony_ciint phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
15558c2ecf20Sopenharmony_ciint phy_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
15568c2ecf20Sopenharmony_ciint phy_do_ioctl_running(struct net_device *dev, struct ifreq *ifr, int cmd);
15578c2ecf20Sopenharmony_ciint phy_disable_interrupts(struct phy_device *phydev);
15588c2ecf20Sopenharmony_civoid phy_request_interrupt(struct phy_device *phydev);
15598c2ecf20Sopenharmony_civoid phy_free_interrupt(struct phy_device *phydev);
15608c2ecf20Sopenharmony_civoid phy_print_status(struct phy_device *phydev);
15618c2ecf20Sopenharmony_ciint phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
15628c2ecf20Sopenharmony_civoid phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
15638c2ecf20Sopenharmony_civoid phy_advertise_supported(struct phy_device *phydev);
15648c2ecf20Sopenharmony_civoid phy_support_sym_pause(struct phy_device *phydev);
15658c2ecf20Sopenharmony_civoid phy_support_asym_pause(struct phy_device *phydev);
15668c2ecf20Sopenharmony_civoid phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
15678c2ecf20Sopenharmony_ci		       bool autoneg);
15688c2ecf20Sopenharmony_civoid phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
15698c2ecf20Sopenharmony_cibool phy_validate_pause(struct phy_device *phydev,
15708c2ecf20Sopenharmony_ci			struct ethtool_pauseparam *pp);
15718c2ecf20Sopenharmony_civoid phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause);
15728c2ecf20Sopenharmony_ci
15738c2ecf20Sopenharmony_cis32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev,
15748c2ecf20Sopenharmony_ci			   const int *delay_values, int size, bool is_rx);
15758c2ecf20Sopenharmony_ci
15768c2ecf20Sopenharmony_civoid phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv,
15778c2ecf20Sopenharmony_ci		       bool *tx_pause, bool *rx_pause);
15788c2ecf20Sopenharmony_ci
15798c2ecf20Sopenharmony_ciint phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
15808c2ecf20Sopenharmony_ci		       int (*run)(struct phy_device *));
15818c2ecf20Sopenharmony_ciint phy_register_fixup_for_id(const char *bus_id,
15828c2ecf20Sopenharmony_ci			      int (*run)(struct phy_device *));
15838c2ecf20Sopenharmony_ciint phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
15848c2ecf20Sopenharmony_ci			       int (*run)(struct phy_device *));
15858c2ecf20Sopenharmony_ci
15868c2ecf20Sopenharmony_ciint phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
15878c2ecf20Sopenharmony_ciint phy_unregister_fixup_for_id(const char *bus_id);
15888c2ecf20Sopenharmony_ciint phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
15898c2ecf20Sopenharmony_ci
15908c2ecf20Sopenharmony_ciint phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
15918c2ecf20Sopenharmony_ciint phy_get_eee_err(struct phy_device *phydev);
15928c2ecf20Sopenharmony_ciint phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
15938c2ecf20Sopenharmony_ciint phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
15948c2ecf20Sopenharmony_ciint phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
15958c2ecf20Sopenharmony_civoid phy_ethtool_get_wol(struct phy_device *phydev,
15968c2ecf20Sopenharmony_ci			 struct ethtool_wolinfo *wol);
15978c2ecf20Sopenharmony_ciint phy_ethtool_get_link_ksettings(struct net_device *ndev,
15988c2ecf20Sopenharmony_ci				   struct ethtool_link_ksettings *cmd);
15998c2ecf20Sopenharmony_ciint phy_ethtool_set_link_ksettings(struct net_device *ndev,
16008c2ecf20Sopenharmony_ci				   const struct ethtool_link_ksettings *cmd);
16018c2ecf20Sopenharmony_ciint phy_ethtool_nway_reset(struct net_device *ndev);
16028c2ecf20Sopenharmony_ciint phy_package_join(struct phy_device *phydev, int addr, size_t priv_size);
16038c2ecf20Sopenharmony_civoid phy_package_leave(struct phy_device *phydev);
16048c2ecf20Sopenharmony_ciint devm_phy_package_join(struct device *dev, struct phy_device *phydev,
16058c2ecf20Sopenharmony_ci			  int addr, size_t priv_size);
16068c2ecf20Sopenharmony_ci
16078c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_PHYLIB)
16088c2ecf20Sopenharmony_ciint __init mdio_bus_init(void);
16098c2ecf20Sopenharmony_civoid mdio_bus_exit(void);
16108c2ecf20Sopenharmony_ci#endif
16118c2ecf20Sopenharmony_ci
16128c2ecf20Sopenharmony_ciint phy_ethtool_get_strings(struct phy_device *phydev, u8 *data);
16138c2ecf20Sopenharmony_ciint phy_ethtool_get_sset_count(struct phy_device *phydev);
16148c2ecf20Sopenharmony_ciint phy_ethtool_get_stats(struct phy_device *phydev,
16158c2ecf20Sopenharmony_ci			  struct ethtool_stats *stats, u64 *data);
16168c2ecf20Sopenharmony_ci
16178c2ecf20Sopenharmony_cistatic inline int phy_package_read(struct phy_device *phydev, u32 regnum)
16188c2ecf20Sopenharmony_ci{
16198c2ecf20Sopenharmony_ci	struct phy_package_shared *shared = phydev->shared;
16208c2ecf20Sopenharmony_ci
16218c2ecf20Sopenharmony_ci	if (!shared)
16228c2ecf20Sopenharmony_ci		return -EIO;
16238c2ecf20Sopenharmony_ci
16248c2ecf20Sopenharmony_ci	return mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
16258c2ecf20Sopenharmony_ci}
16268c2ecf20Sopenharmony_ci
16278c2ecf20Sopenharmony_cistatic inline int __phy_package_read(struct phy_device *phydev, u32 regnum)
16288c2ecf20Sopenharmony_ci{
16298c2ecf20Sopenharmony_ci	struct phy_package_shared *shared = phydev->shared;
16308c2ecf20Sopenharmony_ci
16318c2ecf20Sopenharmony_ci	if (!shared)
16328c2ecf20Sopenharmony_ci		return -EIO;
16338c2ecf20Sopenharmony_ci
16348c2ecf20Sopenharmony_ci	return __mdiobus_read(phydev->mdio.bus, shared->addr, regnum);
16358c2ecf20Sopenharmony_ci}
16368c2ecf20Sopenharmony_ci
16378c2ecf20Sopenharmony_cistatic inline int phy_package_write(struct phy_device *phydev,
16388c2ecf20Sopenharmony_ci				    u32 regnum, u16 val)
16398c2ecf20Sopenharmony_ci{
16408c2ecf20Sopenharmony_ci	struct phy_package_shared *shared = phydev->shared;
16418c2ecf20Sopenharmony_ci
16428c2ecf20Sopenharmony_ci	if (!shared)
16438c2ecf20Sopenharmony_ci		return -EIO;
16448c2ecf20Sopenharmony_ci
16458c2ecf20Sopenharmony_ci	return mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
16468c2ecf20Sopenharmony_ci}
16478c2ecf20Sopenharmony_ci
16488c2ecf20Sopenharmony_cistatic inline int __phy_package_write(struct phy_device *phydev,
16498c2ecf20Sopenharmony_ci				      u32 regnum, u16 val)
16508c2ecf20Sopenharmony_ci{
16518c2ecf20Sopenharmony_ci	struct phy_package_shared *shared = phydev->shared;
16528c2ecf20Sopenharmony_ci
16538c2ecf20Sopenharmony_ci	if (!shared)
16548c2ecf20Sopenharmony_ci		return -EIO;
16558c2ecf20Sopenharmony_ci
16568c2ecf20Sopenharmony_ci	return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
16578c2ecf20Sopenharmony_ci}
16588c2ecf20Sopenharmony_ci
16598c2ecf20Sopenharmony_cistatic inline bool __phy_package_set_once(struct phy_device *phydev,
16608c2ecf20Sopenharmony_ci					  unsigned int b)
16618c2ecf20Sopenharmony_ci{
16628c2ecf20Sopenharmony_ci	struct phy_package_shared *shared = phydev->shared;
16638c2ecf20Sopenharmony_ci
16648c2ecf20Sopenharmony_ci	if (!shared)
16658c2ecf20Sopenharmony_ci		return false;
16668c2ecf20Sopenharmony_ci
16678c2ecf20Sopenharmony_ci	return !test_and_set_bit(b, &shared->flags);
16688c2ecf20Sopenharmony_ci}
16698c2ecf20Sopenharmony_ci
16708c2ecf20Sopenharmony_cistatic inline bool phy_package_init_once(struct phy_device *phydev)
16718c2ecf20Sopenharmony_ci{
16728c2ecf20Sopenharmony_ci	return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
16738c2ecf20Sopenharmony_ci}
16748c2ecf20Sopenharmony_ci
16758c2ecf20Sopenharmony_cistatic inline bool phy_package_probe_once(struct phy_device *phydev)
16768c2ecf20Sopenharmony_ci{
16778c2ecf20Sopenharmony_ci	return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
16788c2ecf20Sopenharmony_ci}
16798c2ecf20Sopenharmony_ci
16808c2ecf20Sopenharmony_ciextern struct bus_type mdio_bus_type;
16818c2ecf20Sopenharmony_ci
16828c2ecf20Sopenharmony_cistruct mdio_board_info {
16838c2ecf20Sopenharmony_ci	const char	*bus_id;
16848c2ecf20Sopenharmony_ci	char		modalias[MDIO_NAME_SIZE];
16858c2ecf20Sopenharmony_ci	int		mdio_addr;
16868c2ecf20Sopenharmony_ci	const void	*platform_data;
16878c2ecf20Sopenharmony_ci};
16888c2ecf20Sopenharmony_ci
16898c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_MDIO_DEVICE)
16908c2ecf20Sopenharmony_ciint mdiobus_register_board_info(const struct mdio_board_info *info,
16918c2ecf20Sopenharmony_ci				unsigned int n);
16928c2ecf20Sopenharmony_ci#else
16938c2ecf20Sopenharmony_cistatic inline int mdiobus_register_board_info(const struct mdio_board_info *i,
16948c2ecf20Sopenharmony_ci					      unsigned int n)
16958c2ecf20Sopenharmony_ci{
16968c2ecf20Sopenharmony_ci	return 0;
16978c2ecf20Sopenharmony_ci}
16988c2ecf20Sopenharmony_ci#endif
16998c2ecf20Sopenharmony_ci
17008c2ecf20Sopenharmony_ci
17018c2ecf20Sopenharmony_ci/**
17028c2ecf20Sopenharmony_ci * phy_module_driver() - Helper macro for registering PHY drivers
17038c2ecf20Sopenharmony_ci * @__phy_drivers: array of PHY drivers to register
17048c2ecf20Sopenharmony_ci * @__count: Numbers of members in array
17058c2ecf20Sopenharmony_ci *
17068c2ecf20Sopenharmony_ci * Helper macro for PHY drivers which do not do anything special in module
17078c2ecf20Sopenharmony_ci * init/exit. Each module may only use this macro once, and calling it
17088c2ecf20Sopenharmony_ci * replaces module_init() and module_exit().
17098c2ecf20Sopenharmony_ci */
17108c2ecf20Sopenharmony_ci#define phy_module_driver(__phy_drivers, __count)			\
17118c2ecf20Sopenharmony_cistatic int __init phy_module_init(void)					\
17128c2ecf20Sopenharmony_ci{									\
17138c2ecf20Sopenharmony_ci	return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
17148c2ecf20Sopenharmony_ci}									\
17158c2ecf20Sopenharmony_cimodule_init(phy_module_init);						\
17168c2ecf20Sopenharmony_cistatic void __exit phy_module_exit(void)				\
17178c2ecf20Sopenharmony_ci{									\
17188c2ecf20Sopenharmony_ci	phy_drivers_unregister(__phy_drivers, __count);			\
17198c2ecf20Sopenharmony_ci}									\
17208c2ecf20Sopenharmony_cimodule_exit(phy_module_exit)
17218c2ecf20Sopenharmony_ci
17228c2ecf20Sopenharmony_ci#define module_phy_driver(__phy_drivers)				\
17238c2ecf20Sopenharmony_ci	phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
17248c2ecf20Sopenharmony_ci
17258c2ecf20Sopenharmony_cibool phy_driver_is_genphy(struct phy_device *phydev);
17268c2ecf20Sopenharmony_cibool phy_driver_is_genphy_10g(struct phy_device *phydev);
17278c2ecf20Sopenharmony_ci
17288c2ecf20Sopenharmony_ci#endif /* __PHY_H */
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