1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2015 - 2016 ZTE Corporation. 4 */ 5#ifndef __DT_BINDINGS_CLOCK_ZX296718_H 6#define __DT_BINDINGS_CLOCK_ZX296718_H 7 8/* PLL */ 9#define ZX296718_PLL_CPU 1 10#define ZX296718_PLL_MAC 2 11#define ZX296718_PLL_MM0 3 12#define ZX296718_PLL_MM1 4 13#define ZX296718_PLL_VGA 5 14#define ZX296718_PLL_DDR 6 15#define ZX296718_PLL_AUDIO 7 16#define ZX296718_PLL_HSIC 8 17#define CPU_DBG_GATE 9 18#define A72_GATE 10 19#define CPU_PERI_GATE 11 20#define A53_GATE 12 21#define DDR1_GATE 13 22#define DDR0_GATE 14 23#define SD1_WCLK 15 24#define SD1_AHB 16 25#define SD0_WCLK 17 26#define SD0_AHB 18 27#define EMMC_WCLK 19 28#define EMMC_NAND_AXI 20 29#define NAND_WCLK 21 30#define EMMC_NAND_AHB 22 31#define LSP1_148M5 23 32#define LSP1_99M 24 33#define LSP1_24M 25 34#define LSP0_74M25 26 35#define LSP0_32K 27 36#define LSP0_148M5 28 37#define LSP0_99M 29 38#define LSP0_24M 30 39#define DEMUX_AXI 31 40#define DEMUX_APB 32 41#define DEMUX_148M5 33 42#define DEMUX_108M 34 43#define AUDIO_APB 35 44#define AUDIO_99M 36 45#define AUDIO_24M 37 46#define AUDIO_16M384 38 47#define AUDIO_32K 39 48#define WDT_WCLK 40 49#define TIMER_WCLK 41 50#define VDE_ACLK 42 51#define VCE_ACLK 43 52#define HDE_ACLK 44 53#define GPU_ACLK 45 54#define SAPPU_ACLK 46 55#define SAPPU_WCLK 47 56#define VOU_ACLK 48 57#define VOU_MAIN_WCLK 49 58#define VOU_AUX_WCLK 50 59#define VOU_PPU_WCLK 51 60#define MIPI_CFG_CLK 52 61#define VGA_I2C_WCLK 53 62#define MIPI_REF_CLK 54 63#define HDMI_OSC_CEC 55 64#define HDMI_OSC_CLK 56 65#define HDMI_XCLK 57 66#define VIU_M0_ACLK 58 67#define VIU_M1_ACLK 59 68#define VIU_WCLK 60 69#define VIU_JPEG_WCLK 61 70#define VIU_CFG_CLK 62 71#define TS_SYS_WCLK 63 72#define TS_SYS_108M 64 73#define USB20_HCLK 65 74#define USB20_PHY_CLK 66 75#define USB21_HCLK 67 76#define USB21_PHY_CLK 68 77#define GMAC_RMIICLK 69 78#define GMAC_PCLK 70 79#define GMAC_ACLK 71 80#define GMAC_RFCLK 72 81#define TEMPSENSOR_GATE 73 82 83#define TOP_NR_CLKS 74 84 85 86#define LSP0_TIMER3_PCLK 1 87#define LSP0_TIMER3_WCLK 2 88#define LSP0_TIMER4_PCLK 3 89#define LSP0_TIMER4_WCLK 4 90#define LSP0_TIMER5_PCLK 5 91#define LSP0_TIMER5_WCLK 6 92#define LSP0_UART3_PCLK 7 93#define LSP0_UART3_WCLK 8 94#define LSP0_UART1_PCLK 9 95#define LSP0_UART1_WCLK 10 96#define LSP0_UART2_PCLK 11 97#define LSP0_UART2_WCLK 12 98#define LSP0_SPIFC0_PCLK 13 99#define LSP0_SPIFC0_WCLK 14 100#define LSP0_I2C4_PCLK 15 101#define LSP0_I2C4_WCLK 16 102#define LSP0_I2C5_PCLK 17 103#define LSP0_I2C5_WCLK 18 104#define LSP0_SSP0_PCLK 19 105#define LSP0_SSP0_WCLK 20 106#define LSP0_SSP1_PCLK 21 107#define LSP0_SSP1_WCLK 22 108#define LSP0_USIM_PCLK 23 109#define LSP0_USIM_WCLK 24 110#define LSP0_GPIO_PCLK 25 111#define LSP0_GPIO_WCLK 26 112#define LSP0_I2C3_PCLK 27 113#define LSP0_I2C3_WCLK 28 114 115#define LSP0_NR_CLKS 29 116 117 118#define LSP1_UART4_PCLK 1 119#define LSP1_UART4_WCLK 2 120#define LSP1_UART5_PCLK 3 121#define LSP1_UART5_WCLK 4 122#define LSP1_PWM_PCLK 5 123#define LSP1_PWM_WCLK 6 124#define LSP1_I2C2_PCLK 7 125#define LSP1_I2C2_WCLK 8 126#define LSP1_SSP2_PCLK 9 127#define LSP1_SSP2_WCLK 10 128#define LSP1_SSP3_PCLK 11 129#define LSP1_SSP3_WCLK 12 130#define LSP1_SSP4_PCLK 13 131#define LSP1_SSP4_WCLK 14 132#define LSP1_USIM1_PCLK 15 133#define LSP1_USIM1_WCLK 16 134 135#define LSP1_NR_CLKS 17 136 137 138#define AUDIO_I2S0_WCLK 1 139#define AUDIO_I2S0_PCLK 2 140#define AUDIO_I2S1_WCLK 3 141#define AUDIO_I2S1_PCLK 4 142#define AUDIO_I2S2_WCLK 5 143#define AUDIO_I2S2_PCLK 6 144#define AUDIO_I2S3_WCLK 7 145#define AUDIO_I2S3_PCLK 8 146#define AUDIO_I2C0_WCLK 9 147#define AUDIO_I2C0_PCLK 10 148#define AUDIO_SPDIF0_WCLK 11 149#define AUDIO_SPDIF0_PCLK 12 150#define AUDIO_SPDIF1_WCLK 13 151#define AUDIO_SPDIF1_PCLK 14 152#define AUDIO_TIMER_WCLK 15 153#define AUDIO_TIMER_PCLK 16 154#define AUDIO_TDM_WCLK 17 155#define AUDIO_TDM_PCLK 18 156#define AUDIO_TS_PCLK 19 157#define I2S0_WCLK_MUX 20 158#define I2S1_WCLK_MUX 21 159#define I2S2_WCLK_MUX 22 160#define I2S3_WCLK_MUX 23 161 162#define AUDIO_NR_CLKS 24 163 164#endif 165