18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * stm32fx-clock.h 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2016 STMicroelectronics 68c2ecf20Sopenharmony_ci * Author: Gabriel Fernandez for STMicroelectronics. 78c2ecf20Sopenharmony_ci */ 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci/* 108c2ecf20Sopenharmony_ci * List of clocks wich are not derived from system clock (SYSCLOCK) 118c2ecf20Sopenharmony_ci * 128c2ecf20Sopenharmony_ci * The index of these clocks is the secondary index of DT bindings 138c2ecf20Sopenharmony_ci * (see Documentatoin/devicetree/bindings/clock/st,stm32-rcc.txt) 148c2ecf20Sopenharmony_ci * 158c2ecf20Sopenharmony_ci * e.g: 168c2ecf20Sopenharmony_ci <assigned-clocks = <&rcc 1 CLK_LSE>; 178c2ecf20Sopenharmony_ci*/ 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci#ifndef _DT_BINDINGS_CLK_STMFX_H 208c2ecf20Sopenharmony_ci#define _DT_BINDINGS_CLK_STMFX_H 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci#define SYSTICK 0 238c2ecf20Sopenharmony_ci#define FCLK 1 248c2ecf20Sopenharmony_ci#define CLK_LSI 2 258c2ecf20Sopenharmony_ci#define CLK_LSE 3 268c2ecf20Sopenharmony_ci#define CLK_HSE_RTC 4 278c2ecf20Sopenharmony_ci#define CLK_RTC 5 288c2ecf20Sopenharmony_ci#define PLL_VCO_I2S 6 298c2ecf20Sopenharmony_ci#define PLL_VCO_SAI 7 308c2ecf20Sopenharmony_ci#define CLK_LCD 8 318c2ecf20Sopenharmony_ci#define CLK_I2S 9 328c2ecf20Sopenharmony_ci#define CLK_SAI1 10 338c2ecf20Sopenharmony_ci#define CLK_SAI2 11 348c2ecf20Sopenharmony_ci#define CLK_I2SQ_PDIV 12 358c2ecf20Sopenharmony_ci#define CLK_SAIQ_PDIV 13 368c2ecf20Sopenharmony_ci#define CLK_HSI 14 378c2ecf20Sopenharmony_ci#define CLK_SYSCLK 15 388c2ecf20Sopenharmony_ci#define CLK_F469_DSI 16 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ci#define END_PRIMARY_CLK 17 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci#define CLK_HDMI_CEC 16 438c2ecf20Sopenharmony_ci#define CLK_SPDIF 17 448c2ecf20Sopenharmony_ci#define CLK_USART1 18 458c2ecf20Sopenharmony_ci#define CLK_USART2 19 468c2ecf20Sopenharmony_ci#define CLK_USART3 20 478c2ecf20Sopenharmony_ci#define CLK_UART4 21 488c2ecf20Sopenharmony_ci#define CLK_UART5 22 498c2ecf20Sopenharmony_ci#define CLK_USART6 23 508c2ecf20Sopenharmony_ci#define CLK_UART7 24 518c2ecf20Sopenharmony_ci#define CLK_UART8 25 528c2ecf20Sopenharmony_ci#define CLK_I2C1 26 538c2ecf20Sopenharmony_ci#define CLK_I2C2 27 548c2ecf20Sopenharmony_ci#define CLK_I2C3 28 558c2ecf20Sopenharmony_ci#define CLK_I2C4 29 568c2ecf20Sopenharmony_ci#define CLK_LPTIMER 30 578c2ecf20Sopenharmony_ci#define CLK_PLL_SRC 31 588c2ecf20Sopenharmony_ci#define CLK_DFSDM1 32 598c2ecf20Sopenharmony_ci#define CLK_ADFSDM1 33 608c2ecf20Sopenharmony_ci#define CLK_F769_DSI 34 618c2ecf20Sopenharmony_ci#define END_PRIMARY_CLK_F7 35 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci#endif 64