18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * Copyright © 2006 Keith Packard 38c2ecf20Sopenharmony_ci * Copyright © 2007-2008 Dave Airlie 48c2ecf20Sopenharmony_ci * Copyright © 2007-2008 Intel Corporation 58c2ecf20Sopenharmony_ci * Jesse Barnes <jesse.barnes@intel.com> 68c2ecf20Sopenharmony_ci * Copyright © 2014 Intel Corporation 78c2ecf20Sopenharmony_ci * Daniel Vetter <daniel.vetter@ffwll.ch> 88c2ecf20Sopenharmony_ci * 98c2ecf20Sopenharmony_ci * Permission is hereby granted, free of charge, to any person obtaining a 108c2ecf20Sopenharmony_ci * copy of this software and associated documentation files (the "Software"), 118c2ecf20Sopenharmony_ci * to deal in the Software without restriction, including without limitation 128c2ecf20Sopenharmony_ci * the rights to use, copy, modify, merge, publish, distribute, sublicense, 138c2ecf20Sopenharmony_ci * and/or sell copies of the Software, and to permit persons to whom the 148c2ecf20Sopenharmony_ci * Software is furnished to do so, subject to the following conditions: 158c2ecf20Sopenharmony_ci * 168c2ecf20Sopenharmony_ci * The above copyright notice and this permission notice shall be included in 178c2ecf20Sopenharmony_ci * all copies or substantial portions of the Software. 188c2ecf20Sopenharmony_ci * 198c2ecf20Sopenharmony_ci * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 208c2ecf20Sopenharmony_ci * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 218c2ecf20Sopenharmony_ci * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 228c2ecf20Sopenharmony_ci * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 238c2ecf20Sopenharmony_ci * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 248c2ecf20Sopenharmony_ci * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 258c2ecf20Sopenharmony_ci * OTHER DEALINGS IN THE SOFTWARE. 268c2ecf20Sopenharmony_ci */ 278c2ecf20Sopenharmony_ci#ifndef __DRM_MODES_H__ 288c2ecf20Sopenharmony_ci#define __DRM_MODES_H__ 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci#include <linux/hdmi.h> 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci#include <drm/drm_mode_object.h> 338c2ecf20Sopenharmony_ci#include <drm/drm_connector.h> 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_cistruct videomode; 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci/* 388c2ecf20Sopenharmony_ci * Note on terminology: here, for brevity and convenience, we refer to connector 398c2ecf20Sopenharmony_ci * control chips as 'CRTCs'. They can control any type of connector, VGA, LVDS, 408c2ecf20Sopenharmony_ci * DVI, etc. And 'screen' refers to the whole of the visible display, which 418c2ecf20Sopenharmony_ci * may span multiple monitors (and therefore multiple CRTC and connector 428c2ecf20Sopenharmony_ci * structures). 438c2ecf20Sopenharmony_ci */ 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci/** 468c2ecf20Sopenharmony_ci * enum drm_mode_status - hardware support status of a mode 478c2ecf20Sopenharmony_ci * @MODE_OK: Mode OK 488c2ecf20Sopenharmony_ci * @MODE_HSYNC: hsync out of range 498c2ecf20Sopenharmony_ci * @MODE_VSYNC: vsync out of range 508c2ecf20Sopenharmony_ci * @MODE_H_ILLEGAL: mode has illegal horizontal timings 518c2ecf20Sopenharmony_ci * @MODE_V_ILLEGAL: mode has illegal vertical timings 528c2ecf20Sopenharmony_ci * @MODE_BAD_WIDTH: requires an unsupported linepitch 538c2ecf20Sopenharmony_ci * @MODE_NOMODE: no mode with a matching name 548c2ecf20Sopenharmony_ci * @MODE_NO_INTERLACE: interlaced mode not supported 558c2ecf20Sopenharmony_ci * @MODE_NO_DBLESCAN: doublescan mode not supported 568c2ecf20Sopenharmony_ci * @MODE_NO_VSCAN: multiscan mode not supported 578c2ecf20Sopenharmony_ci * @MODE_MEM: insufficient video memory 588c2ecf20Sopenharmony_ci * @MODE_VIRTUAL_X: mode width too large for specified virtual size 598c2ecf20Sopenharmony_ci * @MODE_VIRTUAL_Y: mode height too large for specified virtual size 608c2ecf20Sopenharmony_ci * @MODE_MEM_VIRT: insufficient video memory given virtual size 618c2ecf20Sopenharmony_ci * @MODE_NOCLOCK: no fixed clock available 628c2ecf20Sopenharmony_ci * @MODE_CLOCK_HIGH: clock required is too high 638c2ecf20Sopenharmony_ci * @MODE_CLOCK_LOW: clock required is too low 648c2ecf20Sopenharmony_ci * @MODE_CLOCK_RANGE: clock/mode isn't in a ClockRange 658c2ecf20Sopenharmony_ci * @MODE_BAD_HVALUE: horizontal timing was out of range 668c2ecf20Sopenharmony_ci * @MODE_BAD_VVALUE: vertical timing was out of range 678c2ecf20Sopenharmony_ci * @MODE_BAD_VSCAN: VScan value out of range 688c2ecf20Sopenharmony_ci * @MODE_HSYNC_NARROW: horizontal sync too narrow 698c2ecf20Sopenharmony_ci * @MODE_HSYNC_WIDE: horizontal sync too wide 708c2ecf20Sopenharmony_ci * @MODE_HBLANK_NARROW: horizontal blanking too narrow 718c2ecf20Sopenharmony_ci * @MODE_HBLANK_WIDE: horizontal blanking too wide 728c2ecf20Sopenharmony_ci * @MODE_VSYNC_NARROW: vertical sync too narrow 738c2ecf20Sopenharmony_ci * @MODE_VSYNC_WIDE: vertical sync too wide 748c2ecf20Sopenharmony_ci * @MODE_VBLANK_NARROW: vertical blanking too narrow 758c2ecf20Sopenharmony_ci * @MODE_VBLANK_WIDE: vertical blanking too wide 768c2ecf20Sopenharmony_ci * @MODE_PANEL: exceeds panel dimensions 778c2ecf20Sopenharmony_ci * @MODE_INTERLACE_WIDTH: width too large for interlaced mode 788c2ecf20Sopenharmony_ci * @MODE_ONE_WIDTH: only one width is supported 798c2ecf20Sopenharmony_ci * @MODE_ONE_HEIGHT: only one height is supported 808c2ecf20Sopenharmony_ci * @MODE_ONE_SIZE: only one resolution is supported 818c2ecf20Sopenharmony_ci * @MODE_NO_REDUCED: monitor doesn't accept reduced blanking 828c2ecf20Sopenharmony_ci * @MODE_NO_STEREO: stereo modes not supported 838c2ecf20Sopenharmony_ci * @MODE_NO_420: ycbcr 420 modes not supported 848c2ecf20Sopenharmony_ci * @MODE_STALE: mode has become stale 858c2ecf20Sopenharmony_ci * @MODE_BAD: unspecified reason 868c2ecf20Sopenharmony_ci * @MODE_ERROR: error condition 878c2ecf20Sopenharmony_ci * 888c2ecf20Sopenharmony_ci * This enum is used to filter out modes not supported by the driver/hardware 898c2ecf20Sopenharmony_ci * combination. 908c2ecf20Sopenharmony_ci */ 918c2ecf20Sopenharmony_cienum drm_mode_status { 928c2ecf20Sopenharmony_ci MODE_OK = 0, 938c2ecf20Sopenharmony_ci MODE_HSYNC, 948c2ecf20Sopenharmony_ci MODE_VSYNC, 958c2ecf20Sopenharmony_ci MODE_H_ILLEGAL, 968c2ecf20Sopenharmony_ci MODE_V_ILLEGAL, 978c2ecf20Sopenharmony_ci MODE_BAD_WIDTH, 988c2ecf20Sopenharmony_ci MODE_NOMODE, 998c2ecf20Sopenharmony_ci MODE_NO_INTERLACE, 1008c2ecf20Sopenharmony_ci MODE_NO_DBLESCAN, 1018c2ecf20Sopenharmony_ci MODE_NO_VSCAN, 1028c2ecf20Sopenharmony_ci MODE_MEM, 1038c2ecf20Sopenharmony_ci MODE_VIRTUAL_X, 1048c2ecf20Sopenharmony_ci MODE_VIRTUAL_Y, 1058c2ecf20Sopenharmony_ci MODE_MEM_VIRT, 1068c2ecf20Sopenharmony_ci MODE_NOCLOCK, 1078c2ecf20Sopenharmony_ci MODE_CLOCK_HIGH, 1088c2ecf20Sopenharmony_ci MODE_CLOCK_LOW, 1098c2ecf20Sopenharmony_ci MODE_CLOCK_RANGE, 1108c2ecf20Sopenharmony_ci MODE_BAD_HVALUE, 1118c2ecf20Sopenharmony_ci MODE_BAD_VVALUE, 1128c2ecf20Sopenharmony_ci MODE_BAD_VSCAN, 1138c2ecf20Sopenharmony_ci MODE_HSYNC_NARROW, 1148c2ecf20Sopenharmony_ci MODE_HSYNC_WIDE, 1158c2ecf20Sopenharmony_ci MODE_HBLANK_NARROW, 1168c2ecf20Sopenharmony_ci MODE_HBLANK_WIDE, 1178c2ecf20Sopenharmony_ci MODE_VSYNC_NARROW, 1188c2ecf20Sopenharmony_ci MODE_VSYNC_WIDE, 1198c2ecf20Sopenharmony_ci MODE_VBLANK_NARROW, 1208c2ecf20Sopenharmony_ci MODE_VBLANK_WIDE, 1218c2ecf20Sopenharmony_ci MODE_PANEL, 1228c2ecf20Sopenharmony_ci MODE_INTERLACE_WIDTH, 1238c2ecf20Sopenharmony_ci MODE_ONE_WIDTH, 1248c2ecf20Sopenharmony_ci MODE_ONE_HEIGHT, 1258c2ecf20Sopenharmony_ci MODE_ONE_SIZE, 1268c2ecf20Sopenharmony_ci MODE_NO_REDUCED, 1278c2ecf20Sopenharmony_ci MODE_NO_STEREO, 1288c2ecf20Sopenharmony_ci MODE_NO_420, 1298c2ecf20Sopenharmony_ci MODE_STALE = -3, 1308c2ecf20Sopenharmony_ci MODE_BAD = -2, 1318c2ecf20Sopenharmony_ci MODE_ERROR = -1 1328c2ecf20Sopenharmony_ci}; 1338c2ecf20Sopenharmony_ci 1348c2ecf20Sopenharmony_ci#define DRM_MODE(nm, t, c, hd, hss, hse, ht, hsk, vd, vss, vse, vt, vs, f) \ 1358c2ecf20Sopenharmony_ci .name = nm, .status = 0, .type = (t), .clock = (c), \ 1368c2ecf20Sopenharmony_ci .hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \ 1378c2ecf20Sopenharmony_ci .htotal = (ht), .hskew = (hsk), .vdisplay = (vd), \ 1388c2ecf20Sopenharmony_ci .vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \ 1398c2ecf20Sopenharmony_ci .vscan = (vs), .flags = (f) 1408c2ecf20Sopenharmony_ci 1418c2ecf20Sopenharmony_ci/** 1428c2ecf20Sopenharmony_ci * DRM_SIMPLE_MODE - Simple display mode 1438c2ecf20Sopenharmony_ci * @hd: Horizontal resolution, width 1448c2ecf20Sopenharmony_ci * @vd: Vertical resolution, height 1458c2ecf20Sopenharmony_ci * @hd_mm: Display width in millimeters 1468c2ecf20Sopenharmony_ci * @vd_mm: Display height in millimeters 1478c2ecf20Sopenharmony_ci * 1488c2ecf20Sopenharmony_ci * This macro initializes a &drm_display_mode that only contains info about 1498c2ecf20Sopenharmony_ci * resolution and physical size. 1508c2ecf20Sopenharmony_ci */ 1518c2ecf20Sopenharmony_ci#define DRM_SIMPLE_MODE(hd, vd, hd_mm, vd_mm) \ 1528c2ecf20Sopenharmony_ci .type = DRM_MODE_TYPE_DRIVER, .clock = 1 /* pass validation */, \ 1538c2ecf20Sopenharmony_ci .hdisplay = (hd), .hsync_start = (hd), .hsync_end = (hd), \ 1548c2ecf20Sopenharmony_ci .htotal = (hd), .vdisplay = (vd), .vsync_start = (vd), \ 1558c2ecf20Sopenharmony_ci .vsync_end = (vd), .vtotal = (vd), .width_mm = (hd_mm), \ 1568c2ecf20Sopenharmony_ci .height_mm = (vd_mm) 1578c2ecf20Sopenharmony_ci 1588c2ecf20Sopenharmony_ci#define CRTC_INTERLACE_HALVE_V (1 << 0) /* halve V values for interlacing */ 1598c2ecf20Sopenharmony_ci#define CRTC_STEREO_DOUBLE (1 << 1) /* adjust timings for stereo modes */ 1608c2ecf20Sopenharmony_ci#define CRTC_NO_DBLSCAN (1 << 2) /* don't adjust doublescan */ 1618c2ecf20Sopenharmony_ci#define CRTC_NO_VSCAN (1 << 3) /* don't adjust doublescan */ 1628c2ecf20Sopenharmony_ci#define CRTC_STEREO_DOUBLE_ONLY (CRTC_STEREO_DOUBLE | CRTC_NO_DBLSCAN | CRTC_NO_VSCAN) 1638c2ecf20Sopenharmony_ci 1648c2ecf20Sopenharmony_ci#define DRM_MODE_FLAG_3D_MAX DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF 1658c2ecf20Sopenharmony_ci 1668c2ecf20Sopenharmony_ci#define DRM_MODE_MATCH_TIMINGS (1 << 0) 1678c2ecf20Sopenharmony_ci#define DRM_MODE_MATCH_CLOCK (1 << 1) 1688c2ecf20Sopenharmony_ci#define DRM_MODE_MATCH_FLAGS (1 << 2) 1698c2ecf20Sopenharmony_ci#define DRM_MODE_MATCH_3D_FLAGS (1 << 3) 1708c2ecf20Sopenharmony_ci#define DRM_MODE_MATCH_ASPECT_RATIO (1 << 4) 1718c2ecf20Sopenharmony_ci 1728c2ecf20Sopenharmony_ci/** 1738c2ecf20Sopenharmony_ci * struct drm_display_mode - DRM kernel-internal display mode structure 1748c2ecf20Sopenharmony_ci * @hdisplay: horizontal display size 1758c2ecf20Sopenharmony_ci * @hsync_start: horizontal sync start 1768c2ecf20Sopenharmony_ci * @hsync_end: horizontal sync end 1778c2ecf20Sopenharmony_ci * @htotal: horizontal total size 1788c2ecf20Sopenharmony_ci * @hskew: horizontal skew?! 1798c2ecf20Sopenharmony_ci * @vdisplay: vertical display size 1808c2ecf20Sopenharmony_ci * @vsync_start: vertical sync start 1818c2ecf20Sopenharmony_ci * @vsync_end: vertical sync end 1828c2ecf20Sopenharmony_ci * @vtotal: vertical total size 1838c2ecf20Sopenharmony_ci * @vscan: vertical scan?! 1848c2ecf20Sopenharmony_ci * @crtc_hdisplay: hardware mode horizontal display size 1858c2ecf20Sopenharmony_ci * @crtc_hblank_start: hardware mode horizontal blank start 1868c2ecf20Sopenharmony_ci * @crtc_hblank_end: hardware mode horizontal blank end 1878c2ecf20Sopenharmony_ci * @crtc_hsync_start: hardware mode horizontal sync start 1888c2ecf20Sopenharmony_ci * @crtc_hsync_end: hardware mode horizontal sync end 1898c2ecf20Sopenharmony_ci * @crtc_htotal: hardware mode horizontal total size 1908c2ecf20Sopenharmony_ci * @crtc_hskew: hardware mode horizontal skew?! 1918c2ecf20Sopenharmony_ci * @crtc_vdisplay: hardware mode vertical display size 1928c2ecf20Sopenharmony_ci * @crtc_vblank_start: hardware mode vertical blank start 1938c2ecf20Sopenharmony_ci * @crtc_vblank_end: hardware mode vertical blank end 1948c2ecf20Sopenharmony_ci * @crtc_vsync_start: hardware mode vertical sync start 1958c2ecf20Sopenharmony_ci * @crtc_vsync_end: hardware mode vertical sync end 1968c2ecf20Sopenharmony_ci * @crtc_vtotal: hardware mode vertical total size 1978c2ecf20Sopenharmony_ci * 1988c2ecf20Sopenharmony_ci * The horizontal and vertical timings are defined per the following diagram. 1998c2ecf20Sopenharmony_ci * 2008c2ecf20Sopenharmony_ci * :: 2018c2ecf20Sopenharmony_ci * 2028c2ecf20Sopenharmony_ci * 2038c2ecf20Sopenharmony_ci * Active Front Sync Back 2048c2ecf20Sopenharmony_ci * Region Porch Porch 2058c2ecf20Sopenharmony_ci * <-----------------------><----------------><-------------><--------------> 2068c2ecf20Sopenharmony_ci * //////////////////////| 2078c2ecf20Sopenharmony_ci * ////////////////////// | 2088c2ecf20Sopenharmony_ci * ////////////////////// |.................. ................ 2098c2ecf20Sopenharmony_ci * _______________ 2108c2ecf20Sopenharmony_ci * <----- [hv]display -----> 2118c2ecf20Sopenharmony_ci * <------------- [hv]sync_start ------------> 2128c2ecf20Sopenharmony_ci * <--------------------- [hv]sync_end ---------------------> 2138c2ecf20Sopenharmony_ci * <-------------------------------- [hv]total ----------------------------->* 2148c2ecf20Sopenharmony_ci * 2158c2ecf20Sopenharmony_ci * This structure contains two copies of timings. First are the plain timings, 2168c2ecf20Sopenharmony_ci * which specify the logical mode, as it would be for a progressive 1:1 scanout 2178c2ecf20Sopenharmony_ci * at the refresh rate userspace can observe through vblank timestamps. Then 2188c2ecf20Sopenharmony_ci * there's the hardware timings, which are corrected for interlacing, 2198c2ecf20Sopenharmony_ci * double-clocking and similar things. They are provided as a convenience, and 2208c2ecf20Sopenharmony_ci * can be appropriately computed using drm_mode_set_crtcinfo(). 2218c2ecf20Sopenharmony_ci * 2228c2ecf20Sopenharmony_ci * For printing you can use %DRM_MODE_FMT and DRM_MODE_ARG(). 2238c2ecf20Sopenharmony_ci */ 2248c2ecf20Sopenharmony_cistruct drm_display_mode { 2258c2ecf20Sopenharmony_ci /** 2268c2ecf20Sopenharmony_ci * @clock: 2278c2ecf20Sopenharmony_ci * 2288c2ecf20Sopenharmony_ci * Pixel clock in kHz. 2298c2ecf20Sopenharmony_ci */ 2308c2ecf20Sopenharmony_ci int clock; /* in kHz */ 2318c2ecf20Sopenharmony_ci u16 hdisplay; 2328c2ecf20Sopenharmony_ci u16 hsync_start; 2338c2ecf20Sopenharmony_ci u16 hsync_end; 2348c2ecf20Sopenharmony_ci u16 htotal; 2358c2ecf20Sopenharmony_ci u16 hskew; 2368c2ecf20Sopenharmony_ci u16 vdisplay; 2378c2ecf20Sopenharmony_ci u16 vsync_start; 2388c2ecf20Sopenharmony_ci u16 vsync_end; 2398c2ecf20Sopenharmony_ci u16 vtotal; 2408c2ecf20Sopenharmony_ci u16 vscan; 2418c2ecf20Sopenharmony_ci /** 2428c2ecf20Sopenharmony_ci * @flags: 2438c2ecf20Sopenharmony_ci * 2448c2ecf20Sopenharmony_ci * Sync and timing flags: 2458c2ecf20Sopenharmony_ci * 2468c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_PHSYNC: horizontal sync is active high. 2478c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_NHSYNC: horizontal sync is active low. 2488c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_PVSYNC: vertical sync is active high. 2498c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_NVSYNC: vertical sync is active low. 2508c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_INTERLACE: mode is interlaced. 2518c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_DBLSCAN: mode uses doublescan. 2528c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_CSYNC: mode uses composite sync. 2538c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_PCSYNC: composite sync is active high. 2548c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_NCSYNC: composite sync is active low. 2558c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_HSKEW: hskew provided (not used?). 2568c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_BCAST: <deprecated> 2578c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_PIXMUX: <deprecated> 2588c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_DBLCLK: double-clocked mode. 2598c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_CLKDIV2: half-clocked mode. 2608c2ecf20Sopenharmony_ci * 2618c2ecf20Sopenharmony_ci * Additionally there's flags to specify how 3D modes are packed: 2628c2ecf20Sopenharmony_ci * 2638c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_3D_NONE: normal, non-3D mode. 2648c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_3D_FRAME_PACKING: 2 full frames for left and right. 2658c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE: interleaved like fields. 2668c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_3D_LINE_ALTERNATIVE: interleaved lines. 2678c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL: side-by-side full frames. 2688c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_3D_L_DEPTH: ? 2698c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH: ? 2708c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_3D_TOP_AND_BOTTOM: frame split into top and bottom 2718c2ecf20Sopenharmony_ci * parts. 2728c2ecf20Sopenharmony_ci * - DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF: frame split into left and 2738c2ecf20Sopenharmony_ci * right parts. 2748c2ecf20Sopenharmony_ci */ 2758c2ecf20Sopenharmony_ci u32 flags; 2768c2ecf20Sopenharmony_ci 2778c2ecf20Sopenharmony_ci /** 2788c2ecf20Sopenharmony_ci * @crtc_clock: 2798c2ecf20Sopenharmony_ci * 2808c2ecf20Sopenharmony_ci * Actual pixel or dot clock in the hardware. This differs from the 2818c2ecf20Sopenharmony_ci * logical @clock when e.g. using interlacing, double-clocking, stereo 2828c2ecf20Sopenharmony_ci * modes or other fancy stuff that changes the timings and signals 2838c2ecf20Sopenharmony_ci * actually sent over the wire. 2848c2ecf20Sopenharmony_ci * 2858c2ecf20Sopenharmony_ci * This is again in kHz. 2868c2ecf20Sopenharmony_ci * 2878c2ecf20Sopenharmony_ci * Note that with digital outputs like HDMI or DP there's usually a 2888c2ecf20Sopenharmony_ci * massive confusion between the dot clock and the signal clock at the 2898c2ecf20Sopenharmony_ci * bit encoding level. Especially when a 8b/10b encoding is used and the 2908c2ecf20Sopenharmony_ci * difference is exactly a factor of 10. 2918c2ecf20Sopenharmony_ci */ 2928c2ecf20Sopenharmony_ci int crtc_clock; 2938c2ecf20Sopenharmony_ci u16 crtc_hdisplay; 2948c2ecf20Sopenharmony_ci u16 crtc_hblank_start; 2958c2ecf20Sopenharmony_ci u16 crtc_hblank_end; 2968c2ecf20Sopenharmony_ci u16 crtc_hsync_start; 2978c2ecf20Sopenharmony_ci u16 crtc_hsync_end; 2988c2ecf20Sopenharmony_ci u16 crtc_htotal; 2998c2ecf20Sopenharmony_ci u16 crtc_hskew; 3008c2ecf20Sopenharmony_ci u16 crtc_vdisplay; 3018c2ecf20Sopenharmony_ci u16 crtc_vblank_start; 3028c2ecf20Sopenharmony_ci u16 crtc_vblank_end; 3038c2ecf20Sopenharmony_ci u16 crtc_vsync_start; 3048c2ecf20Sopenharmony_ci u16 crtc_vsync_end; 3058c2ecf20Sopenharmony_ci u16 crtc_vtotal; 3068c2ecf20Sopenharmony_ci 3078c2ecf20Sopenharmony_ci /** 3088c2ecf20Sopenharmony_ci * @width_mm: 3098c2ecf20Sopenharmony_ci * 3108c2ecf20Sopenharmony_ci * Addressable size of the output in mm, projectors should set this to 3118c2ecf20Sopenharmony_ci * 0. 3128c2ecf20Sopenharmony_ci */ 3138c2ecf20Sopenharmony_ci u16 width_mm; 3148c2ecf20Sopenharmony_ci 3158c2ecf20Sopenharmony_ci /** 3168c2ecf20Sopenharmony_ci * @height_mm: 3178c2ecf20Sopenharmony_ci * 3188c2ecf20Sopenharmony_ci * Addressable size of the output in mm, projectors should set this to 3198c2ecf20Sopenharmony_ci * 0. 3208c2ecf20Sopenharmony_ci */ 3218c2ecf20Sopenharmony_ci u16 height_mm; 3228c2ecf20Sopenharmony_ci 3238c2ecf20Sopenharmony_ci /** 3248c2ecf20Sopenharmony_ci * @type: 3258c2ecf20Sopenharmony_ci * 3268c2ecf20Sopenharmony_ci * A bitmask of flags, mostly about the source of a mode. Possible flags 3278c2ecf20Sopenharmony_ci * are: 3288c2ecf20Sopenharmony_ci * 3298c2ecf20Sopenharmony_ci * - DRM_MODE_TYPE_PREFERRED: Preferred mode, usually the native 3308c2ecf20Sopenharmony_ci * resolution of an LCD panel. There should only be one preferred 3318c2ecf20Sopenharmony_ci * mode per connector at any given time. 3328c2ecf20Sopenharmony_ci * - DRM_MODE_TYPE_DRIVER: Mode created by the driver, which is all of 3338c2ecf20Sopenharmony_ci * them really. Drivers must set this bit for all modes they create 3348c2ecf20Sopenharmony_ci * and expose to userspace. 3358c2ecf20Sopenharmony_ci * - DRM_MODE_TYPE_USERDEF: Mode defined or selected via the kernel 3368c2ecf20Sopenharmony_ci * command line. 3378c2ecf20Sopenharmony_ci * 3388c2ecf20Sopenharmony_ci * Plus a big list of flags which shouldn't be used at all, but are 3398c2ecf20Sopenharmony_ci * still around since these flags are also used in the userspace ABI. 3408c2ecf20Sopenharmony_ci * We no longer accept modes with these types though: 3418c2ecf20Sopenharmony_ci * 3428c2ecf20Sopenharmony_ci * - DRM_MODE_TYPE_BUILTIN: Meant for hard-coded modes, unused. 3438c2ecf20Sopenharmony_ci * Use DRM_MODE_TYPE_DRIVER instead. 3448c2ecf20Sopenharmony_ci * - DRM_MODE_TYPE_DEFAULT: Again a leftover, use 3458c2ecf20Sopenharmony_ci * DRM_MODE_TYPE_PREFERRED instead. 3468c2ecf20Sopenharmony_ci * - DRM_MODE_TYPE_CLOCK_C and DRM_MODE_TYPE_CRTC_C: Define leftovers 3478c2ecf20Sopenharmony_ci * which are stuck around for hysterical raisins only. No one has an 3488c2ecf20Sopenharmony_ci * idea what they were meant for. Don't use. 3498c2ecf20Sopenharmony_ci */ 3508c2ecf20Sopenharmony_ci u8 type; 3518c2ecf20Sopenharmony_ci 3528c2ecf20Sopenharmony_ci /** 3538c2ecf20Sopenharmony_ci * @expose_to_userspace: 3548c2ecf20Sopenharmony_ci * 3558c2ecf20Sopenharmony_ci * Indicates whether the mode is to be exposed to the userspace. 3568c2ecf20Sopenharmony_ci * This is to maintain a set of exposed modes while preparing 3578c2ecf20Sopenharmony_ci * user-mode's list in drm_mode_getconnector ioctl. The purpose of 3588c2ecf20Sopenharmony_ci * this only lies in the ioctl function, and is not to be used 3598c2ecf20Sopenharmony_ci * outside the function. 3608c2ecf20Sopenharmony_ci */ 3618c2ecf20Sopenharmony_ci bool expose_to_userspace; 3628c2ecf20Sopenharmony_ci 3638c2ecf20Sopenharmony_ci /** 3648c2ecf20Sopenharmony_ci * @head: 3658c2ecf20Sopenharmony_ci * 3668c2ecf20Sopenharmony_ci * struct list_head for mode lists. 3678c2ecf20Sopenharmony_ci */ 3688c2ecf20Sopenharmony_ci struct list_head head; 3698c2ecf20Sopenharmony_ci 3708c2ecf20Sopenharmony_ci /** 3718c2ecf20Sopenharmony_ci * @name: 3728c2ecf20Sopenharmony_ci * 3738c2ecf20Sopenharmony_ci * Human-readable name of the mode, filled out with drm_mode_set_name(). 3748c2ecf20Sopenharmony_ci */ 3758c2ecf20Sopenharmony_ci char name[DRM_DISPLAY_MODE_LEN]; 3768c2ecf20Sopenharmony_ci 3778c2ecf20Sopenharmony_ci /** 3788c2ecf20Sopenharmony_ci * @status: 3798c2ecf20Sopenharmony_ci * 3808c2ecf20Sopenharmony_ci * Status of the mode, used to filter out modes not supported by the 3818c2ecf20Sopenharmony_ci * hardware. See enum &drm_mode_status. 3828c2ecf20Sopenharmony_ci */ 3838c2ecf20Sopenharmony_ci enum drm_mode_status status; 3848c2ecf20Sopenharmony_ci 3858c2ecf20Sopenharmony_ci /** 3868c2ecf20Sopenharmony_ci * @picture_aspect_ratio: 3878c2ecf20Sopenharmony_ci * 3888c2ecf20Sopenharmony_ci * Field for setting the HDMI picture aspect ratio of a mode. 3898c2ecf20Sopenharmony_ci */ 3908c2ecf20Sopenharmony_ci enum hdmi_picture_aspect picture_aspect_ratio; 3918c2ecf20Sopenharmony_ci 3928c2ecf20Sopenharmony_ci}; 3938c2ecf20Sopenharmony_ci 3948c2ecf20Sopenharmony_ci/** 3958c2ecf20Sopenharmony_ci * DRM_MODE_FMT - printf string for &struct drm_display_mode 3968c2ecf20Sopenharmony_ci */ 3978c2ecf20Sopenharmony_ci#define DRM_MODE_FMT "\"%s\": %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x" 3988c2ecf20Sopenharmony_ci 3998c2ecf20Sopenharmony_ci/** 4008c2ecf20Sopenharmony_ci * DRM_MODE_ARG - printf arguments for &struct drm_display_mode 4018c2ecf20Sopenharmony_ci * @m: display mode 4028c2ecf20Sopenharmony_ci */ 4038c2ecf20Sopenharmony_ci#define DRM_MODE_ARG(m) \ 4048c2ecf20Sopenharmony_ci (m)->name, drm_mode_vrefresh(m), (m)->clock, \ 4058c2ecf20Sopenharmony_ci (m)->hdisplay, (m)->hsync_start, (m)->hsync_end, (m)->htotal, \ 4068c2ecf20Sopenharmony_ci (m)->vdisplay, (m)->vsync_start, (m)->vsync_end, (m)->vtotal, \ 4078c2ecf20Sopenharmony_ci (m)->type, (m)->flags 4088c2ecf20Sopenharmony_ci 4098c2ecf20Sopenharmony_ci#define obj_to_mode(x) container_of(x, struct drm_display_mode, base) 4108c2ecf20Sopenharmony_ci 4118c2ecf20Sopenharmony_ci/** 4128c2ecf20Sopenharmony_ci * drm_mode_is_stereo - check for stereo mode flags 4138c2ecf20Sopenharmony_ci * @mode: drm_display_mode to check 4148c2ecf20Sopenharmony_ci * 4158c2ecf20Sopenharmony_ci * Returns: 4168c2ecf20Sopenharmony_ci * True if the mode is one of the stereo modes (like side-by-side), false if 4178c2ecf20Sopenharmony_ci * not. 4188c2ecf20Sopenharmony_ci */ 4198c2ecf20Sopenharmony_cistatic inline bool drm_mode_is_stereo(const struct drm_display_mode *mode) 4208c2ecf20Sopenharmony_ci{ 4218c2ecf20Sopenharmony_ci return mode->flags & DRM_MODE_FLAG_3D_MASK; 4228c2ecf20Sopenharmony_ci} 4238c2ecf20Sopenharmony_ci 4248c2ecf20Sopenharmony_cistruct drm_connector; 4258c2ecf20Sopenharmony_cistruct drm_cmdline_mode; 4268c2ecf20Sopenharmony_ci 4278c2ecf20Sopenharmony_cistruct drm_display_mode *drm_mode_create(struct drm_device *dev); 4288c2ecf20Sopenharmony_civoid drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode); 4298c2ecf20Sopenharmony_civoid drm_mode_convert_to_umode(struct drm_mode_modeinfo *out, 4308c2ecf20Sopenharmony_ci const struct drm_display_mode *in); 4318c2ecf20Sopenharmony_ciint drm_mode_convert_umode(struct drm_device *dev, 4328c2ecf20Sopenharmony_ci struct drm_display_mode *out, 4338c2ecf20Sopenharmony_ci const struct drm_mode_modeinfo *in); 4348c2ecf20Sopenharmony_civoid drm_mode_probed_add(struct drm_connector *connector, struct drm_display_mode *mode); 4358c2ecf20Sopenharmony_civoid drm_mode_debug_printmodeline(const struct drm_display_mode *mode); 4368c2ecf20Sopenharmony_cibool drm_mode_is_420_only(const struct drm_display_info *display, 4378c2ecf20Sopenharmony_ci const struct drm_display_mode *mode); 4388c2ecf20Sopenharmony_cibool drm_mode_is_420_also(const struct drm_display_info *display, 4398c2ecf20Sopenharmony_ci const struct drm_display_mode *mode); 4408c2ecf20Sopenharmony_cibool drm_mode_is_420(const struct drm_display_info *display, 4418c2ecf20Sopenharmony_ci const struct drm_display_mode *mode); 4428c2ecf20Sopenharmony_ci 4438c2ecf20Sopenharmony_cistruct drm_display_mode *drm_cvt_mode(struct drm_device *dev, 4448c2ecf20Sopenharmony_ci int hdisplay, int vdisplay, int vrefresh, 4458c2ecf20Sopenharmony_ci bool reduced, bool interlaced, 4468c2ecf20Sopenharmony_ci bool margins); 4478c2ecf20Sopenharmony_cistruct drm_display_mode *drm_gtf_mode(struct drm_device *dev, 4488c2ecf20Sopenharmony_ci int hdisplay, int vdisplay, int vrefresh, 4498c2ecf20Sopenharmony_ci bool interlaced, int margins); 4508c2ecf20Sopenharmony_cistruct drm_display_mode *drm_gtf_mode_complex(struct drm_device *dev, 4518c2ecf20Sopenharmony_ci int hdisplay, int vdisplay, 4528c2ecf20Sopenharmony_ci int vrefresh, bool interlaced, 4538c2ecf20Sopenharmony_ci int margins, 4548c2ecf20Sopenharmony_ci int GTF_M, int GTF_2C, 4558c2ecf20Sopenharmony_ci int GTF_K, int GTF_2J); 4568c2ecf20Sopenharmony_civoid drm_display_mode_from_videomode(const struct videomode *vm, 4578c2ecf20Sopenharmony_ci struct drm_display_mode *dmode); 4588c2ecf20Sopenharmony_civoid drm_display_mode_to_videomode(const struct drm_display_mode *dmode, 4598c2ecf20Sopenharmony_ci struct videomode *vm); 4608c2ecf20Sopenharmony_civoid drm_bus_flags_from_videomode(const struct videomode *vm, u32 *bus_flags); 4618c2ecf20Sopenharmony_ciint of_get_drm_display_mode(struct device_node *np, 4628c2ecf20Sopenharmony_ci struct drm_display_mode *dmode, u32 *bus_flags, 4638c2ecf20Sopenharmony_ci int index); 4648c2ecf20Sopenharmony_ci 4658c2ecf20Sopenharmony_civoid drm_mode_set_name(struct drm_display_mode *mode); 4668c2ecf20Sopenharmony_ciint drm_mode_vrefresh(const struct drm_display_mode *mode); 4678c2ecf20Sopenharmony_civoid drm_mode_get_hv_timing(const struct drm_display_mode *mode, 4688c2ecf20Sopenharmony_ci int *hdisplay, int *vdisplay); 4698c2ecf20Sopenharmony_ci 4708c2ecf20Sopenharmony_civoid drm_mode_set_crtcinfo(struct drm_display_mode *p, 4718c2ecf20Sopenharmony_ci int adjust_flags); 4728c2ecf20Sopenharmony_civoid drm_mode_copy(struct drm_display_mode *dst, 4738c2ecf20Sopenharmony_ci const struct drm_display_mode *src); 4748c2ecf20Sopenharmony_cistruct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, 4758c2ecf20Sopenharmony_ci const struct drm_display_mode *mode); 4768c2ecf20Sopenharmony_cibool drm_mode_match(const struct drm_display_mode *mode1, 4778c2ecf20Sopenharmony_ci const struct drm_display_mode *mode2, 4788c2ecf20Sopenharmony_ci unsigned int match_flags); 4798c2ecf20Sopenharmony_cibool drm_mode_equal(const struct drm_display_mode *mode1, 4808c2ecf20Sopenharmony_ci const struct drm_display_mode *mode2); 4818c2ecf20Sopenharmony_cibool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, 4828c2ecf20Sopenharmony_ci const struct drm_display_mode *mode2); 4838c2ecf20Sopenharmony_cibool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, 4848c2ecf20Sopenharmony_ci const struct drm_display_mode *mode2); 4858c2ecf20Sopenharmony_ci 4868c2ecf20Sopenharmony_ci/* for use by the crtc helper probe functions */ 4878c2ecf20Sopenharmony_cienum drm_mode_status drm_mode_validate_driver(struct drm_device *dev, 4888c2ecf20Sopenharmony_ci const struct drm_display_mode *mode); 4898c2ecf20Sopenharmony_cienum drm_mode_status drm_mode_validate_size(const struct drm_display_mode *mode, 4908c2ecf20Sopenharmony_ci int maxX, int maxY); 4918c2ecf20Sopenharmony_cienum drm_mode_status 4928c2ecf20Sopenharmony_cidrm_mode_validate_ycbcr420(const struct drm_display_mode *mode, 4938c2ecf20Sopenharmony_ci struct drm_connector *connector); 4948c2ecf20Sopenharmony_civoid drm_mode_prune_invalid(struct drm_device *dev, 4958c2ecf20Sopenharmony_ci struct list_head *mode_list, bool verbose); 4968c2ecf20Sopenharmony_civoid drm_mode_sort(struct list_head *mode_list); 4978c2ecf20Sopenharmony_civoid drm_connector_list_update(struct drm_connector *connector); 4988c2ecf20Sopenharmony_ci 4998c2ecf20Sopenharmony_ci/* parsing cmdline modes */ 5008c2ecf20Sopenharmony_cibool 5018c2ecf20Sopenharmony_cidrm_mode_parse_command_line_for_connector(const char *mode_option, 5028c2ecf20Sopenharmony_ci const struct drm_connector *connector, 5038c2ecf20Sopenharmony_ci struct drm_cmdline_mode *mode); 5048c2ecf20Sopenharmony_cistruct drm_display_mode * 5058c2ecf20Sopenharmony_cidrm_mode_create_from_cmdline_mode(struct drm_device *dev, 5068c2ecf20Sopenharmony_ci struct drm_cmdline_mode *cmd); 5078c2ecf20Sopenharmony_ci 5088c2ecf20Sopenharmony_ci#endif /* __DRM_MODES_H__ */ 509